JPH02248037A - Formation of amorphous semiconductor - Google Patents

Formation of amorphous semiconductor

Info

Publication number
JPH02248037A
JPH02248037A JP1069590A JP6959089A JPH02248037A JP H02248037 A JPH02248037 A JP H02248037A JP 1069590 A JP1069590 A JP 1069590A JP 6959089 A JP6959089 A JP 6959089A JP H02248037 A JPH02248037 A JP H02248037A
Authority
JP
Japan
Prior art keywords
pulse
electric field
amorphous semiconductor
gas
pulse width
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1069590A
Other languages
Japanese (ja)
Other versions
JP2708864B2 (en
Inventor
Takashi Yoshida
隆 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1069590A priority Critical patent/JP2708864B2/en
Publication of JPH02248037A publication Critical patent/JPH02248037A/en
Application granted granted Critical
Publication of JP2708864B2 publication Critical patent/JP2708864B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

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  • Photovoltaic Devices (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

PURPOSE:To make it possible to control arbitrarily the band gaps of amorphous semiconductor layers to be laminated by a method wherein the pulse width and the pulse period of a pulse-status electric field, which is applied in group IV element compound gas-containing raw gases, are changed. CONSTITUTION:Parallel plates (electrodes) 2 and 3 are installed opposing to each other in the interior of a vacuum tank 1 and a substrate 4 is put on the electrode 3. A pulse generating power supply 7 is connected to the electrode 2 and an RF high frequency or a DC electric field which is generated by the power supply 7 is modulated in a pulse status. In the case of a DC electric field, a pulse electric field of a width W is repeatedly applied at a period T and in the case of a high-frequency electric field, an RF electric field is applied in the interval only of the pulse width W. Group IV element compound gas- containing raw gases, such as SiH4 gas and CH4 gas, are introduced through a raw gas introducing tube 5 under a reduced pressure and a pulse width W and a period T of a field pulse are set corresponding to the initial band gap of an amorphous semiconductor layer to be formed. Thereby, amorphous semiconductor layers, whose band gaps are different from one another, can be easily formed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、プラズマCVD法による任意のバンドギャッ
プをもつ非晶質半導体の生成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for producing an amorphous semiconductor having an arbitrary band gap by plasma CVD.

〔従来の技術〕[Conventional technology]

例えば太陽電池の窓層としてバンドギャップの広いp形
非晶質シリコン層をバンドギャップの狭いl質非晶賞シ
リコン層と接触させる場合、或いはバンドギャップの広
い非晶質シリコン薄膜とバンドギャップの狭い非晶質シ
リコン薄膜を積層して超格子構造をつくる場合には、異
なる原料ガス、例えば5tneとC1+、を用い、これ
らのガスの混合比率を代えてRF高周波あるいは直流電
界を用いたプラズマCVDを行9てバンドギャップの異
なった非晶質シリコン層を得る方法が知られている。
For example, when a p-type amorphous silicon layer with a wide bandgap is brought into contact with an l-type amorphous silicon layer with a narrow bandgap as a window layer of a solar cell, or when an amorphous silicon thin film with a wide bandgap is brought into contact with a thin film of amorphous silicon with a narrow bandgap. When creating a superlattice structure by laminating amorphous silicon thin films, plasma CVD using RF high frequency or DC electric field is performed using different raw material gases, such as 5tne and C1+, and changing the mixing ratio of these gases. A method of obtaining amorphous silicon layers having different band gaps is known.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記のように、原料ガスの混合比率を変化させて行うプ
ラズマCVD法により生成される非晶質半導体のバンド
ギャップを変化させる方法では、反応槽中に流れるガス
の混合比変化速度以上の遠い速度でバンドギャップを変
化させることは不可能である。特にバンドギャップを断
続的に変化させて積層する超格子構造を正確に作製しよ
うとすると、−度放電を停止してガスの混合比を完全に
変えたのち再び放電を開始しなければならず、時間がか
かると共に、その界面に欠陥が多数発生するという問題
があった。
As mentioned above, in the method of changing the bandgap of an amorphous semiconductor produced by plasma CVD by changing the mixing ratio of raw material gases, it is possible to It is impossible to change the bandgap in In particular, when attempting to accurately create a superlattice structure in which layers are stacked by changing the bandgap intermittently, it is necessary to stop the -degree discharge, completely change the gas mixture ratio, and then start the discharge again. There are problems in that it takes time and many defects occur at the interface.

本発明の目的は、上述の問題を解決し、バンドギャップ
の異なる非晶質半導体層を容易に形成できる非晶質半導
体の生成方法を提供することにある。
An object of the present invention is to provide a method for producing an amorphous semiconductor that can solve the above-mentioned problems and easily form amorphous semiconductor layers with different band gaps.

〔課題を解決するための手段〕[Means to solve the problem]

上記の目的の達成のために、本発明は、4族元素化合物
ガスを少なくとも一つ含む原料ガス中に電界を印加して
グロー放電を発生させプラズマCVDを行う際に、電界
をパルス状に印加し、そのパルスのパルス幅とパルス周
期を生成される非晶質半導体の所期のバンドギャップに
対応させて設定するものとする。
To achieve the above object, the present invention applies an electric field in a pulsed manner when performing plasma CVD by applying an electric field to a source gas containing at least one Group 4 element compound gas to generate a glow discharge. However, the pulse width and pulse period of the pulse are set to correspond to the intended band gap of the amorphous semiconductor to be generated.

(作用〕 プラズマCVDを行うために印加する電界をパルス状に
すれば、パルス波形に対応してプラズマ中での電子温度
とプラズマポテンシャルが変化する。従ってパルス波形
により電子温度とプラズマポテンシャルを自由に制御す
ることができ、電子温度とプラズマポテンシャルを自由
に制御することにより、プラズマ中での原料の反応速度
を制御することが可能となる。それによってプラズマ中
のイオン量、ラジカル量を制御することができる。
(Function) If the electric field applied to perform plasma CVD is pulsed, the electron temperature and plasma potential in the plasma will change in accordance with the pulse waveform.Therefore, the pulse waveform can freely control the electron temperature and plasma potential. By freely controlling the electron temperature and plasma potential, it is possible to control the reaction rate of raw materials in the plasma.Thereby, the amount of ions and radicals in the plasma can be controlled. I can do it.

従ってこの方法によれば、原料ガスの組成を変化させな
くても、パルス状の電界のパルス幅とパルス周期う変化
させるだけで、ガスの反応速度を制御して生成される非
晶質半導体の組成比を変化させることができ、バンドギ
ャップの制御が可能となる。
Therefore, according to this method, an amorphous semiconductor can be produced by controlling the reaction rate of the gas by simply changing the pulse width and pulse period of the pulsed electric field without changing the composition of the source gas. The composition ratio can be changed and the band gap can be controlled.

〔実施例〕〔Example〕

第1図は本発明の実施例に用いる装置の構成を示す、真
空槽1の内部には平行平板電極2.3が対向設置され、
一方の電極3の上に基板4が置かれている。真空槽1に
は、原料ガス導入管5および真空排気系6が連結されて
いる。電極2にはパルス発生電源フが接続されている。
FIG. 1 shows the configuration of an apparatus used in an embodiment of the present invention. Inside a vacuum chamber 1, parallel plate electrodes 2.3 are installed facing each other.
A substrate 4 is placed on one electrode 3. A raw material gas introduction pipe 5 and a vacuum exhaust system 6 are connected to the vacuum chamber 1 . A pulse generating power supply is connected to the electrode 2 .

パルス電源により発生されるRF高周波または直流電界
はパルス状に変調されている。直流電界の変調例を第2
図に示し、暢Wのパルス電界が周期Tで繰り返し印加さ
れる。高周波電界の場合には、パルス幅Wの間だけ13
.56MHzのRF電界が印加される。第3図は、第1
図の装置を用い、原料ガス導入管5から減圧下で5ll
leおよびCH4を導入し、パルス周期Tを1000μ
secとしてパルス幅を変化して得られた非晶質シリコ
ンカーバイト (a −3IC:II)の膜質を示す、
パルス幅Wを3μsecから1000#aec(連続)
まで変化させることにより、a−3IC:Hの光学バン
ドギャップE、が2.Ovから1.75eVまで変化し
、光転導度σ、hも連続的に変化する。
The RF high frequency or DC electric field generated by the pulsed power source is modulated in a pulsed manner. The second example of DC electric field modulation is
As shown in the figure, a pulsed electric field of width W is repeatedly applied with a period T. In the case of a high-frequency electric field, 13
.. A 56 MHz RF electric field is applied. Figure 3 shows the first
Using the device shown in the figure, 5 liters of raw material gas is introduced from the raw material gas inlet pipe 5 under reduced pressure.
Introducing le and CH4 and setting the pulse period T to 1000μ
The film quality of amorphous silicon carbide (a-3IC:II) obtained by varying the pulse width as sec is shown.
Pulse width W from 3μsec to 1000#aec (continuous)
By changing the optical bandgap E of a-3IC:H to 2. It changes from Ov to 1.75 eV, and the optical conductivity σ and h also change continuously.

第4図は第1図の装置を用いて形成した超格子構造を示
す、この構造はガラス基板ll上に透明導電膜12を形
成し、その上にパルス周期Tを1000μsecとし、
パルス幅1000μseCの電界とパルス幅3μsec
のの電界とを、例えば30秒ごとに交互に印加して成膜
する。パルス幅1000μ3ecのときには連続放電と
なる。これにより、それぞれ厚さが例えば20人のバン
ドギャップE* 1−75eVのa−sic+g層13
とE 、 2.OeV (D a−3IC=II層14
とが積層されて超格子構造となった。なお、透明導電膜
12の端部および最上層の上にはそれぞれ電極15゜1
6を設けた。このようにして発光ダイオードなどの超格
子デバイスが形成される。もちろん、原料ガスの種類や
流量比の初期設定を変化させることにより、光学バンド
ギャップの大きさを自由に変化させることが可能である
。また上記の実施例では、パルス周期Tを1000μs
ecとしたが、ガスの種類によっては、これを0.2μ
secから10secの間で変化させ、その中でパルス
幅を自由に変化させることにより、自由に膜質を制御す
ることが可能である。このような超格子構造非晶質半導
体は発光ダイオードの材料に用いられる。
FIG. 4 shows a superlattice structure formed using the apparatus shown in FIG.
Electric field with pulse width 1000 μsec and pulse width 3 μsec
The film is formed by alternately applying an electric field of, for example, every 30 seconds. When the pulse width is 1000 μ3 ec, continuous discharge occurs. This results in a-sic+g layers 13 each having a thickness of, for example, 20 bandgap E* 1-75 eV.
and E, 2. OeV (D a-3IC=II layer 14
were stacked to form a superlattice structure. Note that electrodes 15°1 are provided at the ends of the transparent conductive film 12 and on the top layer, respectively.
6 was established. In this way, a superlattice device such as a light emitting diode is formed. Of course, it is possible to freely change the size of the optical bandgap by changing the type of source gas and the initial setting of the flow rate ratio. Further, in the above embodiment, the pulse period T is 1000 μs.
ec, but depending on the type of gas, this may be changed to 0.2μ
By varying the pulse width between sec and 10 sec and freely varying the pulse width within that range, it is possible to freely control the film quality. Such superlattice structure amorphous semiconductors are used as materials for light emitting diodes.

第5図は本発明の別の実施例を示し、pin構造を有す
る非晶質シリコン太陽電池のバンド・ダイアグラムであ
る。pin構造の太陽電池においては、いわゆる窓層で
ある光入射側のp層にバンドギャップの広いa−3iC
:H膜を、用い、光の透過率を高くすることは良(知ら
れている0図において、a−sic:aからなる2層2
1.非晶質シリコン(a−3i)からなる1J111n
層23によって構成されるpin構造のほかに2層21
と1層220間にインターフェイス層24が挿入されて
いる。この実施例では、この中のインターフェイス層の
バンドギャップの勾配を第1図の装置の画電極2.3の
間に印加されるパルス状電界のパルス幅を変化させるこ
とにより得ている。具体的には、原料ガス導入管5より
、流量200SC(:Mの5iHe、  2 SCCM
のCHI。
FIG. 5 shows another embodiment of the present invention and is a band diagram of an amorphous silicon solar cell having a pin structure. In solar cells with a pin structure, the p layer on the light incident side, which is the so-called window layer, is made of a-3iC with a wide bandgap.
:H film is used to increase the light transmittance (in the known 0 diagram, two layers consisting of a-sic:a
1. 1J111n made of amorphous silicon (a-3i)
In addition to the pin structure composed of layer 23, two layers 21
An interface layer 24 is inserted between the first layer 220 and the second layer 220 . In this embodiment, the gradient of the bandgap of the interface layer therein is obtained by varying the pulse width of the pulsed electric field applied between the picture electrodes 2.3 of the device of FIG. Specifically, from the raw material gas introduction pipe 5, a flow rate of 200 SC (: 5iHe of M, 2 SCCM
CHI.

20SCCMのhの混合ガスを原料ガスとし、パルス周
期をl m5ecとして、パルス幅を3μsecから連
続放電となる1000μsecまで30分の間に連続的
に変化させて、バンドギャップE、が2eVから1.7
5eVまで変化し、一方では2層21と同じバンドギャ
ップ、他方では1層22と同じバンドギャップのインタ
ーフェイス層24を200〜400人の厚さに成膜した
。このようななだらかにバンドギャップが変化するイン
ターフ、エイス層24を挿入することにより、pM12
1と0層23の間のビルトイン・ポテンシャルが上がり
、出力電圧が高くなった。
Using a mixed gas of 20 SCCM h as the source gas, setting the pulse period to 1 m5 ec, and changing the pulse width continuously from 3 μsec to 1000 μsec, which is a continuous discharge, over a period of 30 minutes, the band gap E was changed from 2 eV to 1. 7
The interface layer 24 was deposited to a thickness of 200 to 400 layers with the same bandgap as the second layer 21 on the one hand and the same bandgap as the first layer 22 on the other hand. By inserting the eighth layer 24, which is an interface whose bandgap changes smoothly, pM12
The built-in potential between the 1 and 0 layers 23 has increased, resulting in a higher output voltage.

本発明は、以上の二つの実施例に限定されず、プラズマ
CVDにより生成される非晶質半導体のバンドギャップ
を制御する必要のある場合にすべて実施可能である。
The present invention is not limited to the above two embodiments, but can be implemented in all cases where it is necessary to control the band gap of an amorphous semiconductor produced by plasma CVD.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、プラズマCVD装置の真空槽中の原料
ガス混合比を変化させることなく、槽内の電極に電圧を
印加するパルス電源のパルス周期。
According to the present invention, the pulse period of the pulse power source applies voltage to the electrodes in the vacuum chamber of the plasma CVD apparatus without changing the raw material gas mixture ratio in the chamber.

パルス幅を変化させることにより、積層される非晶質半
導体のバンドギャップを任意に制御することができる。
By changing the pulse width, the bandgap of the laminated amorphous semiconductors can be arbitrarily controlled.

特に、超格子構造や太陽電池などのためにバンドギャッ
プの異なる非晶質半導体膜を積層する際に、放電を停止
してガスを入れ損える必要がなくなり、時間ロスを伴わ
ないで成膜でき、放電停止による界面欠陥の発生を防ぐ
ことができる。
In particular, when stacking amorphous semiconductor films with different bandgaps for superlattice structures, solar cells, etc., there is no need to stop the discharge and fail to introduce gas, allowing film formation without time loss. , it is possible to prevent the occurrence of interface defects due to discharge stoppage.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例に用いるプラズマCVD装置の
断面図、第2図はパルス電源の出力波形図、第3図はパ
ルス周期L m5ecにおける印加電界のパルス幅と得
られるa−5IC:Hのバンドギャップおよび光転導度
との関係線図、第4図は本発明の一実施例によって得ら
れる超格子デバイスの断面図、第5図は本発明の別の実
施例によって得られるインターフェイス層をもつ大腸電
池のバンドダイアダラムである。 1:真空槽、2,3:電極、4:基板、5:原料ガス導
入管、6:真空排気系、7:パルス電源。 第1図 第2図 ノ(ルス?I (usec) 第3図 第4図 第5図
FIG. 1 is a cross-sectional view of a plasma CVD apparatus used in an embodiment of the present invention, FIG. 2 is a diagram of the output waveform of a pulsed power source, and FIG. 3 is the pulse width of the applied electric field at a pulse period of L m5ec and the resulting a-5IC: FIG. 4 is a cross-sectional view of a superlattice device obtained by one embodiment of the present invention, and FIG. 5 is an interface obtained by another embodiment of the present invention. This is a band diagram of a colon battery with layers. 1: Vacuum chamber, 2, 3: Electrode, 4: Substrate, 5: Raw material gas introduction tube, 6: Vacuum exhaust system, 7: Pulse power source. Figure 1 Figure 2 (Rus? I (usec) Figure 3 Figure 4 Figure 5

Claims (1)

【特許請求の範囲】[Claims] (1)4族元素、化合物ガスを少なくとも一つ含む原料
ガス中に電界を印加してグロー放電を発生させプラズマ
CVDを行う際に、電界をパルス状に印加し、そのパル
スのパルス幅とパルス周期を生成される非晶質半導体の
所期のバンドギャップに対応させて設定することを特徴
とする非晶質半導体の生成方法。
(1) When performing plasma CVD by applying an electric field to a raw material gas containing at least one Group 4 element or compound gas to generate a glow discharge, the electric field is applied in a pulsed manner, and the pulse width and pulse width of the pulse are A method for producing an amorphous semiconductor, characterized in that a period is set in accordance with a desired bandgap of the amorphous semiconductor to be produced.
JP1069590A 1989-03-22 1989-03-22 Method for producing amorphous semiconductor Expired - Lifetime JP2708864B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1069590A JP2708864B2 (en) 1989-03-22 1989-03-22 Method for producing amorphous semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1069590A JP2708864B2 (en) 1989-03-22 1989-03-22 Method for producing amorphous semiconductor

Publications (2)

Publication Number Publication Date
JPH02248037A true JPH02248037A (en) 1990-10-03
JP2708864B2 JP2708864B2 (en) 1998-02-04

Family

ID=13407193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1069590A Expired - Lifetime JP2708864B2 (en) 1989-03-22 1989-03-22 Method for producing amorphous semiconductor

Country Status (1)

Country Link
JP (1) JP2708864B2 (en)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737825A (en) * 1993-07-22 1995-02-07 Nec Corp Forming method of amorphous silicon film and manufacturing method of thin film transistor
JP2005050905A (en) * 2003-07-30 2005-02-24 Sharp Corp Method for manufacturing silicon thin film solar cell
JP2005183620A (en) * 2003-12-18 2005-07-07 Sharp Corp Method for manufacturing silicon thin film solar battery
WO2006134781A1 (en) * 2005-06-16 2006-12-21 Kyocera Corporation Method and device for depositing film, deposited film and photosensitive body employing same
JP2008181960A (en) * 2007-01-23 2008-08-07 Sharp Corp Laminated optoelectric converter and its fabrication process
JP2008240156A (en) * 1994-12-20 2008-10-09 Schott Ag Plasma cvd method
JP2009267383A (en) * 2008-03-31 2009-11-12 Ngk Insulators Ltd Apparatus for mass-producing silicon-based thin film, and method for mass-producing the silicon-based thin film
JP2009302583A (en) * 2009-09-28 2009-12-24 Sharp Corp Laminated optoelectric transducer and method of manufacturing the same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158419A (en) * 1980-05-12 1981-12-07 Shunpei Yamazaki Semiamorphous semiconductor and manufacture therefor
JPS611023A (en) * 1984-06-13 1986-01-07 Teru Saamuko Kk Batch plasma device
JPH01149965A (en) * 1987-12-07 1989-06-13 Hitachi Ltd Plasma reactor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56158419A (en) * 1980-05-12 1981-12-07 Shunpei Yamazaki Semiamorphous semiconductor and manufacture therefor
JPS611023A (en) * 1984-06-13 1986-01-07 Teru Saamuko Kk Batch plasma device
JPH01149965A (en) * 1987-12-07 1989-06-13 Hitachi Ltd Plasma reactor

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737825A (en) * 1993-07-22 1995-02-07 Nec Corp Forming method of amorphous silicon film and manufacturing method of thin film transistor
JP2008240156A (en) * 1994-12-20 2008-10-09 Schott Ag Plasma cvd method
JP2005050905A (en) * 2003-07-30 2005-02-24 Sharp Corp Method for manufacturing silicon thin film solar cell
JP2005183620A (en) * 2003-12-18 2005-07-07 Sharp Corp Method for manufacturing silicon thin film solar battery
JP4497914B2 (en) * 2003-12-18 2010-07-07 シャープ株式会社 Method for producing silicon thin film solar cell
WO2006134781A1 (en) * 2005-06-16 2006-12-21 Kyocera Corporation Method and device for depositing film, deposited film and photosensitive body employing same
JP4851448B2 (en) * 2005-06-16 2012-01-11 京セラ株式会社 Deposited film forming method, deposited film forming apparatus, deposited film, and photoreceptor using the same
JP2008181960A (en) * 2007-01-23 2008-08-07 Sharp Corp Laminated optoelectric converter and its fabrication process
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