JPH0224652U - - Google Patents

Info

Publication number
JPH0224652U
JPH0224652U JP10202388U JP10202388U JPH0224652U JP H0224652 U JPH0224652 U JP H0224652U JP 10202388 U JP10202388 U JP 10202388U JP 10202388 U JP10202388 U JP 10202388U JP H0224652 U JPH0224652 U JP H0224652U
Authority
JP
Japan
Prior art keywords
speed
scrambling
signals
circuit
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10202388U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10202388U priority Critical patent/JPH0224652U/ja
Publication of JPH0224652U publication Critical patent/JPH0224652U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP10202388U 1988-08-02 1988-08-02 Pending JPH0224652U (enrdf_load_stackoverflow)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10202388U JPH0224652U (enrdf_load_stackoverflow) 1988-08-02 1988-08-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10202388U JPH0224652U (enrdf_load_stackoverflow) 1988-08-02 1988-08-02

Publications (1)

Publication Number Publication Date
JPH0224652U true JPH0224652U (enrdf_load_stackoverflow) 1990-02-19

Family

ID=31331550

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10202388U Pending JPH0224652U (enrdf_load_stackoverflow) 1988-08-02 1988-08-02

Country Status (1)

Country Link
JP (1) JPH0224652U (enrdf_load_stackoverflow)

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