JPH0224652U - - Google Patents
Info
- Publication number
- JPH0224652U JPH0224652U JP10202388U JP10202388U JPH0224652U JP H0224652 U JPH0224652 U JP H0224652U JP 10202388 U JP10202388 U JP 10202388U JP 10202388 U JP10202388 U JP 10202388U JP H0224652 U JPH0224652 U JP H0224652U
- Authority
- JP
- Japan
- Prior art keywords
- speed
- scrambling
- signals
- circuit
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 2
Landscapes
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10202388U JPH0224652U (cs) | 1988-08-02 | 1988-08-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10202388U JPH0224652U (cs) | 1988-08-02 | 1988-08-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0224652U true JPH0224652U (cs) | 1990-02-19 |
Family
ID=31331550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10202388U Pending JPH0224652U (cs) | 1988-08-02 | 1988-08-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0224652U (cs) |
-
1988
- 1988-08-02 JP JP10202388U patent/JPH0224652U/ja active Pending
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