JPH02246409A - Filter circuit - Google Patents
Filter circuitInfo
- Publication number
- JPH02246409A JPH02246409A JP6702289A JP6702289A JPH02246409A JP H02246409 A JPH02246409 A JP H02246409A JP 6702289 A JP6702289 A JP 6702289A JP 6702289 A JP6702289 A JP 6702289A JP H02246409 A JPH02246409 A JP H02246409A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- resistor
- terminal
- input
- differential amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims abstract description 43
- 230000000694 effects Effects 0.000 abstract description 12
- 230000003071 parasitic effect Effects 0.000 abstract description 11
- 238000010586 diagram Methods 0.000 description 6
- 238000003379 elimination reaction Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000008030 elimination Effects 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000003121 nonmonotonic effect Effects 0.000 description 1
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- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、帯域除去の特性をもつフィルタ回路に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to a filter circuit with band rejection characteristics.
従来の技術
従来、この種のフィルタ回路の構成は、第５図に示すよ
うな構成をとっていた。2. Description of the Related Art Conventionally, this type of filter circuit has had a configuration as shown in FIG.
第５図において、１は一定のコンダクタンスをもつ差動
アンプであり、３はバッファ、４．６はコンデンサであ
り、５は抵抗である。In FIG. 5, 1 is a differential amplifier with constant conductance, 3 is a buffer, 4.6 is a capacitor, and 5 is a resistor.
第５図において、差動アンプ１のコンダクタンスの逆数
をｒｌ １コンデンサ４の容量値をＣ＋コンデンサ６の
容量値をＣ２、抵抗５の抵抗値をｒ２とすると、入力端
子９．出力端子８間の伝達関数Ｔ＋ は、次式で表され
る。In FIG. 5, if the reciprocal of the conductance of the differential amplifier 1 is rl, the capacitance value of capacitor 4 is C2, the capacitance value of capacitor 6 is C2, and the resistance value of resistor 5 is r2, input terminal 9. The transfer function T+ between the output terminals 8 is expressed by the following equation.
・・・・・・（１） （１）式の振幅特性Ｇ１は次式で表される。・・・・・・(1) The amplitude characteristic G1 of equation (1) is expressed by the following equation.
・・・・・・（２）
（２）式は、振幅特性ＧＩが、角周波数ωＮを中心とす
る単調な、帯域除去特性であることを示している。(2) Equation (2) indicates that the amplitude characteristic GI is a monotonous band elimination characteristic centered on the angular frequency ωN.
ただし、ωＮは、 で、表される。However, ωN is It is expressed in .
また（２）式は、角周波数ωＮにおいて、減衰量が無限
大となることを示している。Furthermore, equation (2) indicates that the amount of attenuation becomes infinite at the angular frequency ωN.
発明が解決しようとする課題
従来の構成を、半導体集積回路として、実現した場合、
抵抗の寄生容量効果により、設定された特性が得られな
い、特に、角周波数ωＮにおける減衰量が小さくなると
いう問題点があった。Problems to be Solved by the Invention When the conventional configuration is realized as a semiconductor integrated circuit,
Due to the parasitic capacitance effect of the resistor, there is a problem that the set characteristics cannot be obtained, and in particular, the amount of attenuation at the angular frequency ωN becomes small.
また、従来の構成を、低域通過フィルタと合わせて使用
する場合、振幅特性が、単調であるために、急峻なしゃ
断特性が得られないという問題点があった。Further, when the conventional configuration is used in combination with a low-pass filter, there is a problem in that the amplitude characteristic is monotonic, so that a steep cutoff characteristic cannot be obtained.
課題を解決するための手段
本発明は、抵抗の寄生容量効果を打ち消すために、第１
コンデンサと差動アンプの出力との間に、補正抵抗を直
列に接続したものである。Means for Solving the Problems The present invention provides a first
A correction resistor is connected in series between the capacitor and the output of the differential amplifier.
また本発明は、帯域除去フィルタの振幅特性の単調さを
なくし、低域通過フィルタと合わせて使用した時の、急
峻な、しゃ断特性を得るために、出力端子と接地との間
に、第３のコンデンサを接続したものである。In addition, the present invention provides a third filter between the output terminal and the ground in order to eliminate the monotony of the amplitude characteristics of the band-removal filter and obtain steep cut-off characteristics when used in conjunction with a low-pass filter. The capacitors are connected.
作用
本発明によると、補止抵抗を付加することにより、抵抗
の寄生容量効果を打消し、中心角周波数における減衰量
を大きくすることができ、また、低域通過フィルタと合
わせて付加することにより、急峻なしゃ断特性を実現す
ることができる。According to the present invention, by adding a supplementary resistor, the parasitic capacitance effect of the resistor can be canceled and the amount of attenuation at the center angular frequency can be increased. , it is possible to realize steep cutoff characteristics.
実施例 第１図に、本発明の実施例を示す。Example FIG. 1 shows an embodiment of the invention.
第１図において、一定のコンダクタンスをもつ、第１差
動アンプ１のプラス側入力は、入力端子ＶＩＮに接続さ
れており、第１差動アンプ１の出力は、補正抵抗２の一
端、及びバッファ３の入力に接続され、補正抵抗２の他
端は、第１コンデンサ４の一端に接続され、第１コンデ
ンサ４の他端は接地され、バッファ３の出力は、抵抗５
の一端に接続されており、抵抗５の他端は第２コンデン
サ６の一端、及び第３コンデンサ７の一端、及び第１差
動アンプ１のマイナス側入力、及び出力端子８に接続さ
れており、第２コンデンサ６の他端は、入力端子９に接
続されており、第３コンデンサ７の他端は接地されてい
る。In FIG. 1, the positive input of the first differential amplifier 1, which has a constant conductance, is connected to the input terminal VIN, and the output of the first differential amplifier 1 is connected to one end of the correction resistor 2 and the buffer. The other end of the correction resistor 2 is connected to one end of the first capacitor 4, the other end of the first capacitor 4 is grounded, and the output of the buffer 3 is connected to the input of the resistor 5.
The other end of the resistor 5 is connected to one end of the second capacitor 6, one end of the third capacitor 7, the negative input of the first differential amplifier 1, and the output terminal 8. , the other end of the second capacitor 6 is connected to the input terminal 9, and the other end of the third capacitor 7 is grounded.
さて、ここで第３コンデンサ７の容量値を無視すれば、
第１図は、帯域除去特性をもつフィルタ回路を示してお
り、補正抵抗２の効果によって、抵抗５の寄生容量の影
響を防ぐことができる。Now, if we ignore the capacitance value of the third capacitor 7,
FIG. 1 shows a filter circuit having band-elimination characteristics, and the effect of the correction resistor 2 can prevent the influence of the parasitic capacitance of the resistor 5.
また、補正抵抗２を短絡すれば、第１図は、振幅特性の
単調でない帯域除去特性をもつフィルタ回路を示すこと
になる。Furthermore, if the correction resistor 2 is short-circuited, FIG. 1 shows a filter circuit having band elimination characteristics whose amplitude characteristics are not monotonous.
さらに、第３コンデンサ７も、補正抵抗２も無視しない
とすれば、抵抗５の寄生容量の影響を防ぐことができ、
その上に、振幅特性の単調でない、帯域除去特性をもつ
フィルタ回路を示すことになる。Furthermore, if neither the third capacitor 7 nor the correction resistor 2 is ignored, the influence of the parasitic capacitance of the resistor 5 can be prevented.
Furthermore, a filter circuit with non-monotonic amplitude characteristics and band rejection characteristics will be shown.
また、第２図に本発明の他の実施例を示す。Further, FIG. 2 shows another embodiment of the present invention.
第２図は第１図における抵抗５とバッファ３のかわりに
、一定のコンダクタンスをもつ、第２差動アンプ１０を
接続したものであり、第２差動アンプ１０のコンダクタ
ンスの逆数を、第１図における抵抗５に一致させると、
第１図と全く同様のフィルタ特性をもつ。In FIG. 2, a second differential amplifier 10 having a constant conductance is connected in place of the resistor 5 and buffer 3 in FIG. 1, and the reciprocal of the conductance of the second differential amplifier 10 is When matched with resistance 5 in the figure,
It has exactly the same filter characteristics as in FIG.
つぎに、補正抵抗２および低域通過フィルタを付加した
ものの作用をのべる。Next, the effect of the addition of the correction resistor 2 and the low-pass filter will be described.
第３図は、抵抗値ｒ２゛の抵抗５に寄生する全容量値を
Ｃ３とし、Ｃ８は抵抗５を２等分割したところに集中す
るとしたモデルを用いたものであり、また、抵抗値ｒ、
の補正抵抗２を、差動アンプ１の出力と、容量値Ｃ＋の
第１コンデンサ４との間に直列に接続したものである。Figure 3 uses a model in which the total capacitance value parasitic to the resistor 5 with a resistance value r2゛ is C3, and C8 is concentrated where the resistor 5 is divided into two equal parts, and the resistance value r,
A correction resistor 2 is connected in series between the output of the differential amplifier 1 and a first capacitor 4 having a capacitance value of C+.
第３図における、入出力間の伝達関数Ｔ２は、次式で表
される。The transfer function T2 between input and output in FIG. 3 is expressed by the following equation.
・・・・・・（４） （４）式の振幅特性Ｇ２は、次式で表される。・・・・・・(4) The amplitude characteristic G2 of equation (4) is expressed by the following equation.
・・・・・・（！５）
■式から、
ｒ＝’ ＝ｊｕＮ”Ｃ２Ｃａｒ＋ ｒ２２−＝（６）と
なる様に、補正抵抗２の抵抗値ｒ、を設定すれば、角周
波数ωＮにおいて、減衰量は、無限大となる。......(!5) ■From the formula, if the resistance value r of the correction resistor 2 is set so that r='=juN"C2Car+r22-=(6), at the angular frequency ωN, The amount of attenuation becomes infinite.
さて、次に第４図は、出力端子と接地との間にコンデン
サＣ３が接続されたものである。Next, in FIG. 4, a capacitor C3 is connected between the output terminal and ground.
第４図における、入出力間の伝達関数Ｔ３は、次式で表
される。The transfer function T3 between input and output in FIG. 4 is expressed by the following equation.
ω（ωＮのときは ω二ω０のときは ・・・・・・の ■式の振幅特性Ｇ３は、次式で表される。ω (when ωN When ω2ω0 ······of The amplitude characteristic G3 of equation (2) is expressed by the following equation.
となる。becomes.
ただし、
・・・・・・（８）
（８）式もまた、角周波数ωＮにおいて、減衰量は無限
大となることを示している。However, ... (8) Equation (8) also shows that at the angular frequency ωN, the amount of attenuation becomes infinite.
（２）式と（８）式から、 ・・・・・・（９） （９）式から、 ω）ωＮのときは である。From equations (2) and (8), ・・・・・・(9) From equation (9), ω) When ωN It is.
（８）、（１０）、（１１）、（１２）式より、Ｇ３の
特性は、単調ではなく第３コンデンサ７の容量Ｃ３の値
によっては角周波数ωθ付近でピークをもち、角周波数
ωＮで減衰量無限大となり、角周波数がωＮより大きく
なると、Ｃ２／ （Ｃ２＋Ｃ３）に漸近する特性をもつ
ことがわかる。From equations (8), (10), (11), and (12), the characteristics of G3 are not monotonous, but depending on the value of the capacitance C3 of the third capacitor 7, they have a peak near the angular frequency ωθ, and at the angular frequency ωN. It can be seen that when the attenuation becomes infinite and the angular frequency becomes larger than ωN, it has a characteristic of asymptotic to C2/(C2+C3).
さらに、第３図に示されるフィルタ回路の出力端子と接
地との間に、容量値Ｃ３に相当するコンデンサを接続す
ると、以上記載したように、（４）式及び■式の両方の
特性が得られることになり、抵抗５の寄生容量効果を打
消し、減衰量が大きくなり、また、Ｃ３の値によっては
、角周波数ωθ付近でピークをもつ、ＪＩＬ調でない特
性をもつことになる。Furthermore, if a capacitor with a capacitance value C3 is connected between the output terminal of the filter circuit shown in Fig. 3 and the ground, the characteristics of both equations (4) and (2) can be obtained as described above. This cancels the parasitic capacitance effect of the resistor 5, increases the amount of attenuation, and, depending on the value of C3, has characteristics that are not JIL-like, with a peak near the angular frequency ωθ.
発明の効果
以上のように、本発明によれば、半導体集積回路として
実現した場合、従来の構成においては、抵抗の寄生容量
効果のために、中心角周波数ωＮにおける減衰量が小さ
（なってしまうのに対し、補正抵抗を導入することによ
り、抵抗の寄生容量効果を打消し、中心角周波数ωＮに
おける減衰量を太き（することができる。Effects of the Invention As described above, according to the present invention, when realized as a semiconductor integrated circuit, the amount of attenuation at the center angular frequency ωN is small due to the parasitic capacitance effect of the resistor in the conventional configuration. On the other hand, by introducing a correction resistor, it is possible to cancel the parasitic capacitance effect of the resistor and increase the amount of attenuation at the central angular frequency ωN.
また、低域通過フィルタと合わせて使用する場合には、
本発明によれば、急峻なしゃ断特性を得られることにな
り、半導体集積回路として構成する上できわめて有効な
ものである。Also, when used in conjunction with a low-pass filter,
According to the present invention, a steep cutoff characteristic can be obtained, which is extremely effective in constructing a semiconductor integrated circuit.
さらに、補正抵抗と第３のコンデンサの両方を導入すれ
ば、本発明によれば、抵抗の寄生容量効果を打消し、減
衰量を大きくでき、低域通過フィルタと合わせて使用す
る場合には、急峻なしゃ断特性を得られ、きわめて有用
なものとなる。Furthermore, by introducing both the correction resistor and the third capacitor, according to the present invention, the parasitic capacitance effect of the resistor can be canceled and the amount of attenuation can be increased, and when used in conjunction with a low-pass filter, It provides steep cutting characteristics and is extremely useful.
第１図は本発明の一実施例によるフィルタ回路の回路図
、第２図は本発明の他の実施例によるフィルタ回路の回
路図、第３図は抵抗の寄生容量効果まで考えた本発明の
一実施例によるフィルタ回路の回路図、第４図は振幅特
性を変える本発明の別の実施例によるフィルタ回路の回
路図、第５図は従来の技術のフィルタ回路の回路図であ
る。
１・・・・・・コンダクタンスｌ／ｒｌをもつ差動アン
プ、２・・・・・・抵抗、３・・・・・・バッファ、４
・・・・・・コンデンサ、５・・・・・・抵抗、６・・
・・・・コンデンサ、７・・・・・・コンデンサ、８・
・・・・・出力端子、９・・・・・・入力端子。
代理人の氏名 弁理士 粟野重孝 ばか１名／−−コン
グクタンスＩ冷１の差動アンプ２−・−抵 抗 （ｒｔ
ｒ ）
３−パ・ソファ
４〜コシデンサ（Ｃｔ）
５−紙札（Ｆ″ｔ）
？−人力篇子
１図
を
第３図
乙FIG. 1 is a circuit diagram of a filter circuit according to one embodiment of the present invention, FIG. 2 is a circuit diagram of a filter circuit according to another embodiment of the present invention, and FIG. 3 is a circuit diagram of a filter circuit according to another embodiment of the present invention. FIG. 4 is a circuit diagram of a filter circuit according to an embodiment of the present invention, FIG. 4 is a circuit diagram of a filter circuit according to another embodiment of the present invention in which amplitude characteristics are changed, and FIG. 5 is a circuit diagram of a filter circuit of the prior art. 1... Differential amplifier with conductance l/rl, 2... Resistor, 3... Buffer, 4
...Capacitor, 5...Resistor, 6...
... Capacitor, 7... Capacitor, 8.
...Output terminal, 9...Input terminal. Name of agent Patent attorney Shigetaka Awano 1 idiot/--Conguktance I cold 1 differential amplifier 2--Resistance (rt
r) 3-Pa Sofa 4~Cosidensa (Ct) 5-Paper Bill (F″t) ?-Replace Figure 1 of the human power panel with Figure 3 B
Claims (4)
ラス側入力を入力端子とし、同第１差動アンプの出力を
、第１抵抗および第１コンデンサの直列接続体を介して
接地すると共に、バッファの入力に接続し、前記バッフ
ァの出力を、第２抵抗を介して出力端子とし、同出力端
子を、直接前記第１差動アンプのマイナス側入力に、及
び第２コンデンサを介して前記入力端子に、それぞれ接
続したことを特徴とするフィルタ回路。(1) The positive input of a first differential amplifier having a constant conductance is used as an input terminal, and the output of the first differential amplifier is grounded via a series connection of a first resistor and a first capacitor, The output of the buffer is connected to the input of the buffer, and the output of the buffer is connected to the output terminal via a second resistor, and the output terminal is directly connected to the negative input of the first differential amplifier, and the input is connected to the input via a second capacitor. A filter circuit characterized in that each terminal is connected to the filter circuit.
もつ、第２差動アンプで構成されたことを特徴とする請
求項（１）記載のフィルタ回路。(2) The filter circuit according to claim (1), wherein the buffer and the second resistor are constituted by a second differential amplifier having a constant conductance.
ラス側入力は、入力端子に接続されており、第１差動ア
ンプの出力は、第１コンデンサの一端、及びバッファの
入力に接続されており、第１コンデンサの他端は接地さ
れており、バッファの出力は第２抵抗の一端に接続され
ており、第２抵抗の他端は、第２コンデンサの一端及び
、第３コンデンサの一端、及び第１差動アンプのマイナ
ス側入力、及び出力端子に接続され、第２コンデンサの
他端は、入力端子に接線され、第３コンデンサの他端は
、接地されていることを特徴とするフィルタ回路。(3) The positive input of the first differential amplifier with constant conductance is connected to the input terminal, and the output of the first differential amplifier is connected to one end of the first capacitor and the input of the buffer. The other end of the first capacitor is grounded, the output of the buffer is connected to one end of the second resistor, and the other end of the second resistor is connected to one end of the second capacitor, one end of the third capacitor, and a negative input and an output terminal of the first differential amplifier, the other end of the second capacitor is connected to the input terminal, and the other end of the third capacitor is grounded. circuit.
ラス側入力は入力端子に接続されており、第１差動アン
プの出力は第１抵抗の一端、及びバッファの入力に接続
され、第１抵抗の他端は、第１コンデンサの一端に接続
され、第１コンデンサの他端は接地されており、バッフ
ァの出力は、第２抵抗の一端に接続されており、第２抵
抗の他端は、第２のコンデンサの一端、及び第３コンデ
ンサの一端、及び第１差動アンプのマイナス側入力、及
び出力端子に接続され、第２コンデンサの他端は、入力
端子に接続され、第３コンデンサの他端は、接地されて
いることを特徴とするフィルタ回路。(4) The positive input of the first differential amplifier having a constant conductance is connected to the input terminal, the output of the first differential amplifier is connected to one end of the first resistor and the input of the buffer, and the first differential amplifier has a constant conductance. The other end of the resistor is connected to one end of the first capacitor, the other end of the first capacitor is grounded, the output of the buffer is connected to one end of the second resistor, and the other end of the second resistor is grounded. , one end of the second capacitor, one end of the third capacitor, and the negative input and output terminal of the first differential amplifier, the other end of the second capacitor is connected to the input terminal, and the third capacitor A filter circuit characterized in that the other end is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1067022A JP2538037B2 (en) | 1989-03-17 | 1989-03-17 | Filter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1067022A JP2538037B2 (en) | 1989-03-17 | 1989-03-17 | Filter circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02246409A true JPH02246409A (en) | 1990-10-02 |
| JP2538037B2 JP2538037B2 (en) | 1996-09-25 |
Family
ID=13332856
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1067022A Expired - Lifetime JP2538037B2 (en) | 1989-03-17 | 1989-03-17 | Filter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2538037B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0638932A2 (en) * | 1993-06-25 | 1995-02-15 | Nec Corporation | Semiconductor circuit device capable of reducing influence of a parasitic capacitor |
| US5610551A (en) * | 1994-01-26 | 1997-03-11 | Sanyo Electric Co., Ltd. | Filter circuit |
-
1989
- 1989-03-17 JP JP1067022A patent/JP2538037B2/en not_active Expired - Lifetime
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0638932A2 (en) * | 1993-06-25 | 1995-02-15 | Nec Corporation | Semiconductor circuit device capable of reducing influence of a parasitic capacitor |
| EP0638932A3 (en) * | 1993-06-25 | 1995-05-03 | Nippon Electric Co | Semiconductor circuit device capable of reducing influence of a parasitic capacitor. |
| US5479045A (en) * | 1993-06-25 | 1995-12-26 | Nec Corporation | Semiconductor circuit device capable of reducing influence of a parasitic capacitor |
| US5479044A (en) * | 1993-06-25 | 1995-12-26 | Nec Corporation | Semiconductor circuit device capable of reducing influence of a parasitic capacitor |
| EP0886314A1 (en) * | 1993-06-25 | 1998-12-23 | Nec Corporation | Semiconductor circuit device capable of reducing influence of a parasitic capacitor |
| US5610551A (en) * | 1994-01-26 | 1997-03-11 | Sanyo Electric Co., Ltd. | Filter circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2538037B2 (en) | 1996-09-25 |
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