JPH02245794A - Integrated circuit for driving liquid crystal panel - Google Patents

Abstract

PURPOSE:To shorten an inspecting time by changing the logical output of a latch circuit at a specified position with the output data of the latch circuit and the impressing signal of a 1st external input terminal and outputting a specified output signal. CONSTITUTION:A driving circuit 103 is provided, which outputs the specified output signal by changing one logical output of the latch circuit 105 at the specified position with the output data of the latch circuit 105 which holds the output data of a shift register circuit 106 and the impressing signal of the 1st external input terminal 109. Thus, on-voltage can be outputted to an output terminal adjacent to an output terminal which outputs the on-voltage. Since the shift register 106 is a two-way shift register, the position for impressing the on-voltage can be moved forward or backward and the inspection of a liquid crystal panel is easily performed at high speed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a driving integrated circuit used to operate a liquid crystal display device.

BACKGROUND OF THE INVENTION In recent years, liquid crystal display devices have been actively developed due to their ability to be made lightweight and thin. Among them, active matrix liquid crystal display devices in which a switching element is arranged in each picture element have been developed and are being used because of their advantages such as contrast. The liquid crystal display panel requires tens of thousands of switching elements (hereinafter referred to as TPT) to be formed on one substrate.

However, with the current technology, it is difficult to form all the TPTs without defects, so after forming the liquid crystal display panel, it is necessary to perform an inspection to determine whether it is good or bad. Therefore, there is a need for a structure and manufacturing method for a liquid crystal display device that can be inspected quickly and easily. The present invention adds an invention to a scanning line drive integrated circuit (hereinafter referred to as a liquid crystal panel drive IC) for a liquid crystal display panel, thereby facilitating the inspection process of the liquid crystal panel.

A conventional liquid crystal panel drive IC will be described below with reference to the drawings. FIG. 5 is a functional block diagram of a conventional liquid crystal panel drive IC.

In FIG. 5, 504 is a shift register circuit, 503 is a latch circuit that holds the output data of the shift register circuit, and 502 is a latch circuit that turns on the TPT at the output terminal Xn (where n is an integer) according to the output data of the latch circuit. This is a drive circuit that outputs a voltage that turns the TPT into an OFF state (hereinafter referred to as an OFF voltage). In addition, 508 is a shift register 50
8 clock input terminal, 505 a control signal input terminal of the output terminal χn, 503 a latch control signal input terminal, 507
is a serial data input terminal.

Next, the operation of the conventional liquid crystal panel drive IC will be explained. First, data at the serial data input terminal is sequentially read into the shift register circuit 504 by a signal applied to the clock input terminal 508. Further, during normal operation, an H level is applied to the latch control terminal 503, and the latch circuit is used in a passing state. The drive circuit B502 outputs an on voltage or an off voltage to the output terminal Xn depending on the logic level of the output of the latch circuit. Basically, the logic input level that allows the circuit to perform a predetermined function is the old GH level (hereinafter referred to as the H level), and the logic input level that does not allow the circuit to perform the specified function is the LO- level (hereinafter referred to as the L level). shall be. The enable terminal 505 is at L level and outputs an off voltage to all output terminals Xn of the drive circuit.

Normally, the shift register circuit 504 is connected in series with a shift register circuit (not shown) of another liquid crystal panel drive IC, so that an on-voltage is applied to only one output terminal at one time during one scanning period. controlled.

Problems to be Solved by the Invention In order to clarify the problems of the conventional liquid crystal panel drive IC, an explanation will be given using FIG. 6. In recent years, in order to reduce the production backlog of active matrix LCD panels,
- A method has been proposed in which two TPTs are formed in a picture element. . The aforementioned liquid crystal panel can be made to display normally visually by separating the defective TPT from the picture element electrode using a laser or the like. Therefore, defective T
The testing method for detecting PT is important. In order to perform the above inspection at high speed, a liquid crystal panel drive IC is connected to a scanning signal line (hereinafter referred to as a gate signal line) to which the gate terminal of the TPT of the liquid crystal panel is connected, and the above IC is operated to perform the inspection. A method is proposed. FIG. 6 is an explanatory diagram of an inspection method for inspecting a liquid crystal panel using the aforementioned liquid crystal panel drive IC. In FIG. 6, TSl, ~"S4h' TM++~TM46 is T
FT, C, , -C, is a capacitor (hereinafter referred to as a capacitor) composed of a liquid crystal and a liquid crystal element electrode,
G+-Gs is a gate signal line, S1 to S1 are source signal lines, 205 to 212 are probes, 204 is a current detection means such as a picoamp meter, 202 is a voltage application means, 20
Reference numeral 1 denotes selection means for applying the voltage generated by the voltage application means 202 to any terminal connected to the probes 205 to 208 (hereinafter referred to as output terminal selection means); 20
Reference numeral 3 denotes selection means (hereinafter referred to as input terminal selection means) having the function of selecting one of the terminals to which the probes 209 to 212 are connected and connecting it to the current detection means 204;
13 is a short circuit defect between the gate signal line G and G4 (hereinafter referred to as an adjacent short); 214 is a short circuit defect that occurs at the intersection of the gate signal line G and source signal line S2 (hereinafter referred to as a cross short); 215 is a short circuit defect that occurs at the intersection of the gate signal line G and source signal line S2; Short-circuit defects between the source and drain that occur in 7M3□ of TFT (hereinafter referred to as S/D shorts) Adjacent shorts and cross-shorts are usually called line defects, and S, D:/g-t are called point defects. . Inspection of a liquid crystal panel with a redundant configuration mainly involves inspection of point defects, but it is also necessary to detect line defects and to correct those that can be corrected in order to improve manufacturing yield.

Here, a method for detecting the SD short 215, which is one of the point defects, will be explained. Controls the shift register circuit,
An on-voltage is applied only to the gate signal line G3. Then T
TSIZ of PT is turned on. Next, output selection means 2
01 and the input selection means 203, the output selection means 201 selects the source signal line Sn, and the output selection means 201 selects the source signal line Sn.
When a voltage is being applied to the current detecting means 204, the input selecting means 203 selects the source signal line Sn+1 and controls the source signal line Sn++ to be connected to the current detecting means 204. In each case, the current detection means detects whether a current flows through each source signal line Sn++. Now, the S, D short 215 has occurred, the TPT Thz is on, and a voltage is applied to the source signal line S3, and the input selection means 2
When 03 selects the source signal line S2, a current path occurs as follows: S, → S, D short 215 → TS32 → S2 → probe 210 → current detection means 204, so S, D:> iodine 215
can be detected.

However, even if an S-D short occurs in TSz□ of TFT, 7M2□ of TPT is in the on state, so S3 → T month 2□ → S-D short-S2 → probe 2
10→current detection means 204, it is impossible to determine in which direction the SD short has occurred. Therefore, conventionally, all the data in the shift register is set to the L logic level, an off voltage is applied to all gate signal lines, and then the shift register data is changed so that an on voltage is output to the gate signal lines G1 and 62. By setting and sending the data, an on-voltage is applied to the gate signal lines G2 and G3. Then, in addition to the current path due to the defect, the current flowing through the current path S, → TM□2 → TS, □ → S2 → probe 210 → current detection stage 204 is added, and the current flowing in the current detection means 2
Detected on 04. Due to the difference in the current value, the T of TPT
It can be determined that an SD short 215 has occurred in M3Z.

However, in conventional liquid crystal panel drive ICs, first, an on-voltage is applied to only one gate signal line.
When a current due to a defect is detected, the shift register is reset so that on-voltage is applied to the two gate signal lines, so the setup time takes a long time, which increases the inspection time. It had This becomes especially noticeable when the number of scanning lines is 1000 or more.

Further, if there is a line defect, the following problems arise.

First, regarding the adjacent short 213, the gate signal line G
, when an on voltage is applied to the gate signal line G4 and an off voltage is applied to the gate signal line G4, a large current flows from the gate signal line G to G4. During inspection, apply an on voltage of 1m to the 1st gate signal line.
Since the current is applied for a relatively long time of 5 ec or more, the amount of electric power generated by the above-mentioned current is large, and the liquid crystal panel drive I
This will destroy the C501 and the liquid crystal panel. Also in the case of cross short 214, when an on-voltage is applied to the gate signal line G3, a current flows toward the current detection means 204, and there is a strong possibility that the liquid crystal panel drive IC 501 and the liquid crystal panel will be destroyed. The above means that if the on-voltage is applied to the 1st gate signal line on the order of μsec, the amount of power applied will be smaller and the risk of damaging the LCD panel drive IC will be reduced, but this time it will be detected when a point defect occurs. It is difficult to measure a minute current such as the on-current of the TPT within the above-mentioned time. As described above, the conventional liquid crystal panel drive rc has a problem in that line defects destroy the IC during inspection of the liquid crystal panel and also destroy the liquid crystal panel.

Means for Solving the Problems In order to solve the above problems, a liquid crystal panel drive IC according to a first aspect of the present invention includes a bidirectional shift register circuit, a latch circuit that holds output data of the shift register circuit,
a control circuit that changes one logical output of the latch circuit at a predetermined position according to the output data of the latch circuit and a signal applied to a first external input terminal; and a control circuit that outputs a predetermined output signal according to the output data from the control circuit. The liquid crystal panel drive IC of the second aspect of the present invention includes a shift register circuit, a latch circuit that holds output data of the shift register circuit, and a positive level or negative level of the latch circuit. One front logic output of the latch circuit is changed by the output level of one of the logic outputs of the level and the signal applied to the third external input terminal, and the logic output of the front side of the latch circuit is changed by the output level and the signal applied to the fourth external input terminal. A control circuit having a function of changing one logic output after the latch circuit, a drive circuit outputting a predetermined output signal based on output data from the control circuit, and limiting an output current of the drive circuit. It is equipped with an output current limiting circuit that can

Operation The liquid crystal panel drive IC of the first aspect of the present invention can also output an on-voltage to an output terminal adjacent to an output terminal outputting an on-voltage by applying a signal to an external input terminal. Furthermore, since the shift register is a bidirectional shift register, the on-voltage application position can be moved forward or backward, and an inspection method suitable for inspecting liquid crystal panels can be carried out quickly and easily.

The second liquid crystal panel drive IC of the present invention applies a signal to the first external input terminal, thereby also applying the signal to the output terminal located adjacent to and in front of the first output terminal outputting the on-voltage. Can output on voltage. Also the second
By applying a signal to the external input terminal of the first output terminal, the on-voltage can also be outputted to the output terminal located adjacent to and behind the first output terminal outputting the on-voltage.

Therefore, an inspection method suitable for inspecting liquid crystal panels can be performed quickly and easily.

EXAMPLE Hereinafter, a liquid crystal panel drive IC according to the first aspect of the present invention will be explained with reference to the drawings. FIG. 1 is a functional block diagram of a liquid crystal panel drive IC according to the first aspect of the present invention. 1st
In the figure, 106 is a bidirectional shift register circuit;
05 is a latch circuit that holds the output data of the shift register circuit 106, 104 is a control circuit that operates when inspecting the liquid crystal panel, and 103 is a control circuit that turns on the output terminal Xn (where n is an integer) according to the output data of the control circuit 104. A drive circuit that outputs a voltage or an off-voltage; 102 an output current control circuit that limits at least one of the output current output from the drive circuit and the input sink current; 107 an external circuit for controlling the output current limit circuit; Input terminal (hereinafter referred to as current limit input terminal), 10
8 is an external input terminal for controlling the drive circuit (hereinafter referred to as an enable terminal); 109 is an external input terminal for inputting the final stage latch output data of the previous stage liquid crystal panel drive IC (hereinafter referred to as previous data input) terminal),
110 is an inspection control terminal used during inspection; by setting the terminal to H level, an on-voltage can also be output to an output terminal adjacent to an output terminal outputting an on-voltage; 111 is a latch control terminal; Input terminal, 112
- 113 is a serial data input/output terminal, 114 is a clock input terminal, 115 is an input terminal for controlling the data shift direction (hereinafter referred to as the data shift direction control input terminal), and 116 is the logic data of the final stage of the latch circuit. Output terminal for outputting (hereinafter referred to as data output terminal)
It is.

Next, the operation of the liquid crystal panel drive IC according to the first aspect of the present invention will be explained. First, serial data input terminal 112
The data applied to 113 is the clock input terminal 114
The data is read into the shift register circuit 106 by the logic signal of the data shift direction control input terminal. During normal operation, an H-level logic signal is applied to the latch control input terminal 111, and the latch circuit 105 is used in a passing state. The output of the latch circuit is connected to the test control circuit 104. During normal operation, an L-level logic signal is applied to the inspection control terminal 110, and the logic output of the Mirach circuit becomes the logic input of the direct drive circuit 103. When inspecting a liquid crystal panel, an H level or L level logic signal is input to the inspection control terminal 110. When an H level logic input is applied to the terminal 110, an H level is output. Located at the rear adjacent to the output terminal of the latch circuit. Output terminal is H
The level will be output.

Note that, when viewed from a certain position, the direction in which n of the output terminal Xn is smaller is called the front, and conversely, the direction in which n is larger is called the rear. The output of the inspection control circuit is connected to the human power of the drive circuit 103. The drive circuit 103 outputs an on voltage to an output terminal when an H level logic signal is input, and an OFF voltage to an output terminal when an L level logic signal is input.

During normal operation, the output current limiting circuit 102 inputs an L level to the current limiting input terminal 107 and outputs a current equal to or higher than a predetermined current value to the output terminal When applied, the current value can be limited to a predetermined current value or less. The current value to be limited is 50 mA or less, preferably 10 m
It is desirable to be able to achieve A or below.

More specifically, the liquid crystal panel drive IC of the first invention
In order to understand the operation, a liquid crystal panel inspection method using the liquid crystal panel drive IC of the first invention will be described.

FIG. 2 is an explanatory diagram when inspecting a liquid crystal panel using the liquid crystal panel drive IC of the present invention. When inspecting the liquid crystal panel, the output current limiting circuit 102 is operated. In addition, in the liquid crystal panel drive ICl0I, each external input terminal and output terminal Xn has protruding electrodes and a conductive bonding layer is formed on the electrodes, and IC chips are mounted directly on the liquid crystal panel using lath-on-chip technology. It will be done.

During inspection, the conductive bonding layer is in a semi-cured state (hereinafter referred to as the temporary connection state) so that the loaded drive IC chip can be reused if the inspected liquid crystal panel has a defect that cannot be corrected. . In the temporarily connected state, the drive IC chip can be easily removed using tweezers or the like. 100°C if the inspected LCD panel is good or can be repaired.
Heating is performed for 3 hours or more to fully cure the conductive bonding layer.

During inspection, the output current is limited to a predetermined value or less, so even if an adjacent short circuit 213 occurs when an on-voltage is applied to the gate signal G, the output current is
The current flowing into the circuit never exceeds a certain value. Therefore, the liquid crystal panel drive IC and the liquid crystal panel will not be destroyed. Furthermore, even if a cross short circuit 214 occurs, there is no risk that a current exceeding a certain value will flow from the gate signal line G3.

Next, a method for detecting an SD short, which is one of the point defects, will be explained. The shift register circuit 106 is controlled to apply an on-voltage only to the gate signal line G, and the on-voltage application position is sequentially moved, and the current detection means 20
In step 4, we will detect the current and perform an inspection, but here we will use S.
The description will focus only on the -D short 215. Assume that the on-voltage application position is shifted as described above and that the on-voltage is now applied only to the gate signal line G3. Next, the output selection means 201 is controlled to apply a voltage to the source signal line Sn. It also controls the input selection means 203 and selects the source signal line Sn. 1 is selected as the source signal Sn. , and the current detection means 204 can be connected to each other. The current detection means is each source signal line Sn. Detects whether current is flowing through 1. Now, an SD short 215 has occurred, TS of the TFT, □ is in the on state, and when a voltage is applied to the source signal S3 and the input selection means 203 selects the source signal line S2, S3→ Since a current path occurs such as S-D short 215 → Th2 → S2 → probe 210 → current detection means 204, S-D short 21
5 can be detected. However, T of TFT
Even if an S-D short occurs in S, □, the current is detected by the current detection means 204 in the same way.
S for either 3□ or TS3□.

It is necessary to determine whether a D short has occurred. Therefore, an H level logic signal is applied to the inspection control terminal 110. Then, an on-voltage is also output to the gate signal line G4 adjacent to the gate signal line G.

Although 7M3□ of TPT is turned on, since the SD short 215 has already occurred in TMsz of TFT, no new current path other than the above-mentioned current path is generated.

Therefore, the current value detected by the current detection means 204 does not increase. Therefore, it can be determined that this is a defect in Gate 2 of TPT. Furthermore, in order to make a more reliable decision, the data in the shift register circuit is shifted forward. In other words, the on-voltage is applied to the gate signal lines G2 and 63. In this case, a new current path is generated: S→TMtz→TSzz→S2→probe 210→current detection means 204. Therefore, the current value detected by the current detection means 204 increases significantly. Therefore, gate signal line G2
When the on-voltage is applied to and G, and the gate signal G, and G3
By comparing the current values when applying the on voltage to the gate signal lines G3 and 64, and when applying the on voltage to the gate signal lines G3 and 64,
The SD short defect position can be detected more reliably.

Hereinafter, a liquid crystal panel drive IC according to a second aspect of the present invention will be explained with reference to the drawings. FIG. 3 is a functional block diagram of the liquid crystal panel drive IC of the second invention. Third
In the figure, 304 is a shift register circuit, 302 is a control circuit operated during inspection of the liquid crystal panel, and 303 is an inspection control terminal used during inspection. By setting the terminal to H level, an output that outputs an on-voltage is shown. An on-voltage can be output to the output terminal located in front of the terminal. Other parts with the same numbers as in FIG. 1 have the same structure or content. The above also applies to other drawings.

Next, the operation of the liquid crystal panel drive IC according to the second aspect of the present invention will be explained. First, serial data input/output terminal 112
・The data applied to 113 is the clock input terminal 11
4 and the logic signal at the data shift direction control input terminal. During normal operation, an H-level logic signal is applied to the latch control input terminal 111, and the latch circuit 105 is used in a passing state.

The output of the latch circuit is connected to the test control circuit 302, and during normal operation, an L-level logic signal is applied to the test control terminals 110 and 303. Become. When testing the liquid crystal panel, an H or L level logic signal is applied to the test control terminal to change the logic signal to the drive circuit. Specifically, when an H level logic signal is applied to the test control terminal 110, an H level is output to an output terminal located adjacent to and behind the output terminal of the latch circuit that is outputting an H level.

Therefore, an on-voltage is output from the drive circuit corresponding to the output terminal. Also, H is connected to the inspection control terminal 303.
When a high level logic signal is applied, an H level is output to an output terminal located adjacent to and in front of the output terminal of the latch circuit that is outputting an H level. therefore,
An on-voltage is output from the drive circuit corresponding to the output terminal.

Below, the drive circuit 103 and the output current limiting circuit 10
The second operation is the same as the first invention, so it will be omitted.

More specifically, the liquid crystal panel drive IC of the second invention
In order to understand the operation, a method for inspecting a liquid crystal panel using the liquid crystal panel drive IC of the second invention will be described. FIG. 4 is an explanatory diagram when inspecting a liquid crystal panel using the liquid crystal panel drive IC of the present invention. The operation of the output current limiting circuit 102 during liquid crystal panel inspection is the same as in the case of the first invention. Similarly, by operating the circuit 102, damage caused by adjacent shorts 213 and cross shorts 214 can be prevented.

Next, a method for detecting an SD short, which is one of the point defects, will be explained. The shift register circuit 304 is controlled to apply an on-voltage only to the gate signal line G1, and the on-voltage application position is sequentially moved, and the current detection means 20
In step 4, we will detect the current and perform an inspection, but here we will use S.
The description will focus only on the -D short 215. Assume that the on-voltage application position is shifted as described above and that the on-voltage is now applied only to the gate signal line G. Next, the output selection means 201 is controlled to apply a voltage to the source signal line Sn. Further, the input selection means 203 is controlled to select the source signal lines Sn, . 1 and the current detection means 204 can be connected. The current detection means detects whether current is flowing through each source signal line Sn. Now, the S-D shimit 215 is occurring, the TPT TS3z is turned on, and a voltage is applied to the source signal line S, so that the input selection means 203
When the source signal line S2 is selected, a current path S3 → S-D short 215 → TS+z → S2 → probe 210 → current detection means 204 is generated, so that the S-D short 215 can be detected. . however,
T for TFT? Regardless of whether the S-D short occurs in ht or TSiz, the current is detected by the current detection means 204 in the same way, so it is possible to determine whether the S-D short occurs in TM3□ or TS12 of the TFT. Need to decide. Therefore, an H level logic signal is applied to the inspection control terminal 110. Then, the gate signal I19! adjacent to the gate signal line G! An on-voltage is also output to c4. T.P.
TS3z of T is turned on, but TS of TFT is already
Since the SD short 215 has occurred in 3z, no new current path other than the above-mentioned current path is generated. Therefore, the t current value detected by the current detection means 204 does not increase. Therefore, it can be determined that the TPT is stretched and there is a defect of 2. Further, in order to make a more reliable determination, the test control terminal 101 is set to L level and the test control terminal 303 is set to H level. Then, an on-voltage is applied to the gate signal lines G2 and G. In this case, a new current path is generated: S, → TMz□ → Thz → St → probe 210 → current detection means 204. Therefore, the current value detected by the current detection means 204 increases significantly. Therefore, by comparing the current values when the on-voltage is applied to the gate signal lines G2 and 63 and when the on-voltage is applied to the gate signal lines G and 64, the location of the S-D short defect can be more reliably determined. can be detected.

Although the liquid crystal panel drive IC of the present invention is expressed as an IC chip mounted on a liquid crystal panel, it is not limited to this. For example, if the liquid crystal display panel is formed of a polysilicon substrate or the like, the integrated circuit of the present invention may be directly formed along with the TPT around the display area.

Effects of the Invention As described above, since the liquid crystal panel drive IC of the present invention has the output current limiting circuit, there is no risk of damaging the drive IC and the liquid crystal panel even if a line defect occurs in the liquid crystal panel. Therefore, it greatly contributes to improving manufacturing yield. Furthermore, by having a test control circuit and a test control terminal, it is possible to quickly switch between turning on only one gate signal line and turning on two or more gate signal lines without using a shift register. . By using the switching function, point defects such as SD short can be detected at high speed. Therefore, the liquid crystal panel inspection time can be significantly shortened. Therefore, since it is possible to shorten the manufacturing takt time of the liquid crystal panel, the manufacturing cost can be significantly reduced.

[Brief explanation of drawings]

FIG. 1 is a functional block diagram of the first integrated circuit for liquid crystal panels of the present invention, FIG. 2 is an explanatory diagram of a liquid crystal panel inspection method using the first integrated circuit for liquid crystal panels of the present invention, and FIG. is a functional block diagram of an integrated circuit for a liquid crystal panel according to the second invention,
FIG. 4 is an explanatory diagram of a liquid crystal panel inspection method using the second integrated circuit for liquid crystal panels of the present invention, FIG. 5 is a functional block diagram of a conventional integrated circuit for liquid crystal panels, and FIG. 6 is a diagram of a conventional liquid crystal panel. FIG. 2 is an explanatory diagram of a liquid crystal panel inspection method using an integrated circuit. 101・301・501...Liquid crystal panel drive IC, 102...Output current circuit, 103.
502... Drive circuit, 104, 302...
...Inspection control circuit, 105, 503, latch circuit, 106, bidirectional shift register circuit, 107, current limit input terminal, 108,5
05... Enable terminal, 109...
Front data input terminal, 110/303...Test control terminal, 111/506...Latch control input terminal, 112/113...Serial data input/output terminal, 114/508・・・・・・clock input terminal,
115... Data shift direction control input terminal, 1
16... Data output terminal, 201, 203...
... Selection means, 202 ... Voltage application means,
204...Signal detection means, 205-212...
... Probe, 213 ... Adjacent short,
214...Cross short, 215...
・Source/drain short, 304/504...
...Shift register circuit, 507... Serial data input terminal, 509... Serial data output terminal. Name of agent: Patent attorney Shigetaka Awano Haka1 person U2 H50/--zu crystal 7-inch flannel and Ripe XC.

Claims (7)

[Claims] (1) A shift register circuit, a latch circuit that holds output data of the shift register circuit, and a logic output of the latch circuit at a predetermined position is changed by the output data of the latch circuit and a signal applied to a first external input terminal. What is claimed is: 1. An integrated circuit for driving a liquid crystal panel, comprising: a control circuit for controlling the output voltage, and a drive circuit for outputting a predetermined output signal based on output data from the control circuit. (2) The integrated circuit for driving a liquid crystal panel according to claim (1), wherein the shift register circuit is a bidirectional shift register. (3) The output stage of the drive circuit is equipped with an output current limiting circuit having an output current limiting function, and has a function of limiting the output current to a predetermined value or less by a signal applied to the second external input terminal. The integrated circuit for driving a liquid crystal panel according to claim (1). (4) The integrated circuit for driving a liquid crystal panel according to claim (1), which is mounted on a liquid crystal display panel using chip-on-glass technology. (5) Claim (3) characterized in that the output current limiting circuit is capable of limiting at least one of an output current that outputs a current to the outside and a sink current that inputs a current to the inside.
The described integrated circuit for driving a liquid crystal panel. (6) a shift register circuit, a latch circuit that holds output data of the shift register circuit, and an output level of one of the positive level or negative level logical output of the latch circuit and an applied signal to a third external input terminal. a control circuit having a function of changing one logic output at the front of the latch circuit and changing one logic output at the rear of the latch circuit according to the output level and a signal applied to a fourth external input terminal; An integrated circuit for driving a liquid crystal panel, comprising: a drive circuit that outputs a predetermined output signal based on output data from the control circuit; and an output current limiting circuit that can limit the output current of the drive circuit. (7) Claim (6) characterized in that the output current limiting circuit is capable of limiting at least one of an output current that outputs a current to the outside and a sink current that inputs a current to the inside.
The described integrated circuit for driving a liquid crystal panel.