JPH0223599A - Redundancy system for semiconductor device - Google Patents

Redundancy system for semiconductor device

Info

Publication number
JPH0223599A
JPH0223599A JP63174010A JP17401088A JPH0223599A JP H0223599 A JPH0223599 A JP H0223599A JP 63174010 A JP63174010 A JP 63174010A JP 17401088 A JP17401088 A JP 17401088A JP H0223599 A JPH0223599 A JP H0223599A
Authority
JP
Japan
Prior art keywords
bit line
inverse
faulty
bit
line pairs
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63174010A
Other languages
Japanese (ja)
Inventor
Yukinobu Adachi
安達 幸信
Hideji Miyatake
秀司 宮武
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63174010A priority Critical patent/JPH0223599A/en
Publication of JPH0223599A publication Critical patent/JPH0223599A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To make the distance between a fault bit and normal bit larger by relieving the adjacent bit line pairs of the bit line pair in which the faulty bit occurs. CONSTITUTION:When a faulty point A occurs in a bit line pair B and the inverse of B connected with a sense amplifier, the adjacent bit line pairs B and the inverse of B on both sides of the faulty bit line pairs B and the inverse of B in which the faulty point A occurs are relived together with the faulty bit line pairs B and the inverse of B. Therefore, the distances between the faulty bit line B and the inverse of B and normal bit line pairs B and the inverse of B become larger and adverse influences from the faulty bit line pair B and the inverse of B to the normal bit line pairs B and the inverse of B can be reduced.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は半導体装置の冗長方式に関するものである。[Detailed description of the invention] [Industrial application field] The present invention relates to a redundancy system for semiconductor devices.

〔従来の技術〕[Conventional technology]

第2図は従来の半導体装置の冗長方式を示す図である。 FIG. 2 is a diagram showing a conventional redundancy system for semiconductor devices.

この図におけるAのポイント、いわばあるビット線ペア
で不良を起こした場合、そのビット線ペアのみを救済す
るようになっている。
Point A in this figure, so to speak, when a failure occurs in a certain bit line pair, only that bit line pair is repaired.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上記のよう々従来の冗長方式で汀、不良を起こし九ビッ
ト線ペアのみを救済するために、特に高集積化の進んだ
半導体装置(ビット線間の距離が短かい)においては、
不良ビットの正常ビットに対する影響というものが無視
できなくなってきた。
As mentioned above, in order to repair only 9 bit line pairs due to failure in the conventional redundancy system, especially in highly integrated semiconductor devices (the distance between bit lines is short),
The influence of defective bits on normal bits can no longer be ignored.

具体例を、第3図に示す。あるビット線で、リークを生
じた場合(図中人のポイント)、ソの不良ビット線ペア
の冗長を行なってもその隣りのビット線に対し影響を及
ぼすのである。それによって1図に示すように、パター
ン依存性が変化する。Aのポイント(Bs)でリークを
生じ、ハイレベルになるべきものがロウレベルに変わっ
たとすれば、BSは百1、のロウレベルを助け、それに
よってハイレベのB3 が受ける影響は、従来より厳し
くなる。このように従来の半導体装置の冗長方式では、
パターン依存性が変わることが十分に考えられる。
A specific example is shown in FIG. If a leak occurs in a certain bit line (the point shown by the person in the figure), even if the defective bit line pair is redundant, the adjacent bit line will be affected. As a result, the pattern dependence changes as shown in Figure 1. If a leak occurs at point A (Bs) and what should be a high level changes to a low level, BS will help the low level of 101, and the effect on the high level B3 will be more severe than before. In this way, in the conventional semiconductor device redundancy system,
It is quite conceivable that the pattern dependence will change.

この発明は、かかる間型を解決するために、不良を起こ
したビット線ペアの両どなりのビット線ペアも置き換え
る冗長方式を採用することで、不良ビット環とそのとな
りの正常ビット線の距離を稼ぎ、かかる影響を無視でき
る半導体装置の冗長方式を得ること金目的とする・〔課
題を解決するための手段〕 この発明にかかる冗長方式は、不良を起こし九ビットa
ペアの両どなりのビットaペアも救済する。
In order to solve this problem, the present invention employs a redundancy method that also replaces the bit line pairs on either side of the defective bit line pair, thereby reducing the distance between the defective bit ring and the normal bit line next to it. [Means for Solving the Problem] The redundancy method according to the present invention is designed to provide a redundancy system for semiconductor devices that can ignore such effects.
The bit a pair on both sides of the pair is also rescued.

〔作用〕[Effect]

この発明においては、不良を起こし九ビット線ペアの両
どなりのビット線ペアも重き換える事で、不良ビットを
正常ビット間の距離が稼げ。
In this invention, the distance between the defective bit and the normal bit can be increased by changing the weight of the bit line pairs on either side of the nine bit line pair when a defect occurs.

不良ビットからの正常ビットへの影響というのは、無視
できるようになる。
The influence of defective bits on normal bits can now be ignored.

C実施列〕 第1図は、この発明の冗長方式を示す図である。図にお
いて、Aのポイントで不良?起こし九場合に、その両ど
な9のビット線ペアも救済することにより、正常ビット
までの距離を稼ぎ、不良ビットからのll’lを小さく
するのである。
C Implementation Column] FIG. 1 is a diagram showing the redundancy system of the present invention. In the diagram, is there a defect at point A? In this case, by repairing both bit line pairs, the distance to the normal bit is increased and the distance from the defective bit is reduced.

〔発明の効果〕〔Effect of the invention〕

この発明は、以上説明し虎とおり、不良を起こしたビッ
ト線ペアの両どなりのビット線も救済することにより、
不良ビットから正常ビットに対する影響というものが小
きくできる。
As explained above, this invention can also repair bit lines on either side of a defective bit line pair.
The influence of defective bits on normal bits can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この発明の一実施例による半導体装置の冗長
方式を示す図、第2図は従来の半導体装置の冗長方式を
示す図、第8図は従来の半導体装置の冗長方式の問題点
を示す図である。
FIG. 1 is a diagram showing a redundancy system of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a diagram showing a conventional redundancy system of a semiconductor device, and FIG. 8 is a diagram showing problems of the conventional redundancy system of a semiconductor device. FIG.

Claims (1)

【特許請求の範囲】[Claims] 不良発生したビット線ペアの両どなりのビット線も救済
することを特徴とする半導体装置の冗長方式。
A redundancy system for a semiconductor device characterized by repairing bit lines on both sides of a bit line pair in which a defect has occurred.
JP63174010A 1988-07-12 1988-07-12 Redundancy system for semiconductor device Pending JPH0223599A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63174010A JPH0223599A (en) 1988-07-12 1988-07-12 Redundancy system for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63174010A JPH0223599A (en) 1988-07-12 1988-07-12 Redundancy system for semiconductor device

Publications (1)

Publication Number Publication Date
JPH0223599A true JPH0223599A (en) 1990-01-25

Family

ID=15971064

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63174010A Pending JPH0223599A (en) 1988-07-12 1988-07-12 Redundancy system for semiconductor device

Country Status (1)

Country Link
JP (1) JPH0223599A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05242693A (en) * 1992-02-28 1993-09-21 Mitsubishi Electric Corp Semiconductor storage device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05242693A (en) * 1992-02-28 1993-09-21 Mitsubishi Electric Corp Semiconductor storage device

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