JPH02234503A - Power amplifier - Google Patents

Power amplifier

Info

Publication number
JPH02234503A
JPH02234503A JP5460789A JP5460789A JPH02234503A JP H02234503 A JPH02234503 A JP H02234503A JP 5460789 A JP5460789 A JP 5460789A JP 5460789 A JP5460789 A JP 5460789A JP H02234503 A JPH02234503 A JP H02234503A
Authority
JP
Japan
Prior art keywords
circuit
power
power amplifier
output
amplifier circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5460789A
Other languages
Japanese (ja)
Inventor
Haruhiko Yura
晴彦 由良
Kiyomi Kawamura
清美 河村
Tsutomu Sato
務 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP5460789A priority Critical patent/JPH02234503A/en
Publication of JPH02234503A publication Critical patent/JPH02234503A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To keep the linearity at power amplification in an excellent way almost without deteriorating the power efficiency by applying power amplification with a power amplifier circuit of the pulse width modulation(PWM) system at a high output, applying power amplification with a power amplifier circuit having a good linearity at a high output, matching the phases of the both and outputting the result additively. CONSTITUTION:A voice signal Vin from a signal source 21 is inputted to an output system selection circuit 22. The selection circuit 22 compares a voltage level of an input signal with a reference level, selects and operates a 1st system when the input level is the reference level or over and selects and operates a 2nd system when the input level is the reference level or below, and in the case of selecting the 1st system, a voice signal is amplified for the power with a PWM system power amplifier circuit comprising a PWM circuit 23, a pulse amplifier circuit 24 and a low pass filter 25. On the other hand, when the 2nd system is selected, the voice signal is retarded for a prescribed time by a delay circuit 27 and amplified linearly by a linear power amplifier circuit 28. After the power amplifier outputs of both the systems are made unilateral by diodes 26, 29 respectively, added by an adder section 30 and the result is outputted via an output terminal 31.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) この発明は、例えば中波用あるいは短波用放送機の音声
信号変調増幅器に用いられる電力増゛幅器に戻する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the invention] (Industrial field of application) The present invention returns to a power amplifier used, for example, in an audio signal modulation amplifier of a medium wave or short wave broadcaster.

(従来の技術) 一般に、放送機の変調増幅器に用いられる音声増幅用電
力増幅器は、電源効率のよいことが要求されるため、真
空管式の直線電力増幅器からPWM(パルス幅変調)方
式の電力増幅器に移行されつつある。このPWM方式の
電力増幅器は、放送機の振幅変調の変調度が100%ま
で直線的であ−ることが要求されるだけでなく、出力電
圧Ovからの直線性をも要求される。従来のPWM方式
電力増幅器は、第5図に示すように、信号源11からの
跨声信号をPWM回路!2でパルス幅変調した後、パル
ス増幅器I3にて電力増幅し、さらにローパスフィルタ
l4で不要な周波数成分を除去して出力するようにした
ものである。
(Prior Art) In general, power amplifiers for audio amplification used in modulation amplifiers of broadcasting equipment are required to have good power supply efficiency, so they range from vacuum tube type linear power amplifiers to PWM (pulse width modulation) type power amplifiers. is being transitioned to. This PWM type power amplifier is not only required to have a linear modulation degree of amplitude modulation of the broadcasting device up to 100%, but also required to have linearity from the output voltage Ov. As shown in FIG. 5, the conventional PWM power amplifier converts the straddle signal from the signal source 11 into the PWM circuit! After pulse width modulation in Step 2, power is amplified in a pulse amplifier I3, unnecessary frequency components are removed in a low pass filter I4, and the result is output.

ところが、このPWM方式では、原理的に低レベルでの
直線性が悪く、そのパルス幅対出力電圧特性は一般的に
第6図に示すようになり、パルス幅がOに近いところで
は直線に,はなっていない。
However, in principle, this PWM method has poor linearity at low levels, and the pulse width vs. output voltage characteristic generally becomes as shown in Figure 6, where the pulse width is close to O, it becomes a straight line, It's not.

この非直線性は無視できないほど大きく、この増幅器に
例えば負ピーク値がOvの正弦波を入力すると、出力波
形に第7図に示すような歪みを生じてしまう。このまま
実用に供すると、従来の真空管式の直線電力増幅器を使
用した電力増幅器と比べて、特性上見劣りがする欠点が
あった。
This non-linearity is so large that it cannot be ignored, and when a sine wave with a negative peak value of Ov is input to this amplifier, for example, distortion as shown in FIG. 7 will occur in the output waveform. If put into practical use as is, it would have the disadvantage of inferior characteristics compared to a power amplifier using a conventional vacuum tube type linear power amplifier.

(発明が解決しようとする課題) 以上述べたように従来のPWM方式による電力増幅器で
は、電源効率は良いが直線性が悪いという問題があった
(Problems to be Solved by the Invention) As described above, the conventional power amplifier using the PWM method has a problem of good power supply efficiency but poor linearity.

この発明は上記の問題を解決するためになされたもので
、電源効率の低下を最少限に止どめながら、良好な直線
性を得ることのできる電力増幅器を提供することを目的
とする。
The present invention was made to solve the above problems, and an object of the present invention is to provide a power amplifier that can obtain good linearity while minimizing a decrease in power supply efficiency.

[発明の目的] (課題を解決するための手段) 上記目的を達成するためにこの発明に係る電力増幅器は
、第1の系統に設けられ、入力信号をパルス幅変調方式
によって電力増幅する第1の電力増幅回路と、この第1
の電力増幅回路の出力を単方向化する第1の単方向化手
段と、第2の系統に設けられ、前記入力信号を直線的に
増幅する第2の増幅回路と、この第2の増幅回路の出力
を単方向化する第2の単方向化手段と、前記第2の系統
に設けられ、入力信号を遅延出力する遅延回路と、前記
第1及び第2の系統の各出力信号を加算出力する加算回
路と、前記入力信号のレベルが基準値以上のとき前記第
1の系統の第1の電力増幅回路を、基準値以下のとき前
記第2の系統の第2の電力増幅回路を実質的に動作させ
る選択手段とを具備して構成される。
[Object of the Invention] (Means for Solving the Problems) In order to achieve the above object, a power amplifier according to the present invention is provided in a first system, and a first power amplifier that amplifies the power of an input signal by a pulse width modulation method. and this first power amplifier circuit.
a first unidirectional means for unidirectionalizing the output of the power amplifying circuit; a second amplifying circuit provided in a second system and linearly amplifying the input signal; and the second amplifying circuit. a second unidirectional means for unidirectionalizing the output of the second system; a delay circuit provided in the second system for delaying and outputting the input signal; and outputting a sum of the output signals of the first and second systems. a first power amplifier circuit of the first system when the level of the input signal is above a reference value, and a second power amplifier circuit of the second system when the level of the input signal is below the reference value; and a selection means for operating.

(作用) 上記構成による電力増幅器は、第1の系統にPWM方式
の第1の電力増幅回路を、第2の系統に直線性に優れた
増幅回路を設け、第1の増幅回路の非直線性が顕著に現
われるレベル以下では第2の系統で電力増幅し、そのレ
ベル以上では第2の系統で電力増幅し、両者を加算して
出力するようにしている。
(Function) The power amplifier with the above configuration is provided with a PWM type first power amplifier circuit in the first system, an amplifier circuit with excellent linearity in the second system, and a non-linearity of the first amplifier circuit. Below the level at which the signal appears conspicuously, the power is amplified in the second system, and above that level, the second system amplifies the power, and the two are added together and output.

(実施例) 以下、第1図乃至第4図を参照してこの発明の一実施例
を説明する。
(Embodiment) An embodiment of the present invention will be described below with reference to FIGS. 1 to 4.

第1図はその構成を示すもので、信号源21がらの音声
信号Vlnは出力系統選択回路22に人力される。この
選択回路22は入力信号の電圧レベルと基準レベルとを
比較し、人力レベルが基準レベル以上のとき第1の系統
を、基準レベル以下のとき第2の系統を選択して動作さ
せるもので、ここで第1の系統が選択された場合、音声
信号はPWM回路23、/<ルス増幅回路24及びロー
バスフィルタ25からなるPWM方式の電力増幅回路で
電力増幅される。一方、第2の系統が選択された場合、
音声信号は遅延回路27で一定時間遅延され、直線電力
増幅回路28で直線増幅される。各系統の電力増幅出力
はそれぞれダイオード26. 29で単方向化された後
、加算部30で加算され、出力端子3lを介して出力さ
れる。
FIG. 1 shows its configuration, in which the audio signal Vln from the signal source 21 is input manually to the output system selection circuit 22. This selection circuit 22 compares the voltage level of the input signal with a reference level, selects and operates the first system when the human power level is above the reference level, and selects the second system when it is below the reference level. When the first system is selected here, the audio signal is power amplified by a PWM type power amplification circuit comprising a PWM circuit 23, a Luz amplification circuit 24, and a low-pass filter 25. On the other hand, if the second system is selected,
The audio signal is delayed for a certain period of time by a delay circuit 27 and linearly amplified by a linear power amplification circuit 28. The power amplification output of each system is connected to a diode 26. After being made unidirectional in step 29, the signals are added in addition section 30 and outputted via output terminal 3l.

上記出力系統選択回路22は、具体的には第2図あるい
は第3図に示す構成が考えられる。第2図の回路は、各
系統には音声信号V1nをそのまま供給し、第2の系統
入力部から音声信号Vinを取出してコンパレータ22
2に人力し、このコンパレータ222で基lIIfIS
圧源221の出力レベルV rarと比較する。そして
、コンバレータ222の出力をPWM回路23とパルス
増幅回路24との間に介在させたスイッチ223に与え
、VIn≦V rerのときスイッチ223を閉じてP
WM回路23の出力を遮断するように構成したものであ
る。
Specifically, the output system selection circuit 22 may have a configuration shown in FIG. 2 or 3. The circuit shown in FIG. 2 supplies the audio signal V1n to each system as it is, takes out the audio signal Vin from the second system input section, and outputs the audio signal Vin to the comparator 22.
2, and this comparator 222
It is compared with the output level V rar of the pressure source 221. Then, the output of the converter 222 is applied to a switch 223 interposed between the PWM circuit 23 and the pulse amplification circuit 24, and when VIn≦V rer, the switch 223 is closed and P
The configuration is such that the output of the WM circuit 23 is cut off.

一方、第3図に示す回路は、第2の系統には音声信号V
lnをそのまま供給し、第1の系統には前置補償増幅回
路224を介してPWM回路23に洪給するようにした
ものである。第4図は人力音声信号Vlnを前置補償増
幅回路224によって低レベル入力での利得を下げて入
出力特性を示したものである。尚、第2図に示す構成よ
り第3図に示す構成の方が、回路は複雑になるが後の系
統出力間のつながりをスムーズにすることができる。
On the other hand, the circuit shown in FIG. 3 has an audio signal V in the second system.
ln is supplied as is, and is supplied to the PWM circuit 23 via a precompensation amplifier circuit 224 to the first system. FIG. 4 shows the input/output characteristics of the human voice signal Vln with the gain at low level input lowered by the precompensation amplifier circuit 224. The configuration shown in FIG. 3 has a more complex circuit than the configuration shown in FIG. 2, but the connection between the system outputs can be made smooth later.

また、高レベル入力時に直線電力増幅回路28の出力を
遮断しないと電源高率上の不利が生じるが、これは前記
直線電力増幅回路28の最大出力電圧を、総合としての
本発明の電力増幅器の直線を得るのに必要な最少限の電
圧に押さえた設計として、高レベル入力時に直線電力増
幅回路28が飽和し、第1の系統の出力電圧より第2の
系統の出力電圧が低い状態を実現すれば、出力単方向化
のためのダイオード29により、直ITfS力増幅回路
28が自動的に遮断されたのと等価になる。これら直線
電力増幅回路28の遮断に関しては、出力系統選択回路
が第2図に示すものであっても第3図に示すものであっ
ても変わるところはない。
Furthermore, if the output of the linear power amplifier circuit 28 is not shut off during high-level input, there will be a disadvantage in terms of power supply efficiency. As the design suppresses the voltage to the minimum required to obtain a straight line, the linear power amplifier circuit 28 saturates when a high level input occurs, and the output voltage of the second system is lower than the output voltage of the first system. This is equivalent to automatically cutting off the direct ITfS force amplification circuit 28 by the diode 29 for making the output unidirectional. Regarding the interruption of these linear power amplifier circuits 28, there is no difference whether the output system selection circuit is the one shown in FIG. 2 or the one shown in FIG.

上記遅延回路27は第1の系統出力と第2の系統出力の
各位相を加算部30で一致させるためのもので、ローパ
スフィルタ25以外の各回路の遅延時間が無視できる程
度に短い場合(通常の設計ではたいてい短くできる)に
は、例えばローパスフィルタ25と同じ伝達関数を持つ
小信号用ローバスフィルタ(例えばアクティブフィルタ
、LCフィルタ等)を組めばよい。また、各系統間の位
相差が問題にならない程度に小さい場合には省略しても
よいものである。
The delay circuit 27 is used to match each phase of the first system output and the second system output in the adder 30, and when the delay time of each circuit other than the low-pass filter 25 is short enough to be ignored (usually For example, a small-signal low-pass filter (for example, an active filter, an LC filter, etc.) having the same transfer function as the low-pass filter 25 may be assembled. Further, it may be omitted if the phase difference between each system is small enough to not cause a problem.

上記直線電力増幅回路28は低レベル入力で優れた直線
性を持つもので、必要な電力を供給することができ、こ
れによる電源効率の低下が許容範囲内のものであればど
のようなものでもよい。単方向化用のダイオード28.
 29は一方の系統出力が加算部30を介して他の系統
に入り込まないようにするためのものであり、また前述
のようにダイオード29は高レベル人力時に直線電力増
幅回路28の出力を遮断する機能を合わせ持つ。但し、
ダイオードの使用を強制するものではなく、例えばダイ
オードの電圧降下が問題となるような用途では音声入力
電圧によりオン・オフ制御するトランジスタ、サイリス
タ、FET等の能動素子に置換えても一向に差支えない
The linear power amplifier circuit 28 has excellent linearity at low level inputs, can supply the necessary power, and can be any type of circuit as long as the resulting reduction in power supply efficiency is within an acceptable range. good. Unidirectional diode 28.
29 is for preventing the output of one system from entering the other system via the adder 30, and as mentioned above, the diode 29 cuts off the output of the linear power amplifier circuit 28 during high-level human power. It has both functions. however,
The use of diodes is not mandatory; for example, in applications where voltage drop across diodes is a problem, there is no problem in replacing them with active elements such as transistors, thyristors, and FETs that are controlled on and off by audio input voltage.

上記加算部30はトランス等を用いて各系統を加算する
ことも考えられるが、第1図に示すように単純に線を接
続しただけのワイヤードOR回路でその目的を充分達成
できるものである。
Although it is conceivable that the adding section 30 adds up each system using a transformer or the like, the purpose can be sufficiently achieved with a wired OR circuit simply connecting lines as shown in FIG.

すなわち、上記の回路において、良く設計されたPWM
方式の電力増幅回路でも非直線性が顕著に現われるのは
デューティ比が10%を割るあたりからである。この部
分は、電力として考えれば総出力の1%にも満たない僅
かな部分である。この部分の出力電力を主たるPWM方
式で電力増幅を行わずに他の直線電力増幅回路28で電
力増幅すれば良好な直線性を得ることができる。また、
この直線電力増幅回路28の電力効率を低めに見積もっ
て50%ととし、常に総出力電力の1%をこのti線電
力増幅回路28が受持ったとしても、総合電源効率の低
下は1%以下に収まる。実際には、PWM方式の電力増
幅回路のデューティ比が10%以下で動作する時間は、
音声信号増幅では極わずかであるため、総合電源効率の
低下はほとんどないといってよい程度である。
That is, in the above circuit, a well-designed PWM
Even in this type of power amplification circuit, nonlinearity becomes noticeable when the duty ratio falls below 10%. This portion is a small portion, less than 1% of the total output, when considered as electric power. Good linearity can be obtained by amplifying the output power of this portion using another linear power amplification circuit 28 without performing power amplification using the main PWM method. Also,
Even if the power efficiency of this linear power amplifier circuit 28 is conservatively estimated at 50% and this ti-line power amplifier circuit 28 always takes over 1% of the total output power, the overall power supply efficiency will decrease by 1% or less. fits in. In reality, the time that a PWM power amplifier circuit operates with a duty ratio of 10% or less is:
Since this is extremely small in audio signal amplification, it can be said that there is almost no decrease in overall power supply efficiency.

したがって、上記構成による電力増幅器は、高出力時に
はPWM方式の電力増幅回路を、低出力時には直線性の
よい電力増幅回路で電力増幅を行い、両者の位相合せを
行なって加算出力するようにしているので、ほとんど電
源効率を下げることなく電力増幅時の直線性を良好に保
持することができる。尚、この発明は上記実施例に限ら
ず、その要旨を変更しない範囲で種々変形してもよいこ
と゛は勿論である。
Therefore, the power amplifier with the above configuration performs power amplification using a PWM type power amplification circuit when the output is high, and a power amplification circuit with good linearity when the output is low, and performs phase matching between the two to output a summed output. Therefore, linearity during power amplification can be maintained well with almost no reduction in power supply efficiency. It goes without saying that the present invention is not limited to the embodiments described above, and may be modified in various ways without changing the gist thereof.

〔発明の効果] 以上のようにこの発明によれば、電源効率の低下を最少
限に止どめながら、良好な直線性を得ることのできる電
力増幅器を提供することができる。
[Effects of the Invention] As described above, according to the present invention, it is possible to provide a power amplifier that can obtain good linearity while minimizing a decrease in power supply efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明に係る電力増幅器の一実施例の全体構
成を示すブロック回路図、第2図及び第3図はそれぞれ
同実施例の出力系統選択回路の具体的な構成を示すブロ
ック回路図、第4図は第3図の回路を用いた場合のPW
M方式電力増幅回路の入出力特性図、第5図はPWM方
式の電力増幅器の構成を示すブロック回路図、第6図は
第5図に示す電力増幅器のPWMパルス幅対出力電圧特
性を示す図、第7図は第6図に示す特性を持つ電力増幅
器に正弦波信号を入力したときOV付近で歪みを生じる
様子を示す波形図である。 2l・・・信号源、22・・・出力系統選択回路、22
1コンバレータ、222・・・基準電圧源、223・・
・スイッチ、23・・・PWM回路、24・・・パルス
増幅回路、25・・・ローパスフィルタ、26. 29
・・・単方向化用ダイオード、28・・・遅延回路、2
9・・・直線電力増幅回路、80・・・加算部、3l・
・・出力端子、Vln・・・音声信号。
FIG. 1 is a block circuit diagram showing the overall configuration of an embodiment of a power amplifier according to the present invention, and FIGS. 2 and 3 are block circuit diagrams showing the specific configuration of an output system selection circuit of the same embodiment, respectively. , Figure 4 shows the PW when using the circuit shown in Figure 3.
FIG. 5 is a block circuit diagram showing the configuration of a PWM power amplifier; FIG. 6 is a diagram showing the PWM pulse width vs. output voltage characteristic of the power amplifier shown in FIG. 5. , FIG. 7 is a waveform diagram showing how distortion occurs near OV when a sine wave signal is input to the power amplifier having the characteristics shown in FIG. 2l... Signal source, 22... Output system selection circuit, 22
1 converter, 222... reference voltage source, 223...
- Switch, 23...PWM circuit, 24...Pulse amplification circuit, 25...Low pass filter, 26. 29
...Unidirectional diode, 28...Delay circuit, 2
9... Linear power amplifier circuit, 80... Addition section, 3l.
...Output terminal, Vln...Audio signal.

Claims (1)

【特許請求の範囲】[Claims] 第1の系統に設けられ、入力信号をパルス幅変調方式に
よって電力増幅する第1の電力増幅回路と、この第1の
電力増幅回路の出力を単方向化する第1の単方向化手段
と、第2の系統に設けられ、前記入力信号を直線的に増
幅する第2の増幅回路と、この第2の増幅回路の出力を
単方向化する第2の単方向化手段と、前記第2の系統に
設けられ、入力信号を遅延出力する遅延回路と、前記第
1及び第2の系統の各出力信号を加算出力する加算回路
と、前記入力信号のレベルが基準値以上のとき前記第1
の系統の第1の電力増幅回路を、基準値以下のとき前記
第2の系統の第2の電力増幅回路を実質的に動作させる
選択手段とを具備することを特徴とする電力増幅器。
a first power amplification circuit provided in the first system and amplifying power of an input signal using a pulse width modulation method; and first unidirectionalization means for unidirectionalizing the output of the first power amplification circuit; a second amplifier circuit provided in a second system and linearly amplifying the input signal; a second unidirectional means for unidirectionalizing the output of the second amplifier circuit; a delay circuit which is provided in the system and delays and outputs the input signal; an adder circuit which adds and outputs each output signal of the first and second systems; and when the level of the input signal is equal to or higher than a reference value, the first
A power amplifier comprising a selection means for substantially operating a first power amplifying circuit of the second system when the first power amplifying circuit of the system is equal to or less than a reference value.
JP5460789A 1989-03-07 1989-03-07 Power amplifier Pending JPH02234503A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5460789A JPH02234503A (en) 1989-03-07 1989-03-07 Power amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5460789A JPH02234503A (en) 1989-03-07 1989-03-07 Power amplifier

Publications (1)

Publication Number Publication Date
JPH02234503A true JPH02234503A (en) 1990-09-17

Family

ID=12975425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5460789A Pending JPH02234503A (en) 1989-03-07 1989-03-07 Power amplifier

Country Status (1)

Country Link
JP (1) JPH02234503A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002539660A (en) * 1999-03-09 2002-11-19 トリパス テクノロジー インコーポレイテッド Method and apparatus for noise shaping of mixed signal output
JP2003069351A (en) * 2001-08-29 2003-03-07 Yokogawa Analytical Systems Inc High frequency amplifier circuit and drive method of the high frequency amplifier circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58175308A (en) * 1982-01-26 1983-10-14 Yokogawa Hewlett Packard Ltd Multiplex mode amplifier
JPS593612B2 (en) * 1976-11-15 1984-01-25 松下電工株式会社 How to prevent panel unevenness

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS593612B2 (en) * 1976-11-15 1984-01-25 松下電工株式会社 How to prevent panel unevenness
JPS58175308A (en) * 1982-01-26 1983-10-14 Yokogawa Hewlett Packard Ltd Multiplex mode amplifier

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002539660A (en) * 1999-03-09 2002-11-19 トリパス テクノロジー インコーポレイテッド Method and apparatus for noise shaping of mixed signal output
JP2003069351A (en) * 2001-08-29 2003-03-07 Yokogawa Analytical Systems Inc High frequency amplifier circuit and drive method of the high frequency amplifier circuit

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