JPH02227687A - Coherent side lobe canceler - Google Patents

Abstract

PURPOSE:To suppress a clutter and a disturbing signal in a clutter area by performing CSLC(digital type coherent side lobe canceler) processing for a signal after clutter suppression processing as to main and subordinate antenna received signals. CONSTITUTION:A main receiver 3 and subordinate receivers 4-1 - 4-N are connected to a main antenna 1 and subordinate antennas 2-1 - 2-N and respective received signals are amplified and detected. Then a radar video signal is converted into a complex digital signal by A/D converters 5, 5-1 - 5-N and clutter suppressors 15, 15-1 - 15-N and clutter suppression processing is carried out. The correlative arithmetic processing 12 of the output is carried out and weight coefficients are calculated 13 respectively. The outputs of the suppressors 15, 15-1 - 15-N are delayed by delay times 6, 6-1 - 6-N corresponding to the correlation and weighting arithmetic processing and multiplied 10, 10-1 - 10-N by the weight coefficients, and the results are added together by an adder 14. Thus, the CSLC processing of only the presence part of the disturbing signal is carried out.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention is directed to a side rope canceller (5lde Lobe C, ja
= cellular (hereinafter referred to as SLC), especially digital methods using digital signal processing technology%
Formula% 5ide Lobs Canccler: Hereinafter C3L
(described as C).

(Prior Art) SLC technology in radar equipment has a main antenna and a sub antenna that forms a beam with a wide beam width that covers the side lobes of the main antenna, and performs correlation processing between the main antenna reception signal and the sub antenna reception signal. by converting the interference signal received by the sub antenna into a signal that cancels the interference signal component in the main antenna reception signal, and by combining the converted sub antenna reception signal and the main antenna reception signal. This is a technology that suppresses interference signals received through side lobes. Conventionally, as for a digital C3LC using digital signal processing technology, a C3LC disclosed in the published patent publication "Sho 60-883?5J" has been proposed.

An example of a conventional digital C9LC having one sub antenna will be described below with reference to the drawings.

FIG. 8 is a configuration diagram of a conventional C5LC (one sub antenna), where l is the main antenna, 2-1 forms a wide beam that covers the side ropes of the main antenna 1, and A sub antenna with a gain equivalent to the rope gain; 3 is a main receiver that amplifies and detects the signal received by the main antenna 1 and outputs a radar video signal; 4-1 amplifies the signal received by the sub antenna 2-1; - The sub receivers 5 and 5-1 detect and output radar video signals, and A converts each radar video signal output from the main receiver 3 and sub receiver 4-1 into a discrete complex digital signal. /D converter, 6 and 6-
1 is a delay device that stores a complex digital signal in a memory and reads it out after a predetermined time and outputs it; 7 is a delay device that stores a complex digital signal in the memory and reads it out after a predetermined time; 8 is a clutter determiner that determines a clutter area; 9 is a weighting coefficient calculator that calculates a complex weighting coefficient based on the output signal of the correlation processor 7; 10 −■
A multiplier 11 multiplies the received signal of the sub antenna 2-1 (complex digital signal output from the delay device 6-1) by a complex weighting coefficient; ) and the received signal of the sub antenna 2-1 (complex digital signal output from multiplier !O-1).

The main antenna 1 receives reflected echoes from aircraft etc. (Tar-Ie).
t Itchs: Hereinafter referred to as target signal), reflected echoes from mountains, sea surfaces, rain clouds, etc.
1 chocs (hereinafter referred to as a clutter signal) and an interference signal, and the received signal is amplified and detected by the main receiver 3, and a radar video signal is output.

The radar video signal is input to the A/D converter 5, where it is converted from an analog signal to a digital signal, and a complex digital signal is output. Since the gain of the sub antenna 2-1 is equivalent to the side lobe gain of the main antenna 1, the sub antenna 2-1 receives the interference signal at a reception level equivalent to the interference signal reception level of the side lobe reception of the main antenna 1, and The clutter signal is received at a reception level that is much lower (for example, 20 to 30 dB lower) than the clutter reception level of rope reception. The received signal is amplified and detected by the sub-receiver 4-1 and a radar video signal is output, and the A/D converter 5-1 outputs the radar video signal.
1, the analog signal is converted into a digital signal, and a complex digital signal is output. Each complex digital signal output from the A/D converters 5 and 5-1 is input to a correlation calculation processor 7 and subjected to correlation calculation processing. The correlation calculation process is a discrete correlation calculation process using a predetermined number of samples of discrete signals from the input signal, and is a discrete correlation calculation process between the received signal of the main antenna 1 and the received signal of the sub antenna 2-1. Correlation - (Discrete ('rosy-Cor
relationship) and the discrete auto-correlation (Dis-create Auto-Co relationship) of the received signal of the sub antenna 2-1.
rrrelation) is performed by the cross-correlation circuit 7.
1 and autocorrelation circuit 72. A predetermined number of samples of discrete signals used in the correlation calculation process are selected from signals outside the clutter region. This control is performed based on the clutter area signal from the clutter determiner 8.

The clutter determiner 8 determines a clutter area based on the signal input from the A/D converter 5, and outputs a clutter area signal. A discrete cross-correlation signal (hereinafter referred to as a DCC signal) and a discrete autocorrelation signal (hereinafter referred to as a DAC signal) are input to a weighting coefficient calculator 9 for calculating a complex weighting coefficient.

Theoretically, the optimal weighting coefficient (Wopt) for maximally suppressing the interference signal received by the side ropes of the main antenna 1 is WOPτ=μΦ−! It is known that μ is a proportionality constant, Φ-1 is the inverse matrix of the input signal covariance matrix Φ, and S is called a steering vector. In C5LC of a radar device, The conventional example described above (i.e., the secondary antenna is 1
example), if the proportionality constant μ is appropriately selected so that the weighting coefficient (WM) for the received signal of the main aerial Ill is set to 1, the optimal weighting coefficient (Wopt
) is determined by Wopy = (DCC signal) ÷ (DAC signal). Therefore, in the weighting coefficient calculator 9,
The division circuit 91 performs arithmetic processing to divide the DCC signal by the DAC signal to calculate a complex weighting coefficient (Ws). It takes a predetermined time to calculate this complex weighting coefficient (Ws), and each complex digital signal output from the A/D converter 5 and 5-1 is delayed by this predetermined time to adjust the time. Therefore, in the delay devices 6 and 6-1, each complex digital signal is stored in memory and read out and output after a predetermined time. Delay device 6-! The output complex digital signal of 0 is input to the multiplier 10-1.
In the multiplier 10-1, the complex digital signal is multiplied by a complex weighting coefficient (Ws). That is, by multiplying the complex weighting coefficient (Ws), the sub antenna 2
-1 received interference signal is converted into a signal having predetermined characteristics that cancels out the interference signal component in the received signal of main antenna l. The complex digital signal output from the delay device 6 and the complex digital signal output from the multiplier 10-1 are sent to the adder 1.
1 is input.

In the adder 11, the received signal of the main antenna 1 (delay unit 6
output signal) and the received signal of the sub antenna 2-1 converted into a signal having predetermined characteristics (output signal of the multiplier 10-1)
The adder 11 outputs a C5LC output signal in which the sidelobe reception interference signal of the main antenna 1 has been suppressed.

(Problems to be Solved by the Invention) However, the conventional C3LC has the following problems.

Problem (1): In a region (clutter region) where a clutter signal is received with the main beam of the main antenna, the interference signal of sidelobe reception is superimposed on the clutter signal of mainlobe reception. The clutter signal power in the main antenna reception signal is much larger (for example, 20 to 30 dB larger) than the clutter signal power in the sub antenna reception signal, and the time-series characteristics of the clutter signal change from moment to moment. Even if a weighting coefficient is obtained by correlation calculation processing between the received signals of the main antenna and the sub antenna, it is not possible to generate a signal that cancels out the interference signal component in the main antenna received signal. Therefore, in the clutter region, Sidelobe reception interference signals cannot be suppressed sufficiently, and
Since the main antenna received signal is additively combined with the sub antenna received signal multiplied by a weighting coefficient, the characteristics of the clutter signal received by the main antenna's main lobe will change, so clutter suppression processing is performed after C5LC processing. However, clutter cannot be suppressed sufficiently.

As shown in the above-mentioned conventional example, it has a clutter determiner,
When performing correlation calculation processing using signals outside the clutter region and performing C5LC processing on signals outside the clutter region, C
Although it is possible to perform clutter suppression processing after the 5LC processing to suppress clutter, it is not possible to suppress interference signals within the clutter region.

Problem (2): Correlation calculation processing is performed using discrete signals with a predetermined number of samples, but when the interference signal is a pulse interference signal, the predetermined number of samples is Since the discrete signals with the number of samples include signals that are not interfering signals, the weighting coefficients are determined by correlation calculation processing using such discrete signals. cannot be suppressed.

Problem (3): If the interference signal is a pulse interference signal,
There are parts in the received signal where there is an interfering signal and parts where there is no interfering signal, but the C5LC
C3L also applies to areas where there is no interfering signal after processing.
Since the C processing is performed, clutter suppression performance and target detection performance deteriorate in areas where no interfering signal exists.

An object of the present invention is to solve the problems of the prior art described above, and to solve the problems of the prior art described above.
Perform clutter suppression processing before performing LC processing, perform correlation calculation processing using the signal after the clutter suppression processing, and perform a discrete number of discrete samples of a predetermined number of samples for correlation calculation processing to be applied to the signal of interest for C3LC processing. Regarding signals, only discrete signals that exist before the signal of interest in time series, only discrete signals that exist after that, or discrete signals that exist before and discrete signals that exist after Both the clutter signal and the interference signal can be sufficiently suppressed even in the clutter region by using the discrete signal with the larger interference signal power received by the sub-antenna among the combined discrete signals. It is an object of the present invention to provide a coherent sidelobe canceller which is capable of sufficiently suppressing a pulse interference signal including a portion corresponding to a rising or falling pulse.

(Means for Solving the Problems) In order to achieve the above object, the present invention has the following means configuration.

That is, the coherent sidelobe canceller of the present invention has: (1) one main antenna and: N (N is a natural number) sub-antennas; connected one-to-one to the main antenna and the sub-antennas for reception. N+1 receiving means for amplifying and detecting the signal and outputting the radar video signal; one to one for the receiving means;
N+1 A/D conversion means connected to convert the radar video signal into a discrete complex digital signal;
N+1 connected one-to-one to the A/D conversion means and performing clutter suppression processing on the complex digital signal;
clutter suppression means; a correlation calculation which is connected to all of the clutter suppression means and performs correlation calculation processing using a predetermined number of samples of discrete signals on the time-series discrete signals output from each clutter suppression means; processing means; a weight connected to the correlation calculation processing means and calculating weighting coefficients corresponding to each received signal of the main antenna and the sub antenna based on a predetermined calculation formula using the correlation calculation processing result; weighting coefficient calculation means; N+1 delay means connected one-to-one to the clutter suppression means and providing a signal delay time corresponding to the time required for signal processing of the correlation calculation and weighting coefficient calculation; N+1 multiplication means connected one-to-one to the means for multiplying the output signal of the delay means by a weighting coefficient output from the weighting coefficient calculation means; connected to all of the multiplication means; addition means for adding the output signals of the N+1 multiplication means;
A coherent sidelobe canceller is characterized by comprising:

(2) In the coherent sidelobe canceller of (1) above, when N=1, the correlation calculation processing means at least performs discrete cross-correlation between the main antenna reception signal and the sub antenna reception signal and sub antenna reception. Correlation calculation processing means for performing correlation calculation processing of discrete autocorrelation of signals; As for the weighting coefficient calculation means, the weighting coefficient corresponding to the main antenna reception signal is set to a constant a, and the weighting coefficient corresponding to the sub antenna reception signal is set to a constant a. A coherent sidelobe characterized in that it is a weighting coefficient calculation means for calculating a weighting coefficient as (constant b determined by the constant a) x (discrete cross-correlation signal) ÷ (discrete autocorrelation signal); It is a canceller.

(3) In the coherent side rope canceller of (2) above, the constant a=1; Regarding the multiplication means,
The multiplication means of the main antenna system is deleted and only the multiplication means of the sub antenna system is used; the addition means is an addition means that adds the output signal of the delay means of the main antenna system and the output signal of the multiplication means of the sub antenna system. It is a coherent sidelobe canceller characterized by;

(4) Regarding the correlation calculation processing means, a discrete signal of a predetermined number of samples that exists before the signal of interest in a time series, and a discrete signal of a predetermined number of samples that exists after a signal of interest in a time series. The signal power after clutter suppression processing of the sub-antenna reception signal is greater among the discrete signals of a predetermined number of samples, which are a combination of the discrete signal that exists before and the discrete signal that exists after in time series. Items (1) and (2) above, characterized in that the correlation calculation processing means outputs a correlation calculation processing result using a predetermined number of samples of discrete signals of the
(3).

(5) The correlation calculation processing means automatically determines the presence or absence of an interfering signal based on the discrete autocorrelation signal of the main antenna reception signal and the discrete autocorrelation signal of the sub antenna reception signal in the correlation calculation processing result. The correlation calculation processing means also has a jamming determination function that outputs a jamming determination result; The weighting coefficient calculation means sets the weighting coefficient corresponding to the sub-antenna reception signal to zero when there is no jamming signal, based on the jamming determination result. The above-mentioned items (1), (2), (3), and (4) are weighting coefficient calculation means characterized by:
) The coherent sidelobe canceller according to any one of the above items.

(6) The correlation calculation processing means automatically determines the presence or absence of an interfering signal based on the discrete autocorrelation signal of the main antenna reception signal and the discrete autocorrelation signal of the sub antenna reception signal in the correlation calculation processing result. Correlation calculation processing means that also has a disturbance determination function that outputs a result of interference determination; As for the addition means, based on the interference determination result, when there is no interference signal, the main antenna system does not add the output signal of the multiplication means of the sub antenna system. The coherent sidelobe canceller according to any one of the above items (1), (2), (3), and (4), is an adding means that outputs a signal.

(Function) Hereinafter, the function of the coherent sidelobe canceller of the present invention having the above means configuration will be explained.

The main antenna receives oscillation signals and clutter signals through its main lobe, and also receives interference signals through its side lobes. The secondary antenna receives clutter and jamming signals. Each received signal from the main antenna and the sub antenna is amplified and detected by the receiving means to output a radar video signal, and the radar video signal is converted into a discrete complex digital signal by the A/D'IR conversion means. The complex digital signal output from the A/D conversion means is subjected to the same clutter suppression processing by the clutter suppression means on both the main antenna system complex digital signal and the sub antenna system complex digital signal before the C3LC processing stage. The time-series discrete signal after the clutter suppression process is input to the correlation calculation processing means, and the zero weighting coefficient calculation means, which performs the correlation calculation process using the discrete signal of a predetermined number of samples, receives the correlation calculation processing result. , a weighting coefficient/number corresponding to each received signal of the main antenna and the sub antenna is calculated based on a predetermined calculation formula using the correlation calculation processing result.

When there is one sub-antenna, the correlation calculation processing means performs at least a correlation calculation process of discrete cross-correlation between the main antenna reception signal and the sub-antenna reception signal and discrete autocorrelation of the sub-antenna reception signal; The weighting coefficient calculation means sets the weighting coefficient corresponding to the main antenna reception signal to a constant a, and the weighting coefficient corresponding to the sub antenna reception signal to (a constant b determined by the constant a) x (discrete cross-correlation signal). Perform the calculation ÷(discrete autocorrelation signal).

The output signal of the clutter suppression means is also input to the delay means,
A signal delay time corresponding to the time required for signal processing of phase calculation and weighting coefficient calculation is given, and the output signal of the delay means and the weighting coefficient output from the weighting coefficient calculation means are time-aligned.

The output signal of the delay means is input to the multiplication means, and the weighting coefficient corresponding to the output signal is also input from the weighting coefficient calculation means to the corresponding multiplication means, and the output signal of the delay means is multiplied by the weighting coefficient. be done. By multiplying by this weighting factor, the interference signal received by the sub-antenna is converted into a signal having predetermined characteristics that cancels out the interference signal component in the received signal of the main antenna.The output signal of the zero multiplication means is sent to the addition means. The main antenna reception signal and the sub antenna reception signal are added and combined, and a signal in which the interfering signal in the main antenna reception signal is suppressed is output.

Due to the above-described operation, a signal in which both the clutter signal and the interference signal are suppressed can be obtained as an output even in the clutter region.

Next, the correlation calculation processing operation of the correlation calculation processing means will be explained in detail. A time-series discrete signal in which the clutter signal has been suppressed is inputted from the clutter suppressing means to the correlation calculation processing means.A correlation calculation process using a predetermined number of samples of the discrete signal is performed on the zero time-series discrete signal. , as a discrete signal with a predetermined number of samples, a discrete signal with a predetermined number of samples that exists chronologically before the signal of interest to be subjected to C3LC processing, and a predetermined discrete signal that exists chronologically after the signal to be processed by C3LC. After the clutter suppression processing of the sub-antenna received signal, which is a discrete signal with a number of samples and a discrete signal with a predetermined number of samples, which is a combination of a discrete signal that exists before and a discrete signal that exists after in time series. A correlation calculation processing result using a predetermined number of samples of discrete signals having larger signal power is output from the correlation calculation processing means. Due to this effect, it is possible to sufficiently suppress the pulse interference signal including the portion corresponding to the rising or falling edge of the pulse.

Furthermore, the function of automatically determining the presence or absence of an interference signal and controlling C3LC on/off (OFF) based on the interference determination result will be described. The correlation calculation processing means automatically determines the presence or absence of a jamming signal based on the discrete autocorrelation signal of the main antenna reception signal and the discrete autocorrelation signal of the sub antenna reception signal in the correlation calculation processing result, and generates a jamming determination result. Output. This interference determination result is input to the weighting coefficient calculation means or addition means. The weighting coefficient calculation means calculates the weighting coefficient corresponding to the sub-antenna reception signal when it is determined that there is no interference signal based on the interference determination result. Set the roaring coefficient to zero. Alternatively, the addition means outputs a signal of the main antenna system without adding the output signal of the multiplication means of the sub antenna system when it is determined that there is no interference signal based on the interference determination result.
Due to the above action, C5LC processing is performed only on the portion of the main antenna reception signal where the interference signal exists,
A signal that is not subjected to C3LC processing is obtained as an output for a portion where no interfering signal exists.

Therefore, the clutter suppression performance and target detection performance in the portion where no interfering signal exists does not deteriorate.

(Example) Next, an example of the present invention will be described with reference to the drawings.

[First Embodiment] FIG. 1 is a block diagram of a C3LC according to a first embodiment of the present invention, and 15.15-1, . . . and 15-N are A/D converters 5, 5- 1. ... and 5-N in a one-to-one manner, and performs clutter suppression processing on the input complex digital signal; 12 is a clutter suppressor 15; 15-N, and performs correlation calculation processing using a predetermined number of samples of discrete signals on time-series discrete signals after clutter suppression processing; 3 is a main antenna 1, a sub antenna 2-1. . . . and the complex weighting coefficients corresponding to each of the 2-N received signals are calculated by the correlation calculation processor! A weighting coefficient calculator 14 calculates based on a predetermined calculation formula using the correlation calculation processing results of the outputs of IO1 and 10-.
This is an adder that adds the complex digital signals output from 1, . . . 10-. Note that the components assigned other numbers are the same as the components assigned the same numbers in the configuration diagram of the conventional C3LC shown in FIG. However, the sub-antennas 2-1, . . . and 2-N are similar, sub-receivers! ,... and the same toN are similar,
A/D converter 5-1. . . . and 5-N are similar ones, and delay device 6-1. . . . and 6-N are similar, and multipliers 10, 10-1, . . . and 10-N are similar.

Next, the operation of the C9LC shown in FIG. 1 will be described, but a detailed explanation of the operation of the components similar to those of the conventional C3LC will be omitted. The clutter signal in the main antenna reception signal is suppressed by the clutter suppressor 15. That is, the complex digital signal output from the A/D converter 5 is C
5 Before being subjected to LC processing, it is input to the clutter suppressor 15 and subjected to clutter suppression processing.
C1ut-tsr) is an MTI eraser (MT' I C
clutter suppression processing by ``Anceller''. Similarly, sub antennas 2-1,... and 2-
The clutter signals in each of the N received signals are also suppressed by clutter suppressors 15-1, . . . and 15-N, which are similar to the clutter suppressor i5. Clutter suppressor 15
, 15-1, . . . and 15-H, the complex digital signals in which the clutter signals are suppressed are input to the correlation calculation processor 12.

The correlation calculation processor 12 performs correlation calculation processing using discrete signals of a predetermined number of samples on the inputted time-series discrete signal. (Φ), the correlation calculation processing result is input to the weighting coefficient calculation unit 13. The weighting coefficient calculation unit I3 calculates the main antenna 1, sub antenna 2-1,
...and 0 for calculating the complex weighting coefficient corresponding to each of the 2-N received signals. For example, wOPT=μΦ-1s4
Each complex weighting coefficient output from the 0 weighting coefficient calculator 13 which calculates a complex weighting coefficient using the equation of t is calculated by the multiplier 1o, 10-! ...and is input to the same 10-H. The received signal (complex digital signal) of the main antenna 1 multiplied by the complex weighting coefficient is input to the adder 14 .

Similarly, the sub antenna 2-1 multiplied by the complex weighting coefficient
,...Each received signal (complex digital signal) of the same 2-H
is also input to the adder 14. The input signal is subjected to addition and combination processing, and the interference signal in the received signal of the main antenna 1 is suppressed.
A 3LC output signal is output from adder 14.

By the above operation, a signal is obtained in which both the clutter signal and the interference signal are suppressed with respect to the received signal of the main antenna 1.

[Second Embodiment] FIG. 2 is a block diagram of a C5LC according to a second embodiment of the present invention, in which 9' is a weighting coefficient calculator, 92 is a constant generation circuit, and 1
0 is a multiplier, 15 and 15-! The zero weighting coefficient calculator 9', which is a clutter suppressor, is the same as the conventional weighting coefficient calculator 9 except that it includes a constant generating circuit 92, and the other numbered components are also numbered. These components are the same as the components given the same numbers in the configuration diagram of the conventional C5LC shown in FIG. The clutter suppressor 15 and the clutter suppressor 15-1 are the C3LCL of the first embodiment of the present invention shown in FIG.
f) It is the same as the clutter suppressor with the same number in the block diagram.

Therefore, in the following description, detailed explanations of the operations of those components will be omitted.

The clutter signal in the received signal of the main antenna 1 is suppressed by the clutter suppressor I5 before C3LC processing. The clutter signal in the received signal of the sub antenna 2-1 is also transmitted to the clutter suppressor 1.
Suppressed by 5-1. A complex digital signal (each output signal of the clutter suppressor 15 and the clutter suppressor 15-1), which is a time-series discrete signal subjected to clutter suppression processing, is input to the correlation calculation processor 7.

The cross-correlation circuit 71 combines the received signal of the main antenna 1 and the sub antenna 2.
A discrete cross-correlation calculation with the received signal of -1 is performed, and a discrete auto-correlation calculation of the received signal of the sub antenna 2-1 is performed in the autocorrelation circuit 72. The correlation calculation processing result is input to the weighting coefficient calculation unit 9'.

A constant generating circuit 92 of the weighting coefficient calculator 9' generates a weighting coefficient (WM) corresponding to the received signal of the main antenna 1. (W- is a constant and WW=a. However, , a is a constant.The division circuit 91 is connected to the sub antenna 2.
A complex weighting coefficient (Ws) corresponding to a received signal of -1 is generated. W, = bX (DCC signal) ÷ (DAC
signal), where b is a constant determined by the constant a. Main antenna 1 and sub antenna 2-! multiplied by weighting coefficients by multiplier 10 and multiplier 10-1. Each received signal is an adder! 1, and the C5LC output signal is output.

[Third Embodiment] Fig. 3 is a block diagram of a C3LC according to a third embodiment of the present invention. By eliminating the constant generation circuit 92 and the zero weighting coefficient WM=a=1, the multiplier 10 becomes unnecessary, and the output signal of the delay device 6 of the main antenna system is directly transmitted to the adder i! is input. On the other hand, for the output signal of the delay device 6-1 of the sub-antenna system, the complex weighting coefficient w, = - (1) CC signal) ÷ (DAC signal) is calculated by the multiplier 1.
It is multiplied by 0-1 and input to the adder 11. These two input signals are summed together and a C5LC output signal is output.

[Fourth Embodiment] FIG. 4 is a diagram showing the configuration of a C3LC correlation calculation processor according to a fourth embodiment of the present invention, and shows an example in which there is one sub-antenna system. 7-1 is a correlation calculation processor, 711 is a clutter suppressor 1
The received signal of the main antenna system of the output of 5 and the clutter suppressor 15
72-1 is a cross-correlation circuit that performs cross-correlation calculation processing between the output of 1 and the received signal of the sub-antenna system; 72-1 is a clutter suppressor 15;
Autocorrelation circuits 73-1 and 73-2 perform autocorrelation calculation processing on the received signals of the sub-antenna system outputted from -1, respectively, for two complex human input signals (for example, Y and Yl). 74-1 and 74-2 are registers that store complex signals; 75-! , 75-2.75-3.75-4.7
5-5 and 75-6 are averaging circuits that perform averaging processing on a predetermined number (for example, M) of complex input signals, and 76 is each output signal of the averaging circuits 75-4, 75-5, and 75-6. A maximum selection circuit 77 selects and outputs the maximum output signal among the three complex human power signals and further outputs a selection control signal. This is a selection circuit that selectively outputs a complex input signal corresponding to the signal.

Next, the operation will be explained. The complex digital signal input to the clutter suppressor 15 is expressed as X, (R, θ)=. (
R, θ) + J Qo(R, θ), clutter suppressor 1
The complex digital signal input to 5-1 is represented by X, (R.

θ)”It(R, θ)+JQt(R, θ).

However, R and θ represent the distance and direction information of the signal of interest, respectively. Clutter suppressor! 5 and 15-1 are, for example, MTI erasers, the input complex digital signal is subjected to clutter suppression processing as follows,
Output signals YO(R, θ) and Ys(R, θ) are obtained.

However, X, (R, θ-1) and X, (R, θ-□)
is the signal before the rudder sweep, and X, (R, θ-2)
and X, (R, θ-2) is the signal before two radar sweeps. The output signals of the clutter suppressor 15 and the clutter suppressor 15-1 are time-series discrete signals. -1
performs correlation calculation processing using discrete signals of a predetermined number of samples (for example, M, where M is an even number).

In the following, we specify the orientation θ and YO(R, θ)=Y
This will be abbreviated as o(R), Yt(R, θ)=Yt(R). The output signal Ys(R) of the clutter suppressor 15-violet is input to the correlation circuit 73-2, and Y+(R)・Yr(R>
The calculation of =lYt(R)I is performed. Correlation circuit 73-2
The output signal is input to and stored in register 74-2.

The averaging circuit 75-4 calculates M discrete signals that exist before the signal of interest (signal at a distance R) in time series among the discrete signals output from the register 74-2. . The averaging circuit 75-5 calculates M/2 discrete signals that exist before the signal of interest in the time series and M/2 discrete signals that exist after the signal of interest in the time series. The average circuit 75-6 is
For M discrete signals that exist chronologically after the signal of interest, Es(R), =, Kotobuki, "3.
::l Y 1(n)l ''. In other words, average circuits 75-4, 75-5, and 7
Three DAC signals are obtained by 5-6, each of which is input to the maximum selection circuit 76. Maximum selection circuit 76 selects three DAC signals (E 1(R>, E 2(R) and E
s(R)) is selected and output. E (R) = MAX (El (R), E bar
).

E s(R)], and further outputs a selection control signal based thereon. Clutter suppressor! The complex digital signal Yo(R) output from the clutter suppressor 15-1 and the complex digital signal Y1(R) output from the clutter suppressor 15-1 are connected to the cross-correlation circuit 71-1.
By the same operation as the autocorrelation circuit 72-1, the Yo(n)·Yt(n)ﾓﾓﾑﾑﾑﾑﾑﾑ) D CC signal is obtained.

The selection circuit 77 selects three DCC signals (Fl(R)) based on the selection control signal output from the maximum selection circuit 76.

F a (R) and F s (R)) and outputs the DCCCC signal (R).

The cross-correlation circuit 7! -1 output DCCCC signal (R) and the output DAC signal E (R) of the autocorrelation circuit 72-1 are input to the weighting coefficient calculator 9, where a complex weighting coefficient is calculated.

FIG. 5 is a conceptual diagram of weighting coefficient calculation, and the register 74
-1 and 74-2, and the calculation of the complex weighting coefficient Ws(R) based thereon.

Through the above operations, a complex weighting coefficient is calculated based on the correlation calculation processing result using a predetermined number of samples of discrete signals that maximize the signal power after clutter suppression processing of the received signal of the sub antenna system, and the C3LC It will be processed.

(The DAC signals 7 and 1 (R), E2 (R), and Es (R) indicate the signal power after clutter suppression processing of the received signal of the sub antenna system □. ) Therefore, even in the partial phase corresponding to the rising or falling pulse of the pulse interference signal, the correlation calculation processing result used for complex weighting coefficient calculation is always a discrete value of a predetermined number of samples from which the interference signal is extracted (sampled). It uses a signal, and can be sufficiently suppressed in the same way as the central part of the pulse.

[Fifth Embodiment] FIG. 6 is a block diagram (partial diagram) of a C3LC according to a fifth embodiment of the present invention, and shows an example in which there is one sub-antenna system. 7
-2 is a correlation calculation processor, 72-2 is a cross-correlation circuit 71-
An autocorrelation circuit 78 having the same circuit configuration as 1 automatically determines the presence or absence of a disturbance signal based on the output signal of the autocorrelation circuit 72-1 and the output signal of the autocorrelation circuit 72-2, and outputs a disturbance determination result. This is a disturbance determination circuit. Other numbered components are the same as the components with the same numbers described in the first to fourth embodiments.

The autocorrelation circuit 72-2 selects the signal after the clutter suppression processing of the received signal of the main antenna system (the complex digital signal output from the clutter suppressor 15) based on the selection control signal of the output of the autocorrelation circuit 72-1. Outputs DAC signal G (R).

The DAC signal E of the output of the autocorrelation circuit 72-1 is
(R) and the DAC signal G(R) output from the autocorrelation circuit 72-2 are input to a disturbance determination circuit 78 and compared in magnitude. Further, the DAC signal E (R) is compared with a predetermined value (a value corresponding to the receiver noise level). DAC signal E (R)>predetermined value and DAC signal E (
R) > DAC signal G (R), that is, the power of the sub-antenna reception signal (signal to the clutter suppressor 110) is greater than the receiver noise power, and the power of the main antenna reception signal (signal after clutter suppression processing) When it is larger than , it is determined that there is an interference signal for main antenna sidelobe reception.

This interference determination result is output from the interference determination circuit 78.

When an external control signal is input to the interference determination circuit 78, the interference determination result is output only when the external control signal indicates "C9LC processing r on". The interference judgment result is sent to the divider circuit 9.
1-1. When the interference determination result indicates that there is no interference signal, the division circuit 9-1 outputs the sub-antenna system weighting coefficient as "zero".

With the above operation, C3LC processing can be performed only on the part where the interference signal of the main antenna sidelobe reception exists, and the clutter suppression performance in the part where the pulse interference signal does not exist deteriorates and the blind detection performance is reduced. Deterioration can be improved.

[Sixth Embodiment] FIG. 7 is a block diagram (partial diagram) of a C3LC according to a sixth embodiment of the present invention, and shows an example in which there is one sub-antenna system.
11-1 is an adder, 111 is an adder circuit that adds and combines the main antenna reception signal output from the delay device 6 and the sub-antenna reception signal output from the multiplier 1G-1, and 112 is an output signal of the adder circuit 111 and a delay. This is a selection circuit that selects and outputs the output signal of the device 6. The components assigned other numbers are the same as the components with the same numbers described in the first to fifth embodiments.

The adder circuit 111 receives the main antenna reception signal (
(complex digital signal) and the sub-antenna reception signal (complex digital signal) output from the square calculator 10-1,
The output signal is input to the selection circuit 112. 0 selection circuit 11 in which the output signal of the delay device 6 is also input to the selection circuit 112
2 selects and outputs the output signal of the adder circuit 111 when the interference signal is "present", and the output signal of the delay device 6 when the interference signal is "absent", based on the interference determination result of the output of the interference determination circuit 78.

In other words, when there is no interfering signal, multiplier 1 of the sub antenna system
Outputs the main antenna system signal to which the G-1 output signal is not added.

With the above operation, C3LC processing can be performed only on the part where the interference signal of the main antenna sidelobe reception exists, and the clutter suppression performance and target detection performance deteriorate in the part where the interference signal does not exist. is improved.

(Effects of the Invention) As explained above, in the coherent sidelobe canceller according to the present invention, the main antenna reception signal and the sub antenna reception signal are subjected to the same clutter suppression processing before being subjected to C3LC processing, and after the clutter suppression processing, C3LC processing is performed on the signal. Therefore, even in the clutter region, both the clutter signal and the interference signal can be sufficiently suppressed.

In addition, among the discrete signals of a predetermined number of samples that exist before, after, or before and after the signal to which C3LC processing is focused, the clutter suppression processing of the sub antenna reception signal is performed. The weighting coefficient is obtained by the result of arithmetic processing using a predetermined number of samples of discrete signals having larger signal power. Therefore, there is an effect that the pulse interference signal can be sufficiently suppressed including the portion corresponding to the rising or falling edge of the pulse.

Further, the main antenna received signal power and the sub antenna received signal power are compared to automatically determine the presence or absence of an interference signal in main antenna sidelobe reception, and based on this determination result, when there is no interference signal, the weighting coefficient calculation means Either the weighting coefficient of the sub-antenna system is set to zero, or the adding means outputs a signal of the main antenna system without adding the signal of the sub-antenna system.

Therefore, it is possible to perform C3LC processing only on the portion of the main antenna received signal where the jamming signal exists, thereby improving the deterioration of clutter suppression performance and target detection performance in the portion where no jamming signal exists. effective.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram of the C5LC of the first embodiment of the present invention, and the second
The figure is a block diagram of a C5LC according to a second embodiment of the present invention, FIG. 3 is a block diagram of a C3LC according to a third embodiment of the present invention, and FIG. 4 is a correlation calculation processor of a C5LC according to a fourth embodiment of the present invention. 5 is a conceptual diagram of weighting coefficient calculation, FIG. 6 is a diagram (partial diagram) of C3LC according to the fifth embodiment of the present invention, and FIG. 7 is a diagram of the configuration of C5LC according to the sixth embodiment of the present invention. FIG. 8 is a block diagram of a conventional C3LC (one sub-antenna). 1... Main antenna, 2-1 to 2-N...
- Sub antenna, 3... Main receiver, 4-1 to 4.
N... Sub-receiver, 5.5-1 to 5-N...
・・A/D converter, 6.6-1~6-N・・・・・・
Delay unit, 7.7-1.7-2... Correlation calculation processor, 8... Clutter scanner, 9.9'.
...Weighting coefficient calculator, 10.10-1~1
0-N...multiplier, 11, 1.1-. 1...
... Adder, 12 ... Correlation calculation processor,
! 3... Weighting coefficient calculator, 14...
... Adder, 15.15-1 to 15-1 ... Clutter suppressor, 71.71-1 ... Cross correlation circuit, 72.72-1.72-2 ... ...Autocorrelation circuit, 73-1.73-2...Correlation circuit, 7
4-Seal, 7th 2...Register, 75-1.7
5-2,751.75-4.75-5.75-6...
...Average circuit, 76...Maximum selection circuit,
77... Selection circuit, 7... Interference determination circuit, 91.91-1... Division circuit, 92
... Constant generation circuit, ill ... Addition circuit, 112 ... Selection circuit. Agent: Yoshihiro Hachiman, 9th Floor, Sakuyoshi I's Precise Survey C3LCNara, Hememoto Ryo I1
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Claims (6)

[Claims] (1) One main antenna; N (N is a natural number) sub antennas; connected one-to-one to the main antenna and sub antennas, amplify and detect the received signal, and output a radar video signal N+1 receiving means for converting the radar video signal into a discrete complex digital signal; N+1 A/D converting means connected one-to-one to the receiving means for converting the radar video signal into a discrete complex digital signal; and the A/D converting means. N+1 clutter suppression means connected one-to-one to perform clutter suppression processing on the complex digital signal; correlation calculation processing means for performing correlation calculation processing on the signal using discrete signals of a predetermined number of samples; weights connected to the correlation calculation processing means and corresponding to each received signal of the main antenna and the sub antenna; weighting coefficient calculation means for calculating a weighting coefficient based on a predetermined calculation formula using the results of the correlation calculation process; N+1 delay means for providing a signal delay time corresponding to the time required for signal processing; connected one-to-one to the delay means, and weighting the output of the weighting coefficient calculation means with respect to the output signal of the delay means; A coherent sidelobe canceller comprising: N+1 multiplication means for multiplying coefficients; and addition means connected to all of the multiplication means and adding output signals of the N+1 multiplication means. (2) In the coherent sidelobe canceller recited in claim (1), when N=1, the correlation calculation processing means at least performs a discrete calculation of the main antenna reception signal and the sub antenna reception signal. Correlation calculation processing means for performing correlation calculation processing of cross-correlation and discrete autocorrelation of the sub-antenna reception signal; As for the weighting coefficient calculation means, the weighting coefficient corresponding to the main antenna reception signal is set as a constant a, and the weighting coefficient corresponding to the main antenna reception signal is A weighting coefficient calculating means that calculates a weighting coefficient corresponding to a received signal as (constant b determined by the constant a) x (discrete cross-correlation signal) ÷ (discrete autocorrelation signal); coherent sidelobe canceller. (3) In the coherent sidelobe canceller described in claim (2), the constant a=1; as for the multiplication means, the multiplication means of the main antenna system is deleted and only the multiplication means of the sub antenna system is used. A coherent sidelobe canceller characterized in that: the addition means is an addition means for adding the output signal of the delay means of the main antenna system and the output signal of the multiplication means of the auxiliary antenna system. (4) Regarding the correlation calculation processing means, a discrete signal of a predetermined number of samples that exists before the signal of interest in a time series, and a discrete signal of a predetermined number of samples that exists after a signal of interest in a time series. The signal power after clutter suppression processing of the sub-antenna reception signal is greater among the discrete signals of a predetermined number of samples, which are a combination of the discrete signal that exists before and the discrete signal that exists after in time series. Claim (1) characterized in that it is a correlation calculation processing means that outputs a correlation calculation processing result using a predetermined number of samples of discrete signals of
(2), (3). (5) The correlation calculation processing means automatically determines the presence or absence of an interfering signal based on the discrete autocorrelation signal of the main antenna reception signal and the discrete autocorrelation signal of the sub antenna reception signal in the correlation calculation processing result. The correlation calculation processing means also has a jamming determination function that outputs a jamming determination result; the weighting coefficient calculation means sets the weighting coefficient corresponding to the sub-antenna reception signal to zero when there is no jamming signal, based on the interference determination result. Claims (1), (2), and (2) are weighting coefficient calculation means for calculating weighting coefficients;
The coherent sidelobe canceller according to any one of paragraphs 3) and 4). (6) The correlation calculation processing means automatically determines the presence or absence of an interfering signal based on the discrete autocorrelation signal of the main antenna reception signal and the discrete autocorrelation signal of the sub antenna reception signal in the correlation calculation processing result. The correlation calculation processing means also has a jamming determination function that outputs a jamming determination result; the addition means does not add the output signal of the multiplier of the sub-antenna system when there is no jamming signal based on the interference determination result; Claims (1), (2), and (3) are characterized in that:
(4).