JPH02220537A - Orthogonal modulator - Google Patents

Abstract

PURPOSE:To output a modulation signal without changing the condition of waveform shaping and to apply monolithic circuit integration to an orthogonal modulator by using a MOSFET analog filter whose frequency characteristic is variable. CONSTITUTION:An input signal is inputted to a digital signal processing circuit 2 via a switch 11, two series of digital signals whose output phases are intersected orthogonally with each other are D/A-converted 3 respectively, the result is inputted to each multiplier 7 via a MOSFET analog filter 12, the signal is multiplied with each carrier whose phases are intersected orthogonally with each other, multiplication outputs are added 8 and outputted. In this case, the frequency characteristic of each LPF 12 is made variable by using the clock signal of the signal inputted to the processing circuit 2 and the harmonic component of the output signal of the converter 3 is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention is used for signal transmission. In particular, the present invention relates to a quadrature modulator that converts a digitally processed signal into an analog signal and performs quadrature modulation.

By using a MOSFET filter with variable frequency characteristics to remove harmonics generated by digital processing, the present invention enables monolithic integration and enables signal transmission over a wide range without changing waveform shaping conditions. This makes it possible to respond to speed.

[Conventional technology]

In a modulator that performs 4-band limitation using digital signal processing,
An analog low-pass filter is required after the digital-to-analog converter to remove harmonic components caused by sampling specific to digital processing. An RC active filter is usually used as such a low-pass filter.

FIG. 9 is a block diagram of a conventional quadrature modulator.

A signal input to the signal input terminal 1 is waveform-shaped by the digital signal processing circuit 2 and output as two series of digital signals whose phases are orthogonal to each other. These two series of digital signals are converted into analog signals by a digital-to-analog converter 3, and a low-pass filter 4 removes harmonic components specific to digital processing. This low-pass filter 4 is constituted by an RC active filter.

One of the two series of analog signals obtained by the low-pass filter 4 is multiplied by a carrier wave from a carrier wave input terminal 6 by a multiplier 5 . On the other hand, a multiplier 5
As a result, the carrier wave whose phase is shifted by π/2 is multiplied via the phase shifter 7.

As a result, the two series of analog signals are multiplied by carrier waves whose phases are orthogonal to each other.

The two series of signals obtained by the multiplier 5 are added by an adder 8 and output to a signal output terminal 9.

FIG. 10 shows a block diagram of a quadrature phase modulator as an example of a quadrature modulator.

In this case, the digital signal processing circuit 2 includes a serial-to-parallel converter 201 and a ROM roll-off filter 202. The serial-to-parallel converter 201 divides the input signal into two series, each of which is connected to a ROM roll-off filter 20.
Supply to 2. The ROM roll-off filter 202 digitally shapes the waveform of the input signal.

FIG. 11 shows the output of a digital-to-analog converter in digital signal processing and the signal after the output is passed through a low-pass filter. In this figure, the stepped line shows the output of the digital-to-analog converter, and the smooth line shows the signal after passing through the low-pass filter.

FIG. 12 shows the relationship between the signal transmission speed and the frequency characteristics of the low-pass filter 4. In this figure, fbSfb′
indicates the transmission speed, fcsfc′ indicates the center frequency of the harmonic component contained in the output of the digital-to-analog converter 3, and F(S) indicates the amplitude frequency characteristic of the low-pass filter 4.

[Problem that the invention seeks to solve]

The low-pass filter connected after the digital-to-analog converter is required to sufficiently attenuate only the harmonic components without attenuating the waveform-shaped main signal. In the example shown in Fig. 12, when the frequency characteristic of the low-pass filter is F (S), the transmission speed is f, to (
, p, only the harmonics can be sufficiently attenuated. However, the transmission speed decreases to t/2 f b
When this happens, the low-pass filter cannot sufficiently attenuate harmonic components.

Furthermore, when the transmission speed increases to 2 fb, the main signal is attenuated.

When the frequency characteristics of the low-pass filter are determined in this way, there is a drawback that the transmission speed that can be processed by the orthogonal modulator is limited.

Furthermore, when an RC active filter is monolithically integrated, it is difficult to obtain one with high precision because there are errors from the set values of the resistance and capacitance, and the temperature deviation of the element is large. Furthermore, since the resistor is built-in, the circuit size becomes large.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above problems and provide a quadrature modulator that is easy to monolithically integrate and can accommodate a wide range of signal transmission speeds without changing waveform shaping conditions.

Means for Solving Problem C] In the quadrature modulator of the present invention, the low-pass filter connected after the digital-to-analog converter includes a MOS FET analog filter with variable frequency characteristics, and this M
The present invention is characterized in that it includes a control circuit that automatically controls the frequency characteristics of the OSFET analog filter using a clock signal of a signal input to a digital signal processing circuit.

[For production]

MOSFET analog filter uses MO as a resistive element.
Using SFET, its resistance value can be controlled by voltage.

By changing this resistance value, the frequency characteristics of the filter can be variably set. Furthermore, MOSFET analog filters can be monolithically integrated with high precision.

Therefore, by using this MOSFET analog filter as a low-pass filter after the digital/analog circuit, monolithic integration is easy, and quadrature modulation allows support for a wide range of signal transmission speeds without changing waveform shaping conditions. A vessel is obtained.

〔Example〕

FIG. 1 shows a block diagram of a quadrature modulator according to an embodiment of the present invention.

This orthogonal modulator consists of a digital signal processing circuit 2 that digitally processes an input signal and outputs two digital signals whose phases are orthogonal to each other, and two circuits that convert the two digital signals into analog signals. A digital-analog converter 3, two low-pass filters that remove harmonic components contained in the outputs of these two digital-analog converters 3, and a The multiplier 5 includes two multipliers 5 for multiplying carrier waves that are orthogonal to each other, and an adder 8 for adding the outputs of the two multipliers.

An input signal from the signal input terminal 1 is input to the digital signal processing circuit 2 via the switch 11 .

A carrier wave from a carrier wave input terminal 6 is input to one side of the multiplier 5, and a carrier wave whose phase is shifted by π/2 via a phase shifter 7 is input to the other side.

Here, the feature of this embodiment is that the two low-pass filters are MOSFET analog filters 12 with variable frequency characteristics. The present invention is provided with a control circuit 13 that is automatically controlled by a clock signal.

The control circuit 13 also controls the digital signal processing circuit 2.

The control circuit 13 receives a clock signal from the clock input terminal 10 manually. By switching the switch 11, a clock signal can also be input to the digital signal processing circuit 2.

FIG. 2 is a circuit diagram showing an example of the MO5FET analog filter 12.

The signal input terminal 20 is a MOSFET resistance circuit 21.22.
is connected to the first input of operational amplifier 25 via. M
A connection point between the OSFET resistance circuit 22 and the operational amplifier 25 is grounded via a capacitor 23. Operational amplifier 25
The output of is connected to the signal output terminal 26, the second input of the operational amplifier 25, and further connected via the capacitor 24 to the connection point of the MOSFET resistance circuits 21 and 22.

The MOSFET resistance circuits 21 and 22 are circuits using MOSFETs as voltage-controlled resistance elements, and by changing the resistance value, the frequency characteristics as a filter can be changed.

Figure 3 shows the signal transmission speed and MOSFET in this embodiment.
The relationship with the frequency characteristics of the ET analog filter 12 is shown. F I (S), F , (S) and F3 (S) respectively indicate the amplitude frequency characteristics of the MOSFET analog filter 12, f is the signal transmission speed, and fc is the center frequency of the first harmonic due to sampling. show.

Since the waveform shaping conditions in the digital signal processing circuit 2 are constant, when the signal transmission speed doubles or quadruples, the center frequency of the first harmonic also doubles or quadruples. At this time,
The frequency characteristics of the MOSFET analog filter 12 are changed in response to changes in the clock signal. This results in
Even if the signal transmission speed changes, only the harmonic components can be sufficiently attenuated without attenuating the main signal.

The frequency characteristics of the MOSFET analog filter 12 and the processing speed of the digital signal processing circuit 2 are controlled by the control circuit 13.
controlled by

! 411111MOS F E Tl resistance v421.
22 is a circuit diagram showing an example of No. 22. FIG.

This circuit includes n input terminals 40 and corresponding output terminals 41, and each pair of terminals realizes n resistances.

Each input terminal 40 is connected to a pair of analog switches 4
2, the analog switch 42
It is connected to the drain of MOSFET 47 corresponding to .

At this time, the source of the MOSFET 47 is connected to the corresponding output terminal 41 via the corresponding analog switch 43. A capacitor 48 for holding a bias voltage is connected between the source and gate of the MOSFET 47.

The MOSFET 47 whose connection with the input terminal 40 is cut off by the analog switch 42 has its source, base, and gate connected to the corresponding analog switch 44.
It is connected to a bias voltage setting circuit 49 via 45 and 46.

The 11th and 2nd analog switches 42 are driven by complementary lock signals so that there is no time for them to be logic "1" at the same time. analog switch 4
3 is also driven by the same clock signal as the corresponding analog switch 42.

If the time required for "logic rl" to become logic "0" is T, then the 2-11th and 2+1st analog switches 42
．． 43, the time when the logic becomes "l" is shifted by T/n. The analog switches 44 and 46 connected to the bias voltage setting circuit 49 become logic "1" for a time T/n immediately before the analog switches 42 and 43 opposite thereto become logic "1", and the corresponding analog switches 45 also becomes logic "1" only for that time.

FIG. 5 shows a circuit configuration in which one resistor is realized using two MOSFETs in order to explain the operation of the MOSFET resistance circuit.

Analog switch 42-1.43-1.44-1.45
-1 and 46-1 and analog switch 42-2.4
3-2.44-2.45-2 and 46-2 are driven by complementary signal lock signals that do not have time to be logic "1" at the same time.

In the first state, MOS F E Ta2-1 is connected to input terminal 40 and output terminal 41 via analog switches 42-1 and 43-1. MOSFET
The drain, gate, and source of 47-2 are connected to bias voltage setting circuit 49 via analog switches 44-1.45-1.46-1, respectively.

In the second state, MOS F E Ta2-2 is connected to input terminal 40 and output terminal 41 via analog switches 42-2 and 43-2. MOSFET
The drain, gate, and source of 47-1 are connected to bias voltage setting circuit 49 via analog switches 44-2, 45-2, and 46-2, respectively.

In the first state and the second state, MOSFET47-1
Or, since input terminal 47-2 is connected complementary, input terminal 4
0 to the output terminal 41, the resistance value is always the same. Therefore, such a MOSFET
When a resistance circuit is used as a resistance element of a filter,
It can be used as a continuous time filter.

In order to change the resistance value of the MOSFET resistance circuit, the voltage set by the bias voltage setting circuit 49 is changed.

FIG. 6 shows an example of a bias voltage setting circuit that can variably set the bias voltage of a MOSFET.

As an example of MOSFET analog filter, IEEE
) Ranzak John on Circuits and Systems, Volume CAS-29, No. 5, May 1982 (r
EEE TRANSACTION ON CIRCUI
TS AND SYSTEMS.

Vol. CAS-29, No. 5. M'ay 198
2) A switched register filter has been proposed. A switched resistor filter is a circuit that uses a switched capacitor integrator as a bias voltage setting circuit for a MOSFET variable resistance circuit. This circuit is shown in FIG.

A reference input terminal V is input to the reference voltage input terminal 60. This voltage Vi is supplied to the analog switch 6 via the sampling capacitor 66 and the analog switch 63 to the first power of the operational amplifier 69. The connection point between the analog switch 61 and the sampling capacitor 66 is grounded via the analog switch 64, the connection point between the sampling capacitor 66 and the analog switch 63 is grounded via the analog switch 62, and the second The human power of is also grounded. The second input and output of the operational amplifier 69 are connected via an integral capacitor 68 .

The reference voltage input terminal 60 and the first input terminal of the operational amplifier 69 are connected to the source and drain of the N-type MOSFET 65, respectively. The output of the operational amplifier 69 is connected to the gate of the MOSFET 65. A capacitor 67 for holding a bias voltage is connected between the gate and source of the MOSFET 65.

Analog switches 62, 63, and 64 are manually supplied with complementary lock signals that do not become logic "1" at the same time. At this time, analog switches 61 to 6
4 and the sampling capacitor 66 realize an equivalent resistance.

The value of this equivalent resistance is MO3F E in the parallel state
Resistance value RFE of T81? is equal to At this time, RF
ET = 1 / (Cu-f −) ---
−(1). That is, the resistance value RPET of the MOSFET 65 is determined by the capacitance value Cu of the sampling capacitor 66 and the clock frequency f3.

FIG. 7 shows an example of a switched resistor filter. This example shows a third-order low-pass switched resistor filter in which one resistor is realized by two MOSFETs.

The signal input terminal 70 is connected to the first input of the operational amplifier 74 through three switched resistor resistance circuits 71 . 1st and 2nd stage switched resistor resistance circuits 71
The connection point of is grounded via a capacitor 72. Third-stage switched resistor resistance circuit 71 and operational amplifier 74
The connection point is grounded via a capacitor 73. The output of the operational amplifier 74 is connected to a signal output terminal 76 and a second input of the operational amplifier 74, and is connected to the second and third switched resistor resistance circuits 71 via a capacitor 75. Connected to points.

The cutoff frequency fc of this filter is the capacitor 72.
The resistance value RFI of the switched resistor resistance circuit 71 is determined by the constant determined by the capacitances 73 and 75. ? Accordingly, f c” k / Rp++t −−
--Determined by (2). Here, from equation (1), f
, = k-Cu-f,
[3] becomes. From equation (3), it can be seen that the switched register filter is a variable band filter whose frequency characteristics can be changed by changing the clock frequency. Distortion, which may be a problem due to the use of MOSFET, which is a nonlinear element, can be ignored by attenuating the signal to some extent.

FIG. 8 shows an example of the quadrature modulator shown in FIG.
A block diagram of a phase modulator is shown.

In this four-phase phase modulator, the digital signal processing circuit 2 in FIG. 1 is composed of a serial-to-parallel converter 201 and a ROM roll-off filter 202.

The serial-to-parallel converter 201 alternately distributes the input signal into in-phase components and quadrature components, and supplies the components to the ROM roll-off filter 202, respectively. ROM roll-off filter 20
2 digitally shapes the input signal.

In this four-phase phase modulator, as the transmission speed changes from f, to 2fb, and then to 4fb, as shown in FIG. s) to F 2(S),
Furthermore, it is changed to F3(S), and at the same time, the operating speed of the ROM roll-off filter 202 is changed. Thereby, the transmission speed can be changed without changing the waveform shaping conditions.

Thereby, it is possible to output a four-phase phase modulation signal that corresponds to changes in transmission speed without changing the waveform shaping conditions.

〔Effect of the invention〕

As explained above, the quadrature modulator of the present invention uses a MOSFET analog filter with variable frequency characteristics to change waveform shaping conditions in response to a wide range of transmission speed changes using electrical control signals. This has the effect of outputting a modulated signal without any interference.

Furthermore, since MOSFET analog filters are easy to monolithically integrate, it is possible to monolithically integrate a high-precision quadrature modulator using current MO8 manufacturing technology.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a quadrature modulator according to an embodiment of the present invention. FIG. 2 is a circuit diagram showing an example of a MOSFET analog filter. FIG. 3 is a diagram showing the relationship between signal transmission speed and frequency characteristics of a MOSFET analog filter. FIG. 4 is a circuit diagram showing an example of a MOSFET resistance circuit. FIG. 5 is a circuit diagram of a MOSFET resistance circuit that realizes one resistor using two MOSFETs. FIG. 6 is a diagram showing an example of a bias voltage setting circuit that can variably set the bias voltage of a MOSFET. FIG. 7 is a circuit diagram showing an example of a switched resistor filter. FIG. 8 is a block diagram of a four-phase phase modulator. FIG. 9 is a block diagram of a conventional quadrature modulator. FIG. 10 is a block diagram of a four-phase phase modulator. FIG. 11 is a diagram showing the output of a digital-to-analog converter and a signal after the output is passed through a low-pass filter. FIG. 12 is a diagram showing the relationship between signal transmission speed and frequency characteristics of a low-pass filter. 1.20.70... Signal input terminal, 2... Digital signal processing circuit, 3... Digital-to-analog converter, 4... Low pass filter, 5... Multiplier, 6...
・Carrier wave input terminal, 7...phase shifter, 8...adder,
9.26.76...Signal output terminal, 10...Clock input terminal, 11...Switch, 12...MOSF
ET analog filter, 13...control circuit, 21.2
2...MOSFET resistance circuit, 23.24.48.6
7.72.73.75... Capacitor, 25.69.
74... operational amplifier, 40... input terminal, 41...
・Output terminal, 42-46. 61-64... Analog switch, 47.65... MOSFET, 49... Bias voltage setting circuit, 60... Reference voltage input terminal, 6
6... Sampling capacity, 68... Integral capacity, 71...
Switched resistor resistance circuit, 201...Series-parallel converter, 202...ROM roll-off filter. Spring 1-men Shrine 1 Fig. 7f15 Fig. WJ 2 Resurrection 6 Iris fan drawing Iris drawing procedure amendment

Claims (1)

[Claims] 1. A digital signal processing circuit that digitally processes an input signal and outputs two series of digital signals whose phases are orthogonal to each other, and two digital signals that convert these two series of digital signals into analog signals, respectively. - An analog converter and two low-pass filters that remove harmonic components contained in the outputs of these two digital-to-analog converters, and the outputs of these two low-pass filters are orthogonal to each other in phase. In a quadrature modulator that includes two multipliers that multiply carrier waves and an adder that adds the outputs of these two multipliers, the two low-pass filters have variable frequency characteristics.
1. A quadrature modulator, comprising: an OSFET analog filter; and a control circuit that automatically controls the frequency characteristics of the MOSFET analog filters using a clock signal of a signal input to the digital signal processing circuit.