JPH0221818Y2 - - Google Patents

Description

[Detailed explanation of the invention] (a) Abstract This invention relates to the AGC circuit of a receiver, and its features include at least one
By connecting a limiter circuit consisting of Zener diodes of constant voltage elements and one diode connected in series with opposite polarities between the input and output terminals of the AGC circuit, when the level of the received signal is high, Even when performing a fast channel selection operation, there is no time delay in AGC operation, and no unpleasant noise is generated during tuning.

(b) Conventional device FIGS. 1 and 2 are block diagrams of a conventionally known receiver and its output signals when selecting a channel.

To briefly explain its configuration and operation, the received signal amplified by the RF amplifier 1 is
Mixed with the output of local oscillator 3 by mixer 2
After being converted into an IF signal, it is amplified by an IF amplifier 4 and detected by a detector 5 to become an audio signal.

A part of the output of the detector 5 is inputted to the AGC input terminals of the RF amplifier 1 and the IF amplifier 4 through the AGC circuit 6, so that the output level is kept constant even when the received signal level fluctuates.

However, in such devices, there is a time delay in the AGC circuit 6, so if you perform a fast tuning operation when the level of the received signal is high, the
The AGC did not work, and as shown in Figure 2, a phenomenon occurred in which a large output was generated for a short period of time during tuning, and then the sound was interrupted, which was unpleasant to the ears.

(C) Purpose The purpose of this invention is to improve the drawbacks of the conventional device described above, and to create a receiver that does not generate unpleasant noise even when performing fast tuning operations when the level of the received signal is high. The aim is to provide an AGC circuit.

(d) Embodiment FIG. 3 shows an embodiment of this invention, and in the receiver of the conventional device shown in FIG.
A limiter circuit 7 formed by connecting two Zener diodes in series with opposite polarities is connected between the input and output terminals of the AGC circuit 6.

To explain its operation with reference to Fig. 4, when the level of the received signal is high and the tuning operation is fast, the transient detection output during tuning is as follows:
Pass through the limiter circuit 7 without passing through the AGC circuit 6
Since it is input as an AGC signal to the RF amplifier 1 and IF amplifier 4, there is no time delay in AGC operation, and the gains of the RF amplifier 1 and IF amplifier 4 are immediately reduced to a normal receiving state, which is different from the conventional device. No unpleasant noise will be generated.
In the above embodiment, an example was shown in which two Zener diodes, which are constant voltage elements, are connected in series with opposite polarities, but due to the balance of the AGC feedback level and its absolute value, it is possible to connect a normal diode to one side as a constant voltage. Even when connected as an element, the object of the present invention can be achieved by utilizing its constant voltage property in the forward direction.

(e) Effects As explained above, the receiver of this invention has
The AGC circuit has a limiter circuit consisting of at least one Zener diode and one diode connected in series with opposite polarities, which is connected between the input and output terminals of the AGC circuit, so that the level of the received signal is high. Sometimes, even if you perform fast channel selection operations,
Because there is no time delay in AGC operation,
This allows comfortable tuning operations without generating unpleasant noise during tuning.

[Brief explanation of the drawing]

FIG. 1: A block diagram of a conventionally known receiver; FIG. 2: An operational explanatory diagram showing its output signal.
FIG. 3 is a block diagram of a receiver according to an embodiment of the invention, and FIG. 4 is an operation explanatory diagram showing its output signals. 1...RF amplifier, 2...Mixer, 3...Local oscillator, 4...IF amplifier, 5...Detector, 6...
...AGC circuit, 7...Limiter circuit.

Claims (1)

[Scope of utility model registration request] At least two AGC circuits of a receiver including an RF amplifier, an IF amplifier, and a detector, between input and output terminals that take a part of the output of the detector as input and output to the RF amplifier and/or IF amplifier. An AGC circuit for a receiver, characterized in that a limiter circuit consisting of constant voltage element diodes connected in series with mutually opposite polarities is connected.