JPH02215289A - Composite video signal processing circuit - Google Patents
Composite video signal processing circuitInfo
- Publication number
- JPH02215289A JPH02215289A JP3681489A JP3681489A JPH02215289A JP H02215289 A JPH02215289 A JP H02215289A JP 3681489 A JP3681489 A JP 3681489A JP 3681489 A JP3681489 A JP 3681489A JP H02215289 A JPH02215289 A JP H02215289A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- composite video
- video signal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002131 composite material Substances 0.000 title claims abstract description 21
- 238000010586 diagram Methods 0.000 description 9
- 238000001514 detection method Methods 0.000 description 7
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、テレビジジン受像機あるいはビデオモニター
の複合映像信号処理回路に関し、無人力時に同期及び映
像を安定にする回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a composite video signal processing circuit for a television receiver or a video monitor, and more particularly to a circuit for synchronizing and stabilizing video when unattended.
従来の技術
近年のテレビジョン受像機やビデオモニターは、外部入
力端子も数多く設けられておシ、実使用状態では、全て
の入力端子に信号が接続されておシ、信号が供給されて
いることは希れである。また、最近はデジタル信号処理
技術の進歩により、映像信号の処理にメモリーが活発に
利用されるようになっている。さらに、画面上にチャン
ネル番号や、入力モード(例えばビデオ1.ビデオ2と
か)切換を表示す、るオンスクリーン機能、あるいは画
面上に子画面を出したり、ステイル機能を持ったテレビ
受像機が増えている。しかしながら、同期信号が不安定
なノイズチャンネルや、ビデオ入力モードで信号が無人
力の場合は、同期信号が無くなシ、例えばオンスクリー
ンの表示位置が不安定にバラツキ見えにくくなったり、
あるいは、表示位置が大きく動いて見えなくなったシし
、視聴者に不快感を与えていた。Conventional technology Modern television receivers and video monitors are equipped with many external input terminals, and in actual use, signals are connected to all input terminals and signals are supplied to them. is rare. Furthermore, with recent advances in digital signal processing technology, memory has come to be actively used for processing video signals. Furthermore, an increasing number of TV receivers are equipped with on-screen functions that display channel numbers and input mode switching (e.g. video 1, video 2, etc.) on the screen, display sub-screens on the screen, and stay functions. ing. However, if there is a noise channel where the synchronization signal is unstable, or if the signal is unattended in video input mode, the synchronization signal may be lost, for example, the on-screen display position may become unstable and difficult to see.
Alternatively, the display position may have moved so much that it is no longer visible, causing discomfort to the viewer.
従来のオンスクリーン表示部を含む複合映像信号処理回
路の構成を第4図に示す。FIG. 4 shows the configuration of a conventional composite video signal processing circuit including an on-screen display section.
第4図で、1は入力切換回路であシ、受信したテレビ信
号と、外部入力端子ビデオ1.ビデオ2゜ビデオ3から
の信号とを切換える。この切換えた信号Aを映像信号処
理回路2と同期信号処理回路3に供給する。4はオンス
クリーン発生器で、同期信号処理部からの水平パルヌH
P、垂直パルスVpを表示位置の基準にしている。オン
スクリーンの出力信号は映像信号処理回路2にR,G、
B信号で加えられる。5はCRTである。In FIG. 4, 1 is an input switching circuit, which connects the received television signal and the external input terminal video 1. Switch between video 2 and video 3 signals. This switched signal A is supplied to the video signal processing circuit 2 and the synchronization signal processing circuit 3. 4 is an on-screen generator, which generates horizontal PALNU H from the synchronization signal processing section.
P, the vertical pulse Vp is used as the reference for the display position. The on-screen output signal is sent to the video signal processing circuit 2 through R, G,
Added with B signal. 5 is a CRT.
発明が解決しようとする課題
ここで、オンスクリーンの表示位置を決めている垂直パ
ルスvP(垂直位置)と水平パルスHP(水平位置)は
、無人力時や、ノイズチャンネルでは不安定となる。Problems to be Solved by the Invention Here, the vertical pulse vP (vertical position) and horizontal pulse HP (horizontal position), which determine the on-screen display position, become unstable when unmanned or on a noise channel.
本発明は、ノイズチャンネルや無信号の状態でも同期信
号を安定にし、そしてオンスクリーン映像信号も安定に
しようとするものである。The present invention attempts to stabilize the synchronization signal even in a noise channel or no signal state, and also to stabilize the on-screen video signal.
課題を解決するための手段
本発明は同期信号を発生させる同期信号発生器を備える
とともに、複合映像信号の有無を検出する信号検出回路
と、同期信号発生器の出力信号と複合映像信号とを切換
える切換回路と、この切換回路を上記信号検出回路の出
力で制御するように構成し、この切換回路の出力を後段
に供給している。Means for Solving the Problems The present invention includes a synchronization signal generator that generates a synchronization signal, a signal detection circuit that detects the presence or absence of a composite video signal, and switches between the output signal of the synchronization signal generator and the composite video signal. The switching circuit is configured to be controlled by the output of the signal detection circuit, and the output of the switching circuit is supplied to the subsequent stage.
作 用
本発明は上記した構成により、ノイズチャンネルや、無
信号の場合は、信号検出回路により信号無しと判断し後
段に同期信号発生器の出力信号を切換回路を制御して供
給し、信号検出回路によシ、正しく信号が入力されてい
る時は、複合映像信号をそのまま後段へ供給する様に動
作する。つまり、いかなる状態でも同期信号は常に安定
して後段へ入力される。According to the above-described configuration, the present invention determines that there is no signal in the noise channel or in the case of no signal, and supplies the output signal of the synchronizing signal generator to the subsequent stage by controlling the switching circuit, thereby detecting the signal. When the signal is correctly input to the circuit, it operates so as to supply the composite video signal as it is to the subsequent stage. In other words, the synchronization signal is always stably input to the subsequent stage in any state.
実施例
以下本発明の一実施例の複合映像信号処理回路について
図面を参照しながら説明する。第1図は本発明の実施例
のテレビジョン受像機全体ブロック図であシ、第2図は
本発明の複合映像信号処理回路のブロック図、第3図は
無信号検出回路の詳細なブロック図と波形図である。Embodiment Hereinafter, a composite video signal processing circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an overall block diagram of a television receiver according to an embodiment of the present invention, FIG. 2 is a block diagram of a composite video signal processing circuit of the present invention, and FIG. 3 is a detailed block diagram of a no-signal detection circuit. and a waveform diagram.
第1図において、入力切換回路1の後に本発明の複合映
像信号処理回路10が接続され、この出力が従来の映像
信号処理回路2及び同期信号処理回路3へ供給される。In FIG. 1, a composite video signal processing circuit 10 of the present invention is connected after an input switching circuit 1, and its output is supplied to a conventional video signal processing circuit 2 and a synchronous signal processing circuit 3.
次に、本発明の特徴である複合映像信号処理回路につい
て第2図から説明する。第2図で、テレビ同期信号発生
回路12は、既に市販されているICを使用しても良い
。この同期信号発生回路12の出力と入力切換回路1で
切換えられた複合映像信号Aとを切換スイッチ13で切
換えて出力信号Bを得て後段に供給する。この切換スイ
ッチ13を制御する信号は、複合映像信号Aを入力とし
て無信号の検出を行なう無信号検出回路11の出力で行
なう。つまり、入力信号が無いときは、切換スイッチ1
3を■側にして同期信号のみを同期信号発生器12から
後段へ、入力信号が有る時は、スイッチ13を■側にし
てそのまま後段へ供給している。Next, a composite video signal processing circuit, which is a feature of the present invention, will be explained with reference to FIG. In FIG. 2, the television synchronization signal generation circuit 12 may use an IC that is already commercially available. The output of the synchronizing signal generation circuit 12 and the composite video signal A switched by the input switching circuit 1 are switched by a changeover switch 13 to obtain an output signal B, which is supplied to the subsequent stage. The signal for controlling this changeover switch 13 is the output of a no-signal detection circuit 11 which receives the composite video signal A and detects no-signal. In other words, when there is no input signal, selector switch 1
3 is set to the ■ side, only the synchronizing signal is sent from the synchronizing signal generator 12 to the subsequent stage, and when there is an input signal, the switch 13 is set to the ■ side and the synchronizing signal is directly supplied to the subsequent stage.
次に無信号検出回路11の具体回路を第3図を用いて説
明する。入力信号Aを同期分離回路14で同期分離し■
の信号を得る。この信号を9ト’)ガーのモノマルチ1
6へ供給し@の信号を得る。Next, a specific circuit of the no-signal detection circuit 11 will be explained with reference to FIG. The input signal A is synchronously separated by the synchronous separator circuit 14.■
get the signal. 9) Gar's mono multi 1
6 and obtain @ signal.
この信号で切換スイッチ13を制御する。The changeover switch 13 is controlled by this signal.
発明の効果
以上のように本発明によシ、複合映像信号が無くなった
シノイズの場合は、同期信号発生回路の信号に切換えて
後段に供給する為、同期が安定し、オンスクリーン表示
や、メモリーを用いた子画面表示等安定する。又入力切
換や、チャンネル切換時のトランジェントも安定し、常
に安定した画像を提供できるものである。Effects of the Invention As described above, according to the present invention, in the case of noise caused by the loss of a composite video signal, the signal is switched to the signal of the synchronization signal generation circuit and supplied to the subsequent stage, so synchronization is stabilized and on-screen display and memory Stable child screen display using . In addition, transients during input switching and channel switching are stable, and a stable image can always be provided.
第1図は本発明の一実施例のテレビジョン受像機の全体
ブロック図、第2図は本発明の一実施例の複合映像信号
処理回路のブロック図、第3図は無信号検出回路の一実
施例のブロック図と波形図、第4図は従来のテレビジ四
ン受像機のブロック図である。
1・・・・・・入力切換回路、2・・・・・・映像信号
処理回路、リーン発生器、6・・・・・・CRT、1o
・・・・・・複合映像信号処理回路、11・・・・・・
無信号検出回路、12・・・・・・テレビ同期信号発生
回路、13・・・・・・切換回路、14・・・・・・同
期分離回路、15・・・・・・リトリガーモノマルチ。FIG. 1 is an overall block diagram of a television receiver according to an embodiment of the present invention, FIG. 2 is a block diagram of a composite video signal processing circuit according to an embodiment of the present invention, and FIG. 3 is an example of a no-signal detection circuit. Embodiment Block Diagram and Waveform Diagram FIG. 4 is a block diagram of a conventional television receiver. 1...Input switching circuit, 2...Video signal processing circuit, lean generator, 6...CRT, 1o
...Composite video signal processing circuit, 11...
No signal detection circuit, 12... Television synchronization signal generation circuit, 13... Switching circuit, 14... Synchronization separation circuit, 15... Retrigger mono multi.
Claims (1)
発生させる手段と、上記複合映像信号と同期信号とを切
換える手段と、この切換手段の切換えを上記複合映像信
号の有無を検出した信号で制御する手段を有した複合映
像信号処理回路。means for detecting the presence or absence of an input composite video signal, means for generating a synchronization signal, means for switching between the composite video signal and the synchronization signal, and switching of the switching means using a signal detecting the presence or absence of the composite video signal. A composite video signal processing circuit having control means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3681489A JPH02215289A (en) | 1989-02-16 | 1989-02-16 | Composite video signal processing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3681489A JPH02215289A (en) | 1989-02-16 | 1989-02-16 | Composite video signal processing circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02215289A true JPH02215289A (en) | 1990-08-28 |
Family
ID=12480234
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3681489A Pending JPH02215289A (en) | 1989-02-16 | 1989-02-16 | Composite video signal processing circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02215289A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58190180A (en) * | 1982-04-30 | 1983-11-07 | Nec Home Electronics Ltd | Character broadcast receiver |
-
1989
- 1989-02-16 JP JP3681489A patent/JPH02215289A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58190180A (en) * | 1982-04-30 | 1983-11-07 | Nec Home Electronics Ltd | Character broadcast receiver |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPH06178225A (en) | Multiplexed video image television receiver | |
JPH1023377A (en) | Text data processor using television receiver | |
US4814882A (en) | Monitor television apparatus | |
JPH08223500A (en) | Display device | |
KR100307010B1 (en) | Combines the clamp circuit and the synchronous separator. | |
JPH02215289A (en) | Composite video signal processing circuit | |
JP2667599B2 (en) | Television receiver with multi-screen display function | |
JP2578686B2 (en) | MUSE signal receiver | |
JP3279554B2 (en) | Video signal multiplexing method | |
JPH0514616Y2 (en) | ||
JP3396996B2 (en) | Television receiver | |
KR0178901B1 (en) | Auto-control circuit of vertical size of wide tv receiver | |
JPH04249295A (en) | Multiple system color screen display device | |
JPH02248178A (en) | High definition television display device | |
KR19980019007U (en) | Automatic display mode switcher for wide TVs | |
JPH0575948A (en) | Image display device | |
JP3049747B2 (en) | Horizontal trigger / pulse switching circuit | |
JPH02217085A (en) | Television image receiver including teletext receiver | |
JPH05207315A (en) | Television receiver | |
JPH01279691A (en) | Video signal selecting device | |
JPH03205965A (en) | Television receiver | |
JPH02261286A (en) | Fault signal replacement device in slave screen display | |
JPH0447318B2 (en) | ||
JP2000270345A (en) | Television receiver | |
JPH0447779A (en) | Television signal channel selection |