JPH02210949A - Image sensor chip and photoelectric converter using same - Google Patents

Abstract

PURPOSE:To attain signal readout and resetting and the use of a high frequency clock by reading out a signal through one of output lines and resetting other one or two output lines simultaneously. CONSTITUTION:From a control circuit 3, n-phase clock signals phi, phi2,...phin being basic clocks are fetched to photodetection elements 6-1, 6-2,...,6-m, and a sensor signal is read to independent output lines 1-1, 1-2,..., 1-n. The output lines 1-1, 1-2,..., 1-n connect to an analog switch circuit 7 having a reset circuit, and the signals phi1, phi2,...phin from the circuit 3 are used to select an output line reading a signal to an optical signal amplifier 4 and an output line to be reset thereby applying simultaneous readout and reset. The signal amplified by the amplifier 4 is outputted to a common output line 2. According to the operation above, readout of 100% duty is attained.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an image sensor chip and a photoelectric conversion device using the same, and particularly relates to an image sensor chip having a plurality of light-receiving elements and an array of the plurality of light-receiving elements. The present invention relates to a photoelectric conversion device having a plurality of image sensor chips.

[Prior Art] Linear image sensors are widely used in facsimiles, scanners, and the like. Since such linear image sensors are created on silicon wafers, the sensor length is limited by the wafer size, and it is difficult to create an image sensor chip with multiple light-receiving elements arranged in the same length as the original. be. For this reason, the reflected light from the document is reduced using an optical system, and the image is read by reducing and projecting it onto a linear image sensor.

However, in a reading device that uses such a reduction optical system,
A large space must be taken up for the optical system, and the resolution is not sufficient.

To solve this problem, a multi-depth image sensor is used in which a plurality of linear image sensors are arranged in a straight line.

FIG. 3 is a circuit configuration diagram showing the configuration of a conventional image sensor chip.

As shown in FIG. 3, the light receiving units 6-1 to 6-n
The optical signals from the control circuit 3 are basically converted into i4 signals by the control circuit 3 in synchronization with the 'CJ-9' and sequentially read out to the common output line l.

The output signal is inputted to the optical signal amplifier 4 through the reset circuit 5. In the reset circuit 5, resetting and reading are performed alternately in response to a control signal from the control circuit 3. The signal amplified by the optical signal amplifier 4 is output to the common output line 2.

FIG. 4(^) is a circuit diagram showing an example of a specific configuration of the reset circuit. FIG. 4(B) is a timing chart of the signal waveform for operating the reset circuit and the output signal waveform.

In FIG. 4(A), the transistor QS outputs the pixel signal ■0 from the output line I as the output signal VouL to the output line ]a
Transistor Q
R is a transistor for resetting the output line l. A control signal of signal φΔ is input to the gate electrode of the transistor QS, and a control signal of signal φΔ is input to the gate electrode of the transistor QR.
A is German).

A control signal of signal φB is input.

As shown in FIG. 4(B), during the period when the signal φA is on the rise, the pixel signal from the output line 1 is transmitted to the amplifier 4.
The output line I is read out to the output line 2, which serves as the input line of the signal φB, and the output line I is reset during the period in which the signal φB is rising. Since reading and resetting are performed alternately in this way, the duplex of the output signal is approximately 50%.

[Problems to be Solved by the Invention] However, in the conventional example described above, the pixel signals of each image sensor chip are sequentially read out and reset in synchronization with the basic clock, so the readout is basically a duty cycle process. It is difficult to cope with the increase in the frequency of the basic clock, which can increase by more than 50%.

[Means for Solving the Problems] The image sensor chip of the present invention includes: a plurality of output lines to which signals from a plurality of light receiving elements are output; a plurality of switch means to which the plurality of output lines are respectively connected; a common output line to which the outputs of the plurality of switch means are commonly connected;
It is characterized in that it is connected to each of the plurality of output lines, and includes a plurality of reset means.

A photoelectric conversion device of the present invention includes a plurality of image sensor chips in which a plurality of light receiving elements are arranged.

On the image sensor chip, there are provided a plurality of output lines to which signals from the plurality of light receiving elements are output, a plurality of switch means to which the plurality of output lines are respectively connected, and an output of the plurality of switch means. It has a common output line that is commonly connected, and a plurality of reset means that are connected to each of the plurality of output lines described in 11j, and a switch means that is connected to one output line and another - or two or more output lines. It is characterized in that the reset means connected to the line is controlled at the same time, and signal reading and resetting are performed simultaneously.

[Operation] The image sensor chip and photoelectric conversion device of the present invention output pixel signals from a plurality of light receiving elements to a plurality of output lines,
By turning on the switch means from one of the plurality of output lines, an output signal is read out to the common output line, and at the same time, the switch means of the other - or two or more output lines is turned off, and the reset means By turning on the other output lines, the other output lines are reset, making it possible to read and reset signals at the same time.

[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a circuit configuration diagram showing the configuration of an embodiment of an image sensor chip in a photoelectric conversion device of the present invention.

Note that the same components as those shown in FIG. 3 are given the same reference numerals.

As shown in FIG.
Matching lock φ1. φ2. ..., φn is each light receiving element 6-
1.6-2, ...*, 6-m (m fable x n
:X is an integer), and the sensor signals are output to output lines 1-1, 1-2, respectively. ..., 1-n.

This output line 1-1.1-2. . . , 1-n are connected to an analog switch circuit 7 having a reset circuit, and receive the low sum clock signal φ1 . φ2゜...,
By φn, the output line for reading signals to the optical signal amplifier 4 and the output line for resetting are selected, and reading and resetting are performed simultaneously. The signal amplified by the optical signal amplifier 4 is output to the common output line 2. This operation enables 100% duty reading.

Note that the image sensor chip labeled E has a plurality of output lines.
It is provided on one side of the arrayed light-receiving elements, which simplifies the circuit configuration, reduces the occupied area h1, and makes the chip smaller.

The configuration of the analog switch circuit will be described below. Incidentally, for the sake of simplicity of explanation, the case of a two-phase clock will be discussed here.

FIG. 2(A) is a circuit diagram showing a configuration example of an analog switch circuit having a reset circuit.

FIG. 2(B) is a timing chart of the signal waveform for operating the analog switch circuit and the output signal waveform.

In FIG. 2(A), a reset transistor QRI is connected to the output line 1-1, and a reset transistor QR2 is connected to the output line 1-2. Output line 1
~1 is connected to transistor QS+.

Gate electrode of transistor QSI and transistor QR
A large caballus φ1 enters the gate electrode No. 2. Output line 1-
2 is connected to transistor QS2, and transistor QS
An input voltage φ2 enters the gate electrode of transistor QRI and the gate electrode of transistor QRI.

Next, an embodiment of a method for driving the analog switch circuit will be described.

In Figure 2 (B), 2 generated from the basic clock
Phase clock φ1. During period 1 within φ2, a state is maintained in which the pulse of clock φ1 rises and the pulse of clock φ2 falls, transistors QSI and QR2 are in the on state, and transistor QS
2 and Q old are in the off state. Therefore, output line 1-1
As for the pixel signal VOI, one pixel signal VOI is read out to the common output line 1a through the transistor QS+. -force output line 1
-2 is reset by transistor QR2. At this time, since the transistor QS2 is in an off state, it does not affect the output line 1a, and only the pixel signal V old read out to the output lines 1 to 1 is sent to the output line 1a.
It is read out as ouL.

In the period L2, a state is maintained in which the pulse of the clock φ2 rises q and the pulse of the clock φ1 falls, the transistors QS2 and QRI are in the on state, and the transistors QSI and QR2 are in the off state. The output line 12 has already been reset in the period L1, and after the reset, the pixel signal VO2 is read out to the common output line +a through the transistor QS2. -The power output line 11 is reset by the transistor QRI. At this time, since the transistor QSI is in the off state, it does not affect the output line 1a, and the output line 1a is not affected.
a has output I5i! Pixel signal VO read out to +-2
2 is read out as the output signal Vout.

The operations described above are repeated in the same manner thereafter.

[Effects of the Invention] As explained above in detail, the image sensor chip and photoelectric conversion device according to the present invention read out a signal from one of the output lines, and simultaneously reset the other output line or two or more output lines. Therefore, it is possible to read out the signal and reset it at the same time, and as a result, it is possible to read out the output with a duty of -100%.
It becomes possible to increase the frequency of the clock.

Note that if multiple output lines are provided on one side of the arrayed light-receiving elements, the circuit configuration can be simplified and the occupied area can be reduced.
Chips can be made smaller.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram showing the configuration of an embodiment of an image sensor chip in a photoelectric conversion device of the present invention. FIG. 2(A) is a circuit diagram showing a configuration example of an analog switch circuit having a reset circuit. FIG. 2+8) is a timing chart of the signal waveform for operating the analog switch circuit and the output signal waveform. FIG. 3 is a circuit configuration diagram showing the configuration of a conventional image sensor chip. FIG. 4(A) is a circuit diagram showing an example of a specific configuration of the reset circuit. FIG. 4B is a timing chart of the signal waveform for operating the reset circuit and the output signal waveform. 1-1.1-2. ..., un: output line, 2: common output line, 3: control circuit, 4: optical signal amplifier, 6-1.
6-2°・, 6-m: Light receiving element, 7: Analog switch circuit, QRl, QR2, QSl, QS2:
t-rangister.

Claims (4)

[Claims] (1) A plurality of output lines to which signals from a plurality of light receiving elements are output, a plurality of switch means to which the plurality of output lines are respectively connected, and a common output to which the outputs of the plurality of switch means are commonly connected. An image sensor chip having a line and a plurality of reset means connected to each of the plurality of output lines. (2) The image sensor chip according to claim 1, wherein the plurality of output lines are provided on one side of the arrayed light receiving elements. (3) In a photoelectric conversion device having a plurality of image sensor chips in which a plurality of light receiving elements are arranged, a plurality of output lines to which signals from the plurality of light receiving elements are output are provided on the image sensor chip; , a common output line to which the outputs of the plurality of switch means are connected in common, and a plurality of reset means connected to each of the plurality of output lines. , A photoelectric conversion device characterized in that a switch means connected to one output line and a reset means connected to one or more other output lines are controlled simultaneously, and signal reading and resetting are performed simultaneously. . (4) The photoelectric conversion device according to claim 3, wherein the plurality of output lines are provided on one side of the arrayed light receiving elements.