JPH0220928A - Attenuation device - Google Patents

Abstract

PURPOSE:To execute muting even in a silent part such as intermusic, etc., of a compact disk by controlling an output level of a D/A converter, based on an output of a zero detector for detecting a fact that an input of a digital filter is zero for a prescribed period. CONSTITUTION:The title device is provided with a D/A converter for converting an output of a digital filter to an analog signal, and a level controller for controlling an output level of the D/A converter 2, based on an output 4 of a zero detector for detecting a fact that an input of a digital filter is zero for a prescribed period. That is, by detecting infinity zero of an input of the digital filter 1, and controlling the output level of the D/A converter 2 thereby, an input signal is delayed by the digital filter 1 even when a zero input has been varied to other value than zero, therefore, prior to a variation of the input, a level control of the output of the D/A converter 2 can be executed, and even in a silent part such as intermusic, etc., of a compact disk, muting can be applied.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an attenuation device, and particularly relates to attenuation when zero continues for a certain period of time or more (hereinafter referred to as infinity zero) in digital equipment or the like.

2. Description of the Related Art Modern digital devices such as compact disc players use various methods to reduce the noise level of silent parts. For example, there are devices that use relays, transistor switches, etc., to apply muting when playing compact discs outside the device, thereby blocking system noise.

Problems to be Solved by the Invention However, with the above configuration, muting is not applied while the combo disc is being played.
For example, there is a problem in that muting is not applied to silent parts between songs on a compact disc, or to a compact disc on which Infinity Zero is recorded, even though there is no sound.

In view of the above-mentioned problems, the present invention provides an attenuation device that performs muting even in silent portions between songs on a compact disc.

Means for Solving the Problems In order to solve the above problems, an attenuation control device according to the present invention includes a digital filter that inputs a digital signal, a D/A converter that converts the output of the digital filter into an analog signal, and a digital filter. D/D/
A level control device is provided to control the output level of the A conversion device.

Function As described above, the infinity zero of the input of the digital filter is detected and the output level of the D/A converter is controlled thereby.
Even when the input signal changes to non-zero (hereinafter referred to as non-zero), the input signal is delayed by the digital filter, so it is possible to control the level of the D/A converter output prior to the input change, and it is possible to control the level of the D/A converter output before the input changes. It is possible to apply muting to even parts.

Embodiment Hereinafter, one embodiment of the attenuation device of the present invention will be explained based on the drawings.

An embodiment of an attenuation device according to the invention is shown in FIG. In FIG. 1, 1 is a digital filter (for example, a 128-tap FIR filter), which converts the sampling rate of an input digital signal. Here, 4 times oversampling is performed. 2 is D
The /A converter converts the input digital signal into an analog signal. 3 is an attenuator, which attenuates the input analog signal based on the control signal applied to the terminal C. Here, attenuation is performed when 1" is given to terminal C. 4 is a zero detector, and when zero data is continuously given for a certain period of time, it outputs '1" and non-zero input is given. It immediately outputs '0'.

Next, the operation shown in FIG. 1 will be explained. When the input changes from a non-zero signal to an infinite zero, the zero detector 4 outputs "'1" after a certain period of time. The fixed time mentioned here means that when infinity zero is input to the digital filter 1, the time is longer than the sum of the time for which the output definitely becomes infinity zero and the settling time of the D/A converter 2. It's good. Since the output of zero detector 4 is given to terminal C of attenuator 3, attenuator 3
performs attenuation of the output of the D/A converter 2 and outputs it. Since unnecessary noise such as residual noise of a normal system is included in the D/A converter output, the residual noise can be reduced by doing as described above.

Next, when the input becomes an infinite zero digital signal, the zero detector 4 immediately changes its output from '1' to 0', which is applied to the attenuator 3. Attenuator 3
This releases the attenuation of the output of the pD/A converter 2. At this time, the non-zero signal of the D/A converter 2 output is delayed by the digital filter 1, and the D/A converter 2 output is
Since it is applied to the A converter 2, an analog signal also appears which corresponds to the digital zero. Therefore, attenuator 3
When the level is switched by , the input to the attenuator 3 remains zero and does not change, so no noise or the like is generated due to the level switching. In this way, it is possible to reliably mute even the Infinity Zero signal between songs on a compact disc.

FIG. 2 shows an embodiment of the zero detector 4 in FIG. To explain this figure, 6 is an NZ detector which detects non-zero input. Here, when inputting zero, enter “o”,
When the input is non-zero, it outputs 1". If the input is 16 bits, an OR gate of 16 people is sufficient. 6 is a counter, which counts the clock signal given to terminal GK, and uses a 10-bit counter. The terminal Q is the 10th bit output (MSB). The terminal R is an asynchronous reset terminal, and when 1'' is applied, the counter 6 is reset. Although any clock signal may be used, a clock signal having the sampling period of the input signal is used here. 7 is a D type flip-flop. The data given to the terminal is latched at the falling edge of the terminal OK. When the terminal R is set to 1", the flip-flop 7 is reset and the terminal Q outputs "o".

Next, the operation shown in FIG. 2 will be explained. When the input is non-zero, the NZ detector 5 outputs '1', so the counter 6,
Flip-flop 7 is in a reset state. Therefore, the output of the zero detector 4 is 0". When the input reaches infinite zero, the NZ detector 6 outputs "0" and the counter 6
, the reset of the flip-flop 7 is released, and the counter 6 starts counting. When 1024 clock signals are counted, the terminal Q changes from 1" to '0', so the terminal Q of the flip-flop 7 outputs 1".Thereby, infinite zero is detected.When the input changes from infinite zero to non-zero, Since the NZ detector 5 outputs 1'', the counter 6 and flip-flop 7 are reset, and the output of the zero detector 4 immediately becomes ``o''.

FIG. 3 shows an embodiment of the attenuator 3 in FIG. 1. To explain this diagram, 10.11 is an analog switch, and when 1" is applied to terminal C, it becomes conductive and '0"
becomes non-conducting. 13 is a buffer amplifier,
14 is an inverter.

Next, the operation shown in FIG. 3 will be explained. When the applied control input is "o", l'o" is applied to the analog switch 11, and '1' is applied to the analog switch 10 by the inverter 14. Therefore, the analog switch 1o becomes conductive, the analog switch 11 becomes non-conductive, and the input becomes the buffer 1 amplifier 13.
and is output as is as the output of the attenuator 3.

Conversely, when the control input is 1'', the analog switch 10 is non-conductive and the analog switch 11 is conductive, so the ground potential is applied to the buffer amplifier 13, and system noise applied to the input is blocked and muting is performed. .

FIG. 4 shows a second embodiment of the attenuator 3 in FIG. 1. To explain this diagram, 2o is an operational amplifier, 21
23 are resistors for negative feedback, and the resistor 21 has a higher resistance than the resistor 22.

Next, to explain the operation of FIG. 4, when the applied control input is 0'', 0'' is applied to the analog switch 11, and 1'' is applied to the analog switch 1o by the inverter 14. Therefore, the analog switch 1o is conductive; Since the analog switch 11 is not conductive and the resistor 21 on the high resistance side enters the feedback loop, the gain of the attenuator 3 increases.

When the control input is "1", the reverse analog switch 1° is non-conductive and the analog switch 11 is conductive, so the resistor 22 on the low resistance side enters the feedback loop, and the gain of the attenuator 3 becomes small. This lowers the level of the system nozzle to which the input signal is applied and outputs it from the attenuator 3.

Effects of the Invention As described above, the attenuation device of the present invention includes a digital filter that inputs a digital signal, a D/A converter that converts the output of the digital filter into an analog signal, and an input signal of the digital signal μ. By having a zero detector which serves as an input and detects that this input is zero for a certain period of time, and a level control device which controls the output level of the D/A converter based on the output of the zero detector, Even when zero input changes to non-zero input, the input signal is delayed by the digital filter, so it is possible to control the level of the D/A converter output before the input changes, and it is possible to control the level of the D/A converter output before the input changes. This has an excellent effect in that muting can be applied even to a portion.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an attenuation device according to an embodiment of the present invention, FIG. 2 is a circuit diagram showing an embodiment of the zero detector in FIG. 1, and FIG. 3 is a circuit diagram showing an embodiment of the attenuator in FIG. 1. Circuit Diagram FIG. 4 is a circuit diagram showing another embodiment of the attenuator in FIG. 1. 1...Digital filter, 2...D
/A converter, 3... Attenuator, 4...
...Zero detector. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (1)

[Claims] A digital filter that receives a digital signal as an input, a D/A converter that converts the output of the digital filter into an analog signal, and an input signal of the digital filter that receives the input signal and detects that this input is zero for a certain period of time. An attenuation device comprising: a zero detector; and a level control device that controls the output level of the D/A converter based on the output of the zero detector.