JPH02205322A - Method of forming thin-film - Google Patents
Method of forming thin-filmInfo
- Publication number
- JPH02205322A JPH02205322A JP2534189A JP2534189A JPH02205322A JP H02205322 A JPH02205322 A JP H02205322A JP 2534189 A JP2534189 A JP 2534189A JP 2534189 A JP2534189 A JP 2534189A JP H02205322 A JPH02205322 A JP H02205322A
- Authority
- JP
- Japan
- Prior art keywords
- film
- silicon
- boron
- nitrogen
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000010409 thin film Substances 0.000 title claims abstract description 29
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 13
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 13
- 239000010703 silicon Substances 0.000 claims abstract description 13
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims abstract description 12
- 229910052796 boron Inorganic materials 0.000 claims abstract description 12
- 239000010408 film Substances 0.000 abstract description 36
- 238000004140 cleaning Methods 0.000 abstract description 5
- 229910007991 Si-N Inorganic materials 0.000 abstract 1
- 229910006294 Si—N Inorganic materials 0.000 abstract 1
- 239000004615 ingredient Substances 0.000 abstract 1
- 230000015572 biosynthetic process Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000011229 interlayer Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910000077 silane Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000368 destabilizing effect Effects 0.000 description 1
- -1 diborane Chemical compound 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 239000000428 dust Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000012495 reaction gas Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、低誘電率の絶縁薄膜の厚膜化のため〔従来の
技術〕
超高速、高密度集積回路の実現には、金属材料に低抵抗
なアルミニウムを用いる多層配線技術が必要不可欠であ
る。このため、層間絶縁膜の形成は４５０℃以下の低温
で行われる必要がある。かかる層間絶縁膜としては、常
圧あるいはプラズマＣＶＤ （Ｃｈｅｍｉｃａｌ Ｖ
ａｐｏｒ Ｄｅｐｏｓｉｔｉｏｎ：ＣＶＤ）法による
シリコン酸化膜やリンをドープしたシリコン酸化膜（以
下ＰＳＧ（Ｐｈｏｓｐｈｏ−３ｉｊ！１ｃａｔｅ Ｇ
ｌａｓｓ）膜という）、あるいはプラズマＣＶＤ法によ
るシリコン窒化膜などが用いられてきた。しかし、デバ
イスの微細化の進展と共に、層間絶縁膜にも高いアスペ
クト比（溝の縦と横幅の比率、溝が深くなればなるほど
アスペクト比は増加する）の微細溝への充填が要求され
てきており、従来の薄膜形成方法では対処が困難になっ
てきている。[Detailed Description of the Invention] [Industrial Field of Application] The present invention aims to increase the thickness of an insulating thin film with a low dielectric constant [Prior Art] In order to realize ultra-high speed, high-density integrated circuits, metal materials Multilayer wiring technology using low-resistance aluminum is essential. Therefore, the interlayer insulating film needs to be formed at a low temperature of 450° C. or lower. Such an interlayer insulating film can be formed using normal pressure or plasma CVD (Chemical V
Silicon oxide film or phosphorus-doped silicon oxide film (hereinafter referred to as PSG (Phospho-3ij!1cate G)) by apor deposition (CVD) method
A silicon nitride film formed by a plasma CVD method or the like has been used. However, with the progress of miniaturization of devices, interlayer insulating films are required to fill fine grooves with a high aspect ratio (the ratio of the length and width of the groove; the deeper the groove, the higher the aspect ratio). Therefore, it is becoming difficult to deal with this problem using conventional thin film forming methods.
高アスペクト比の微細溝への絶縁膜の充填方法としでは
、有機あるいは無機塗布膜を用いる方法、有機シランを
用いる方法、バイアススパッタ法などが提案されている
。有機あるいは無機塗布膜を用いる方法としては、ポリ
イミド系の樹脂（商品名例えばＰＩＱ）あるい・はスピ
ンオンガラス（ＳＯＧ）が代表的である。これら塗布膜
は微細溝への充填特性という点からは充分な特性を有し
ているが、塗布後数百℃でのアニールが必要であること
、膜の付着力は下地の材料および表面状態に非常に敏感
であること、リーク電流が他の無機絶縁膜に比べて大き
いこと、さらに、ＳＯＧ膜は厚膜化が困難でフン酸系溶
液に対するエツチングレートが極めて大きい、等の欠点
を有している。有機シランを反応ソースに用いる方法は
、下地の段差形状に忠実な被覆特性が得られるため、従
来の薄膜形成方法に比べて溝への充填特性は大幅に改善
されるものの、アスペクト比が２を越える場合には溝内
部にボイドが形成されるようになる。バイアススパッタ
法は膜形成と同時にエツチングを行うことにより平坦化
薄膜形成を行う方法であるが、アスペクト比が１付近に
限界があること、エツチングに伴い下地にダメージを及
ぼすこと、および膜形成とエツチングを同時に行うため
スループットが極めて小さい等の欠点を有している。As methods for filling insulating films into fine grooves with high aspect ratios, methods using organic or inorganic coatings, methods using organic silane, bias sputtering, etc. have been proposed. Typical methods using organic or inorganic coating films include polyimide resins (product names such as PIQ) and spin-on glass (SOG). Although these coated films have sufficient properties in terms of filling characteristics into fine grooves, they require annealing at several hundred degrees Celsius after application, and the adhesion of the film depends on the underlying material and surface condition. SOG films have drawbacks such as being extremely sensitive, having a large leakage current compared to other inorganic insulating films, and being difficult to thicken and having an extremely high etching rate with hydrofluoric acid solutions. There is. The method of using organic silane as a reaction source provides coating characteristics that are faithful to the step shape of the base, so the filling characteristics of grooves are greatly improved compared to conventional thin film formation methods, but the aspect ratio is 2. If it exceeds the groove, voids will be formed inside the groove. Bias sputtering is a method of forming a flattened thin film by performing etching at the same time as film formation, but there are limitations when the aspect ratio is around 1, damage to the underlying layer is caused by etching, and problems with film formation and etching. It has drawbacks such as extremely low throughput because it performs both at the same time.
以上の方法に代わる技術として、最近バイアスＥＣＲ電
子サイクロトロン共鳴（Ｅｌｅｃｔｒ。As an alternative technique to the above methods, bias ECR electron cyclotron resonance (Electr) has recently been proposed.
ｎ Ｃｙｃｌｏｔｒｏｎ Ｒｅ５ｏｎａｎｃｅ）法
による絶縁膜形成技術が注目されている。本方法はＥＣ
Ｒイオン源により高効率な励起が可能なため、薄膜形成
温度の低温化が可能なこと、高アスペクト比の微細溝へ
の絶縁膜の充填が可能なこと等の特徴を有し、さらに、
最近では実用的なスループットが得られる装置の開発も
行われてきている。しかし、バイアスＥＣＲ法では低温
で緻密な膜形成が行える反面、シリコン窒化膜のような
引っ張り応力の大きな膜の厚膜形成はできず、もっばら
シリコン酸化膜を対象として薄膜形成が行われている。2. Description of the Related Art An insulating film forming technique using the Cyclotron Re5onance method is attracting attention. This method is EC
Since highly efficient excitation is possible using the R ion source, it has features such as the ability to lower the thin film formation temperature and the ability to fill fine grooves with a high aspect ratio with an insulating film.
Recently, devices that can provide practical throughput have been developed. However, although the bias ECR method allows the formation of dense films at low temperatures, it is not possible to form thick films with large tensile stress such as silicon nitride films, and thin film formation is mainly performed on silicon oxide films. .
層間絶縁膜材料としてのシリコン酸化膜を考えた場合、
比誘電率が４と小さく、良好な絶縁特性および密着性が
得られる等の利点がある。しかし、スルーホールが微細
になるに伴いスルーホール加工時のドライエツチングの
過程で、酸化膜中の酸素が配線材料のアルミニウムと反
応しコンタクト特性を不安定化したり、シリコン酸化膜
はフレオン系ガスによるプラズマクリーニングができな
いため、装置保守が煩雑になることおよび装置内のパー
ティクルが歩留まり低下の原因になる等の欠点があった
。When considering silicon oxide film as an interlayer dielectric material,
It has advantages such as having a low dielectric constant of 4 and good insulation properties and adhesion. However, as through-holes become finer, oxygen in the oxide film reacts with the aluminum wiring material during the dry etching process during through-hole processing, destabilizing the contact characteristics, and the silicon oxide film is damaged by freon-based gas. Since plasma cleaning cannot be performed, there are drawbacks such as complicated equipment maintenance and particles inside the equipment that cause a decrease in yield.
本発明の目的は、バイアスＥＣＲ法による薄膜形成にお
いて低応力でプラズマクリーニングが容易な絶縁薄膜の
形成方法を提供するものである。An object of the present invention is to provide a method for forming an insulating thin film using a bias ECR method, with low stress and easy plasma cleaning.
本発明はバイアスＥＣＲ法によりシリコン、ボロン、窒
素を主成分とする絶縁薄膜を形成することを最も主要な
特徴とする。従来バイアスＥＣＲ法では不可能だったプ
ラズマクリーニングが容易な厚い絶縁薄膜の形成が可能
となる。The main feature of the present invention is that an insulating thin film containing silicon, boron, and nitrogen as main components is formed by a bias ECR method. It becomes possible to form a thick insulating thin film that is easy to plasma clean, which was impossible with the conventional bias ECR method.
緻密なシリコン窒化膜は大きな引っ張り応力を有するた
め、たとえばＣＶＤ法で薄膜形成を行う場合には０．２
μｍ程度以上の膜形成を行うとクランクの発生が生ずる
。一方、６００’Ｃ以上の高温ＣＶＤ法により形成した
窒化ホウ素薄膜は圧縮応力を有することが知られており
、したがって、５ｔ−ＮおよびＢ−Ｎ結合を有する薄膜
においては引っ張りおよび圧縮応力が相殺されて低い応
力値が実現でき、その結果厚い膜の形成が可能になる。Since a dense silicon nitride film has a large tensile stress, for example, when forming a thin film using the CVD method, the
If a film with a thickness of about μm or more is formed, cranks will occur. On the other hand, boron nitride thin films formed by high-temperature CVD at temperatures above 600'C are known to have compressive stress. Therefore, in thin films with 5t-N and B-N bonds, tensile and compressive stresses are canceled out. Therefore, low stress values can be achieved, resulting in the formation of thick films.
プラズマＣＶＤ法で形成したシリコン、ボロン、窒素を
主成分とする薄膜においては、膜中での結合は５ｉ−Ｎ
およびｌ３−Ｎ結合がら構成されていること、および膜
中のＢ−Ｎ結合の割合が増加するにともない、薄膜の応
力はより圧縮応力になることが知られている。したがっ
て、バイアスＥＣＲ法のように緻密な膜形成が行える方
法では、厚いシリコン窒化膜を形成することは不可能で
あるが、５ｉ−ＮおよびＢ−Ｎ結合がら構成されるシリ
コン、ボロン、窒素を主成分とする絶縁膜の場合には厚
膜化が可能になる。さらに具体的には、シリコン、ボロ
ン、窒素を主成分とする絶縁薄膜のそ・れぞれの原子の
原子濃度比として、Ｓｔ、 Ｂ。In a thin film mainly composed of silicon, boron, and nitrogen formed by plasma CVD, the bond in the film is 5i-N.
It is known that the stress in the thin film becomes more compressive stress as the proportion of B-N bonds in the film increases. Therefore, it is impossible to form a thick silicon nitride film using a method that can form a dense film such as the bias ECR method, but silicon, boron, and nitrogen composed of 5i-N and B-N bonds In the case of an insulating film as the main component, it becomes possible to increase the thickness of the film. More specifically, St and B are the atomic concentration ratios of the respective atoms of an insulating thin film whose main components are silicon, boron, and nitrogen.
Ｎ２に対して０ ＜ ｘ ＜０．１５，０−３０ ＜ｙ
＜ｏ、５１及び０、５ ＜ ｚ ＜０．５５（ここで
ｘ ＋ ｙ ＋ ｚ ＝１．ＯＯ）の範囲にあることが
望ましい数値である。0 < x < 0.15, 0-30 < y for N2
Desirable values are in the ranges <o, 51 and 0, 5 < z < 0.55 (here x + y + z = 1.OO).
例えば、モノシラン、ジボラン、および窒素ガス流量を
それぞれ１５． １５． ７５ ｓ ｅ ｃｍ （ｓＬ
ａｎｄａｒｄ ｃｕｂｉｃ ｃｍ／ｍｉｎ、）。For example, the monosilane, diborane, and nitrogen gas flow rates are each 15. 15. 75 s e cm (sL
andard cubic cm/min,).
反応ガス５Ｘ１０−’Ｔｏｒｒ、マイクロ波パワー９０
０Ｗの条件で形成したシリコン、ボロン、および窒素を
主成分とする薄膜の応力は７Ｘ１０’ｄｙｎｅ／ｃｍ”
の圧縮応力となり、たとえばシリコンウェハ上に約２μ
ｍ堆積してもクランクの発生は認められない。またこの
膜はフレオン系ガスのプラズマクリーニングによって容
易にエツチングできる。さらに、この膜の比誘電率は３
．６とシリコン酸化膜よりも低い値である。Reaction gas 5X10-'Torr, microwave power 90
The stress of a thin film mainly composed of silicon, boron, and nitrogen formed under 0W conditions is 7X10'dyne/cm"
For example, about 2μ on a silicon wafer.
Even if m is deposited, no cranking is observed. Moreover, this film can be easily etched by plasma cleaning with Freon gas. Furthermore, the dielectric constant of this film is 3
．． 6, which is lower than that of silicon oxide film.
バイアスＥＣＲ法によりシリコン、ボロン、窒素を主成
分とする絶縁薄膜を形成することにより、以下に述べる
ような効果が得られる。すなわち、フレオン系ガスを装
置内に導入し、プラズマを発生することにより容易かつ
短時間でクリーニングが可能なため、装置内にダストの
発生を抑制できると共に、装置の保守・メインテナンス
が容易になる。さらに、バイアスＥＣＲ法による薄膜形
成を行うため、低誘電率の絶縁材料を微細スペースに空
隙無しに充填することが可能になる。By forming an insulating thin film containing silicon, boron, and nitrogen as main components by the bias ECR method, the following effects can be obtained. That is, by introducing Freon-based gas into the device and generating plasma, cleaning can be performed easily and in a short time, so that dust generation within the device can be suppressed and maintenance of the device can be facilitated. Furthermore, since the thin film is formed by the bias ECR method, it becomes possible to fill minute spaces with an insulating material having a low dielectric constant without voids.
特許出願人 日本電信電話株式会社 代理人 弁理士 玉 蟲 久五部 （外１名）Patent applicant: Nippon Telegraph and Telephone Corporation Agent Patent Attorney Tama Mushi Kugobe (1 other person)
Claims (1)
薄膜をＥＣＲイオン源を用いる薄膜形成装置を用いて形
成することを特徴とする薄膜形成方法。 ２、シリコン、ボロン、および窒素を主成分とする絶縁
薄膜が、それぞれの原子の原子濃度比として、Ｓｉ＿ｘ
Ｂ＿ｙＮ＿ｚに対して０＜ｘ＜０．１５、０．３０＜ｙ
＜０．５、及び０．５＜ｚ＜０．５５（ここでｘ＋ｙ＋
ｚ＝１．００）の範囲にあることを特徴とする請求項１
記載の薄膜形成方法。[Scope of Claims] 1. A thin film forming method, characterized in that an insulating thin film containing silicon, boron, and nitrogen as main components is formed using a thin film forming apparatus using an ECR ion source. 2. An insulating thin film mainly composed of silicon, boron, and nitrogen has an atomic concentration ratio of Si_x
0<x<0.15, 0.30<y for B_yN_z
<0.5, and 0.5<z<0.55 (where x+y+
Claim 1 characterized in that it is in the range of z=1.00).
The thin film forming method described.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2534189A JPH02205322A (en) | 1989-02-03 | 1989-02-03 | Method of forming thin-film |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2534189A JPH02205322A (en) | 1989-02-03 | 1989-02-03 | Method of forming thin-film |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02205322A true JPH02205322A (en) | 1990-08-15 |
Family
ID=12163203
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2534189A Pending JPH02205322A (en) | 1989-02-03 | 1989-02-03 | Method of forming thin-film |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02205322A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6277203B1 (en) | 1998-09-29 | 2001-08-21 | Lam Research Corporation | Method and apparatus for cleaning low K dielectric and metal wafer surfaces |
-
1989
- 1989-02-03 JP JP2534189A patent/JPH02205322A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6277203B1 (en) | 1998-09-29 | 2001-08-21 | Lam Research Corporation | Method and apparatus for cleaning low K dielectric and metal wafer surfaces |
| US6319330B1 (en) | 1998-09-29 | 2001-11-20 | Lam Research Corporation | Method and apparatus for cleaning low K dielectric and metal wafer surfaces |
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