JPH02197176A - Thin film memory element - Google Patents

Abstract

PURPOSE:To enable a thin film memory element to read out stably by a method wherein a gate electrode facing a semiconductor layer through the intermediary or a gate insulating film which has a charge storing function is made to serve as a write/erasing electrode and another gate electrode facing the semiconductor layer through the intermediary or another gate insulating film which has no charge storing function is made to serve as a readout electrode. CONSTITUTION:An insulating film 15 is formed on a semiconductor layer 13 and a source electrode S and a drain electrode D which are connected to the layer 13 and almost on the whole surface of a substrate 11, and n gate electrode G2 facing the semiconductor layer 13 is formed on the insulating film 15. And, a gate electrode G1 out or the gate electrodes G1 and G2. which faces the semiconductor layer 15 through the intermediary or a gate insulat ing film 12 which has a charge storing function, is made to serve as a write/erasing electrode, and the gate electrode G2 which faces the semiconductor layer 13 through the intermediary of a gate insulating film 15 which has no charge storing function is made to serve as a readout electrode. By this setup, write and erasing are executed using the gate electrode G1 which faces the semiconductor layer 13 through the intermediary of the gate insulating film 12 which has a charge storing function, and readout is executed using the gate electrode G2 which faces the semiconductor layer 13 through the intermediary or the gate insulating film 15 which has no charge storing function.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to electrically programmable/sequentially readable/erasable thin film memory elements.

[Conventional technology]

Recently, thin film memory devices using thin film transistors have been developed as electrically writable/readable/erasable memory devices.

FIG. 7 shows the conventional thin film memory element described above, in which an inverted staggered thin film transistor is used. This thin film memory element has an inverted staggered thin film transistor having a memory effect formed on an insulating substrate 1 made of glass or the like.This inverted staggered thin film transistor has a gate electrode G formed on the substrate 1.
A gate insulating film 2 is formed on the electrode G over almost the entire surface of the substrate 1, and a type 1 a- is formed on the gate insulating film 2 to face the gate electrode G.
It consists of a semiconductor layer 3 made of Sl (amorphous silicon), and a source electrode S and a drain electrode formed on this semiconductor layer 3 via an n÷-a-51 layer 4. Note that the gate electrode G and the source and drain electrodes S.

Each of D is connected to a wiring not shown.

The gate insulating film 2 is an insulating film having a charge storage function in order to provide a memory effect to the thin film transistor, and the gate insulating film 2 has a composition ratio of, for example, silicon atoms SI and nitrogen atoms N. (Sl/N) is larger than the stoichiometric ratio (S1/N-0,75) (S
1/N-0, 85 to 1.1).

This thin film memory element has hysteresis in its gate voltage vG - drain current (current flowing between source and drain) l+) characteristic, and electrically writes/reads/ /
F! ! It has a removable memory effect.

FIG. 9 shows the vG-rp characteristics of the thin film memory element as shown in FIG.
This figure shows the results of measurement using the a+ constant path as shown in the figure, and the VG-ID characteristic of the thin film memory element has hysteresis as shown in FIG.

Then, a drain current I of 1 nA is applied to the thin film memory element.
Voltage ΔVth when D flows (hereinafter referred to as threshold voltage)
When we measure the threshold voltage (ΔV th
-n) becomes -15V, and the thin film memory element exhibits depletion type transistor characteristics as shown in the characteristic curve a in FIG. 9, in which the drain current ID flows even when the gate voltage VG is set to OV. Figure 10 (b
), when a voltage of +30V is applied to the gate electrode G, the threshold voltage (ΔV th-p) becomes +12V, and the thin film memory element has a drain current of ■ unless the gate voltage vG is higher than OV. The characteristic curve in FIG. 9 shows an enhancement type transistor characteristic in which no current flows.

Therefore, in order to use the thin film memory element, it is only necessary to control the voltage applied to the gate electrode G.
When a voltage of -30V is applied to the gate electrode G and a voltage of +IOV is applied to the drain electrode, and the source electrode S is grounded as shown in FIG. Figure (b
), applying a voltage of +30V1 to the gate electrode G and +10V to the drain electrode, and grounding the source electrode S,
The thin film memory element exhibits enhancement type transistor characteristics and enters a written state.

For reading, as shown in FIG. 10(C), a voltage of +IOV is applied to the drain electrode, the source electrode S is grounded, and the selection voltage is QV and the non-selection voltage is -20V to the gate electrode G.
This can be done by applying a pulse voltage of .

[Problem to be solved by the invention]

However, the above-mentioned conventional thin film memory element cannot write/write.
Since a voltage is applied to the same gate electrode G during erasing and reading, the threshold voltages ΔV th-n and Δv th-p change as shown in FIG. 11 as reading is repeated. However, when the number of readings exceeds several thousand times, stable reading becomes impossible.

°The present invention has been made in view of the above-mentioned circumstances, and its purpose is to provide a thin film whose threshold voltage does not change even after repeated readouts, and whose readout can be performed semi-permanently and stably. An object of the present invention is to provide a memory device.

[Means to solve the problem]

In order to achieve the above object, the thin film memory element of the present invention includes a semiconductor layer, a source electrode and a drain electrode connected to the semiconductor layer, and a first gate insulating film that faces one surface of the semiconductor layer with a first gate insulating film interposed therebetween. 1 gate electrode and a second gate electrode facing the other surface of the semiconductor layer with a second gate insulating film interposed therebetween, and one of the first and second gate insulating films is configured to accumulate charge. The gate insulating film is an insulating film with a function, and the other gate insulating film is an insulating film without a charge storage function, and between the first and second gate electrodes, the gate insulating film with a charge storage function is A gate electrode facing the semiconductor layer is used as a write/erase electrode, and a gate electrode facing the semiconductor layer via the gate insulating film having no charge storage function is used as a read electrode.

[Effect]

That is, the thin film memory element of the present invention is basically a thin film transistor having a memory effect, which is composed of a gate electrode, a gate insulating film having a charge storage function, a semiconductor layer, and source and drain electrodes, but also having a charge storage function. Another gate electrode is provided that faces the semiconductor layer through a gate insulating film that has a charge storage function, and writing and erasing are performed using the original gate electrode of the thin film transistor that faces the semiconductor layer through a gate insulating film that has a charge storage function. The readout is performed using another gate electrode that faces the semiconductor layer through a gate insulating film that does not have a charge storage function. If reading is performed using electrodes, the threshold voltage will not change even if reading is repeated, so that stable reading can be performed semi-permanently.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

1 and 2 are a sectional view and a plan view of the thin film memory element of this example. To explain the structure of this thin film memory element, in FIGS. 1 and 2, 11 is an insulating substrate made of glass or the like, G1 is a first gate electrode formed on this insulating substrate 11, and 12 is the first The first gate insulating film 12 is formed on the gate electrode G1 over almost the entire surface of the substrate 11.
is an insulating film with a charge storage function, such as silicon atoms S
The composition ratio of 1 and nitrogen atoms N is Sl/N-0,85~1,
It is made of a SiN film of 1.

Further, the t 13 is formed on the first gate insulating film 12.
? I-type a formed facing the gate electrode G1 of Jl
-Si semiconductor layers, S and D are placed on top of this semiconductor layer 13.
-a- Source and drain electrodes formed through the St layer 14, and this source.

An inverted staggered thin film transistor having a memory effect is constituted by the drain electrodes S, D and the semiconductor layer 13, the two-gate insulating film 12 which also has a charge storage function, and the first gate electrode Gl.

Further, a second insulating film 15 is formed over almost the entire surface of the substrate 11 on the semiconductor layer 13 and the source and drain electrodes S and D connected thereto.
A second gate electrode G2 facing the semiconductor layer 13 is formed on the insulating film 15. The second gate insulating film 15 is an insulating film that does not have a charge storage function, for example, the composition ratio of silicon atoms S1 and nitrogen atoms N is the same as the stoichiometric ratio (Sl/N-0,75), or It consists of a SiN film similar to that. Note that the first gate electrode G1 and the source and drain electrodes S.

D and the second gate electrode G2 are each connected to a wiring not shown.

Then, the ff1l and the second gate electrode Gl.

Among G2, the first gate insulating film 1 having a charge storage function
A first gate electrode G facing the semiconductor layer 13 via 2
Reference numeral 1 is a write/erase electrode, and a second gate electrode G2, which faces the semiconductor layer 13 via a second gate insulating film 15 having no charge storage function, is a read electrode.

That is, in this thin film memory element, the first gate electrode G
A thin film transistor having a memory effect consisting of a first gate insulating film 12 having a charge storage function, a semiconductor layer 13, and source and drain electrodes S and D has a second gate insulating film having no charge storage function. By providing the second gate electrode G2 facing the semiconductor layer 13 through the gate electrode 15, writing and erasing can be performed using the thin film transistor which faces the semiconductor layer 13 through the first gate insulating film 12 having a charge storage function. The reading is performed using the first gate electrode Gl of the semiconductor layer 13, and the readout is performed using the second gate electrode G2 facing the semiconductor layer 13 via the second gate insulating film 15 having no charge storage function. This is what I decided to do.

FIG. 3 shows the manufacturing process of the thin film memory element described above, and this thin film memory element is manufactured as follows.

First, as shown in FIG. 3(a), a first gate electrode G1 is formed on an insulating substrate 11. The first gate electrode Gl is formed by depositing a chromium film on the substrate 11 by vacuum evaporation, and then patterning the chromium film by photolithography.

Next, as shown in FIG. 3(b), an S having a charge storage function is placed on the substrate 11 on which the first gate electrode G1 is formed.
A first gate insulating film 12 made of iN (Si/N-0, 85 to 1.1) and an i-type a-8t semiconductor layer 13 are formed. The first gate insulating film 12 is formed by plasma C.
By the VD method, a mixed gas of silane, ammonia, and nitrogen is used, and the flow rate of each gas is adjusted such that the composition ratio of SiN deposited on the substrate 11 is Si/N-0.85 to 1.1. Control and shape. Further, the i-type A-5L semiconductor layer 13 is formed by forming an I-type A-3L film using a mixed gas of resilane and hydrogen by plasma CVD method, successively with the formation of the first gate insulating film 12. After this, the above type i a-
The 8t film is formed by patterning using photolithography.

Next, as shown in FIG. 3(c), from above the i-type A-3L semiconductor layer 13 to above the first gate insulating film 12, n'' is added to increase the electron concentration. -a-
31 layer] 4, a source electrode S and a drain electrode are formed. The n''-a, -S 1 layer 14 is formed in order to obtain a good ohmic connection between the i-type a-3l semiconductor layer 13 and the source and drain electrodes S and D. 51 layer 14 and source and drain electrodes S.

D first forms an n÷-a-8i film using a mixed gas of silane, phosine, and hydrogen by plasma CVD method,
After forming a chromium film thereon by vacuum evaporation, this chromium film and the n''a-Si film are patterned by photolithography.

Next, as shown in FIG. 3(d), the l-type semiconductor layer 1
3 and over the source and drain electrodes SD, a second gate insulating film made of SiN (Sl/N-1-0,75) having no charge storage function is formed over almost the entire surface of the first gate insulating film 12. 15, and the i! ! la-S
A second gate electrode G2 facing the i-semiconductor layer 13 is formed to complete the thin film memory element. The second gate insulating film 15 is deposited by the plasma CVD method using a mixed gas of silane, ammonia, and nitrogen, and the composition ratio of SIN to be deposited is Si/N=:0. It is controlled and formed so that it becomes 75. In addition, the second gate f
The f electrode G2 is formed by depositing chromium on the second gate insulating film 15 by vacuum evaporation, and patterning the chromium film by photolithography.

To explain the operation of the thin film memory element, FIG. 4 is a circuit diagram showing the driving states of the thin film memory element during erasing, writing, and reading. First gate insulating film for writing/erasing (hereinafter referred to as writing/erase)
It is sufficient to apply a voltage of -30 V1 to GL (referred to as the erase gate electrode) and +IOV to the drain electrode, and ground the source electrode S and the second gate electrode for reading (hereinafter referred to as the read gate electrode) G2. The thin film memory fabric is a depletion type, as shown in the characteristic curve a shown in Figure 9, in which the drain current ID flows even when the gate voltage G applied to the write/erase gate electrode G1 is set to OV. It exhibits transistor characteristics and enters the erased state.

Also, when writing, write/write as shown in Figure 4(b).
+30V1 to erase gate electrode G1 + to drain electrode
It is sufficient to apply a voltage of 10V and ground the source electrode S and the readout gate electrode G2. At this time, the thin film memory element will not drain unless the gate voltage vG applied to the write/erase gate electrode G1 is higher than OV. The transistor enters a write state, exhibiting enhancement-type transistor characteristics such as the characteristic curve shown in FIG. 9, in which no current ID flows.

On the other hand, for reading, as shown in FIG. 4(c), +1. Apply a voltage of OV and write/write to the source electrode S.
This can be done by grounding the extinguishing gate electrode Gl and applying a pulse voltage with a selection voltage of Ov and a non-selection voltage of 120V to the reading gate electrode G2. In this case, the gate electrode G2 is applied to the reading gate electrode G2.
The change in the drain 'QS 1yfE Io with respect to the change in the non-selection voltage (-
20V) is applied, the characteristic curve a' shown in Fig. 5
When a selection voltage (OV) is applied, it exhibits an enhancement type transistor characteristic as shown in the characteristic surface Hb' shown in FIG. 5.

In this way, the thin film memory element changes the transistor characteristics caused by the voltage applied to the write/erase gate electrode G1, that is, the depletion type or enhancement φ type state, to the read gate electrode G2.
This can also be reproduced by applying a voltage to.

And the state at the time of reading in the thin film memory element,
In other words, as shown in FIG. 4(c), a voltage of +10V is applied to the drain electrode, the source electrode S and the write/erase gate electrode Gl are grounded, and the selection voltage is OV and the non-selection voltage is applied to the read gate electrode G2. Threshold voltage ΔV th-n, Δv th- when a pulse voltage of 120 V is applied
When we investigated the fluctuation of p, we found that this threshold voltage ΔV th−n
, Δv th-p hardly changes as shown in FIG.
Almost no change was observed in V th-n, ΔVt1l-1).

In this way, in the thin film memory element, the first gate electrode (write/erase electrode) Gl, the first gate insulating film 12 having a charge storage function, the semiconductor layer 13, the source,
A second gate electrode (readout electrode) faces the semiconductor layer 13 via a second gate insulating film 15 having no charge storage function in a thin film transistor having a memory effect consisting of drain electrodes S and D. G2 is provided, and writing and erasing are performed using the original first gate electrode G1 of the thin film transistor, which faces the semiconductor layer 13 via the gate insulating film 12 having a charge storage function, and reading is performed using a charge storage function. Since the second gate electrode G2 facing the semiconductor layer 13 via the gate insulating film 15 is used, the threshold voltage ΔV remains constant even when reading is repeated.
th-n, ΔVtb-p do not change,
Therefore, according to this thin film memory element, stable reading can be performed semi-permanently.

In the above embodiment, the first gate insulating film 12 having the function of accumulating electricity is formed of SIN of Si/N=0.85 to 1.1. The membrane is
On the dielectric thin film, the value of Sj/N is changed to the stoichiometric ratio (Sl
/N-0,75) or close to it
It may also be a two-layer insulating film with a N thin film (thickness: 100 to 1000), and in that case, the dielectric thin film has a dielectric constant larger than the above SiN thin film (Sl /N =: 0.75). If a dielectric material (tantalum oxide, titanium oxide, barium titanate, zinc titanium zirconate, etc.) is used, the gate insulating film can have a charge storage function. In addition, the second gate insulating film 1 which does not have a charge M implantation function
5 is also not limited to the SIN film.

Further, in the above embodiment, the first gate insulating film 12 is an insulating film that has a charge storage function, and the second gate insulating film 15 is an insulating film that does not have a charge storage function, but on the contrary, The second gate insulating film 15 may be an insulating film with a charge storage function, and the first gate insulating film 12 may be an insulating film without a charge storage function. In that case, the second gate insulating film 15 may be an insulating film with a charge storage function. The second gate electrode G2 facing the semiconductor layer 13 via the first gate insulating film 12 is used as a write/erase electrode, and the first gate electrode G1 facing the semiconductor layer 3 via the first gate insulating film 12 is used as a read electrode. do it. In this case,
A thin film transistor with a memory effect is a Cobraner type consisting of a second gate electrode G2, a second gate insulating film 15, a semiconductor layer 13, and source and drain electrodes S and D. On the lower side, a first gate insulating film 1 that does not have a charge storage function.
The structure is such that a first gate electrode (reading electrode) Gl is provided opposite to the semiconductor layer 13 via 2. In addition, the thin film transistors with the above-mentioned memory effect are inverted stagger type,
The thin film transistor is not limited to a coplanar type, but may also be a staggered type or an inverted staggered type. In that case, this thin film transistor has another gate electrode (a readout electrode) that faces the semiconductor layer through a gate insulating film that does not have a charge storage function. ), it is possible to obtain a thin film memory element having the same effects as those of the embodiments described above.

〔Effect of the invention〕

The thin film memory element of the present invention includes a semiconductor layer, a source and a drain electrode connected to the semiconductor layer, a first gate electrode that faces one surface of the semiconductor layer with a first gate insulating film interposed therebetween, and a semiconductor layer that is connected to the semiconductor layer. a second gate electrode facing each other via a second gate insulating film on the other surface of the layer; one of the first and second gate insulating films is an insulating film having a charge storage function; The gate insulating film is an insulating film that does not have a charge storage function, and of the first and second gate electrodes, a gate electrode that faces the semiconductor layer through the gate insulating film that has a charge storage function is formed. Since the write/erase electrode is used as the read electrode and the gate electrode facing the semiconductor layer via the gate insulating film having no charge storage function is used as the read electrode, the threshold voltage does not change even if read is repeated. First, stable reading can be performed semi-permanently.

[Brief explanation of the drawing]

1 to 6 show an embodiment of the present invention, FIG. 1 and FIG. 2 are a cross-sectional view and a plan view of a thin film memory element, and FIG. 3 is a manufacturing process diagram of a thin film memory element. FIG. 4 is a circuit diagram showing the driving states of the thin film memory element during erasing, writing, and reading, and FIG. 5 is a VG'-ID characteristic diagram when a gate voltage is applied to the gate electrode that serves as the read electrode.
FIG. 6 is a diagram showing changes in threshold voltage with respect to the number of readings. Figure 7 is a cross-sectional view of a conventional thin film memory element, Figure 8 is a VG-ID characteristic ap+ constant circuit diagram of the thin film memory element, Figure 9 is a VC-ID characteristic diagram of the thin film memory element, and Figure 10 is a diagram of the conventional thin film memory element. FIG. 11 is a circuit diagram showing driving states of a thin film memory element during erasing, writing, and reading. FIG. 11 is a diagram showing changes in threshold voltage with respect to the number of readings of a conventional thin film memory element. 11... Insulating substrate, G]... First gate electrode (writing/erasing electrode), 12... First gate insulating film (
(insulating film with charge storage function), 13...n type a-8
1 semiconductor layer, 14-n''-a-Si layer, S-・
・Source electrode, D...Drain electrode 1, 1, 5...
Second gate insulating film (insulating film without charge storage function)
, G2... second gate electrode (reading electrode). Figure 1

Claims (1)

[Claims] In an electrically writable/readable/erasable thin film memory element, a semiconductor layer, source and drain electrodes connected to the semiconductor layer, and a first gate insulating film that faces one surface of the semiconductor layer with a first gate insulating film interposed therebetween. and a second gate electrode facing the other surface of the semiconductor layer with a second gate insulating film interposed therebetween, and one of the first and second gate insulating films has a charge storage function. The other gate insulating film is an insulating film that does not have a charge storage function, and between the first and second gate electrodes, the semiconductor A thin film memory element characterized in that a gate electrode facing the semiconductor layer is used as a write/erase electrode, and a gate electrode facing the semiconductor layer via the gate insulating film having no charge storage function is used as a read electrode. .