JPH0219086A - Demodulation circuit for reproducing audio signal - Google Patents

Abstract

PURPOSE:To reduce the holding time by applying holding synchronously with an RF signal in the RF (high frequency) signal before passing it through a low pass filter for the audio signal after demodulation. CONSTITUTION:An output signal SC of a switch circuit 3 is supplied to a processing circuit of a video signal, supplied to a band pass filter 7, from which a frequency modulation audio signal SD is obtained. The signal SD is fed to a demodulator 9 through a limiter 8, an output signal SE from the demodulator 9 is fed to a sample-and-hold circuit 12 via a low pass filter 11 and sampled and held by the sample hold pulse SP. In the state of the high frequency signal at the pre-stage of the 2nd low pass filter 25 to bring the demodulation output into the audio signal, the 0th order holding is applied and the timing of the 0th order hold is synchronized with the high frequency signal. Thus, the processing in response to the level of noise is attained in comparison with the holding for a prescribed time. Thus, the holding time is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a demodulation circuit for a frequency modulated audio signal reproduced in, for example, a VTR, and particularly to a noise reduction circuit at the time of head switching.

[Summary of the invention]

This invention performs zero-order hold in order to reduce the noise of a demodulated signal of a reproduced frequency modulated audio signal at the time of head switching, and in particular, after demodulation, before passing through a low-pass filter to convert it into an audio signal. R, F (high frequency)
By holding the signal in synchronization with this RF flaw signal, the hold time is shortened.

[Conventional technology]

In home VTRs and 8mm videos, it is common practice to frequency-modulate the audio signal and record it in a frequency multiplex manner on the lower frequency side of the frequency-modulated video signal using a rotating head in order to improve the sound quality.

The problem here is the generation of noise at the time of head switching. That is, the reproduced signal is obtained by alternately switching and extracting the outputs of the two heads, thereby obtaining a temporally continuous signal. However, although this continuous signal is continuous in time, the waveform of the high frequency signal (hereinafter referred to as RF scratch signal) is not continuous. Therefore, when a frequency modulated audio signal is demodulated, noise is generated at the time of this head switching. do.

Therefore, various measures have been taken to reduce this noise.

One method is a zero-order hold method. This corresponds to the head switching signal RFSW as shown in FIG.
A signal W that covers the noise generation period from P (A in the same figure)
(B in the same figure), and during the pulse width period τ of this signal W, the demodulated output signal DA (C in the same figure) is held at the DC value just before that, and the noise-removed signal DAA (D in the figure
).

[Problem to be solved by the invention]

Incidentally, this zero-order hold method has the advantage that the circuit configuration for realizing it is relatively simple, but if the hold period τ is long, this hold part becomes It has the disadvantage of causing noise. For this reason, it is better that the hold period be as short as possible.

However, conventionally, this hold time has been mostly determined by the characteristics of the demodulation circuit and low-pass filter (or the loop filter in the case of a PLL demodulation circuit) that are provided before the noise reduction circuit, and in particular, the response characteristics of the low-pass filter. Therefore, the hold time generally had to be long. For example, in the current noise reduction circuit of the frequency modulated audio signal playback circuit for 8 mm video, the hold time is 10 μs, and at high frequencies, the noise is audible.

Therefore, instead of performing zero-order hold during the pulse width period described above, the DC value of the demodulated signal is determined by comparing the signal level of the demodulated signal at the leading edge of this pulse width period and the signal level of the demodulated signal at the trailing edge. A linear interpolation method was proposed in which noise was removed by connecting straight lines to avoid fluctuations (Japanese Patent Laid-Open No. 5
7-176887).

However, the configuration for implementing this linear interpolation method is complicated and has the disadvantage of being expensive.

In view of the above points, the present invention employs a method similar to the zero-order hold as a noise removal method, but is designed to shorten the hold time and prevent the hold portion from becoming noise.

[Means to solve the problem]

A demodulation circuit for a reproduced audio signal according to the present invention includes a demodulator for demodulating a reproduced frequency modulated audio signal made into a temporally continuous signal by sequentially switching a plurality of heads; a pulse generation circuit that is supplied and synchronized with the output of the demodulator and generates a pulse for replacing the part at the time of switching the head; a sample hold circuit that samples and holds the output of the demodulator; and this sample hold circuit. a first low-pass filter provided in the preceding stage; a switch circuit for switching between the output of the demodulator and the output of the sample-and-hold circuit; and the switch circuit.

and a second low-pass filter provided on the output side of the path for converting the demodulated output into an audio signal.

[Effect]

Zero-order hold is performed in the state of a high-frequency signal before the second low-pass filter for converting the demodulated output into an audio signal. Moreover, the timing of the 0th order hold is
This is done in synchronization with a high frequency signal.

Therefore, the hold time is shortened, and since the hold time changes in accordance with the magnitude of noise at the time of head switching, it is possible to perform processing according to the magnitude of the noise, compared to holding for a fixed time.

【Example〕

FIG. 1 shows a demodulation circuit for reproduced audio signals according to the present invention.
This is an example of application to a millivideo playback circuit.

In the figure, HA and HB are rotating magnetic heads, 18
They are placed at 0° angular intervals and alternately scanned over the tape. Reproduction RF signals SA and SB from these rotary heads HA and HB are supplied to one and the other input terminals of a switch circuit 3 via head amplifiers 1 and 2, respectively.

This switch circuit 3 is connected to the rotary heads HA and HB.
It is alternately switched to one input end and the other input end every 0° tape scanning section. In this example, the switching signal RFSW is synchronized with the reproduced RF signal as follows.

That is, the head switching signal RFSWP is formed from the signal PG indicating the rotational phase of the rotating heads HA and HB.
(FIG. 2A) is supplied to the D terminal of the D-flip-flop circuit 4. On the other hand, the reproduced RF signal SB through amplifier 2
(B in the same figure) is supplied to the clock terminal of this D-flip-flop circuit 4 via a buffer circuit 5.6 for waveform shaping.

Therefore, from this D flip-flop circuit 4, a head switching signal RFSW (C in the same figure) which is synchronized with the reproduced RF signal AB (in the example shown in the figure, synchronized with the rise of the signal SB) is obtained.

By being switched by this switching signal RFSW, a temporally continuous signal SC is obtained from the switch circuit 3 as shown in the second diagram.

However, as mentioned above, this signal SC has a waveform discontinuity at the time of switching, as shown in the figure.

The output signal SC of this switch circuit 3 is supplied to a video signal processing circuit and also to a band pass filter, from which a frequency modulated audio signal SD is obtained.

This signal SD is supplied to a demodulator 9 through a limiter 8. In this example, this demodulator 9 includes a delay circuit 91
The demodulator is a quadrature type demodulator consisting of a multiplication circuit 92 and a multiplication circuit 92. Then, the output signal SE(
2E) is supplied to the negative input terminal of a switch circuit IO for replacing the noise portion at the time of head switching with the DC value of the signal SE, as will be described later.

The output signal SE of the demodulator 9 is also passed through the low-pass filter 1
1, and the DC value of this signal SE is obtained from this. The cutoff frequency of this low-pass filter 11 is
For example, it is 500 kHz.

The DC value from this low-pass filter 11 is supplied to a sample and hold circuit 12, where it is sampled and held by a sample and hold pulse SP, which will be described later.

The sample and hold pulse SP is formed from the above-mentioned signal RFSW in synchronization with the signal SH in the following manner.

That is, the output signal RFS of the D flip-flop circuit 4
W is supplied to a sample-and-hold pulse SP forming circuit 13.

In this sample and hold pulse forming circuit 13,
The signal RFSW is supplied to the first monostable multivibrator 16 via a buffer circuit 14 for waveform shaping and a delay circuit 15 that takes into account the delay in the bandpass filter 7.
This first monostable multivibrator 16 is triggered, and a pulse SP having a constant pulse width is obtained from the rising edge of the signal RFSW.

The signal RFSW is also supplied to a buffer circuit 17 for waveform shaping.
．． 18 and the second monostable multivibrator 2 via a delay circuit 19 that takes into account the delay in the bandpass filter 7.
0, this second monostable multi-bibreak 20 is triggered, and a pulse SP having a constant pulse width is obtained from the falling edge of the signal RFSW.

Output pulse S of monostable multivibrator 16 and 2o
PI and SP are respectively taken out as outputs of the sample-and-hold pulse forming circuit 13 via an OR circuit 21. And these pulses SP and SP are D-
It is supplied to the D terminal of the flip-flop circuit 22.

On the other hand, the output signal SE of the demodulator 9 is supplied to buffer circuits 23 and 24 for waveform shaping. This waveform shaping buffer circuit constitutes a Schmitt circuit, and therefore,
From this, a signal SF (FIG. 2 F) is obtained in which the noise portion of the signal SH at the time of head switching as shown in FIG. 2 is removed as a pulse. This signal SF is then supplied to the clock terminal of the D-flip-flop circuit 22.

Therefore, from the 200-flip-flop circuit 22, a sample-hold pulse SP ( Second
Figure G) is obtained.

This sample and hold pulse SP is supplied to the sample and hold circuit 12 as its sample and hold pulse. Therefore, in the sample and hold circuit 12, the immediately preceding DC value of the signal SE from the low-pass filter 11 is sampled and held by the pulse SP.

This DC value is supplied to the other input terminal of the switch circuit 10. Further, the pulse SP from the circuit 13 is supplied to this switch circuit 10 as a switching signal, and during the pulse width period of the pulse SP, the switch circuit 10 is connected to the other input terminal side. Therefore, the switch circuit lO
From here, the output signal SG (Figure 2 H) is obtained by replacing the noise generation part of the signal SE at the time of head switching with a DC value.
is obtained.

This signal SG is supplied to a low-pass filter 25 for converting the demodulated signal SG into an audio signal, and is outputted to an output terminal 26 as an audio signal. The cutoff frequency of the low-pass filter 25 is 20 kHz.

In this case, the pulse width of the pulse SP for sample and hold is determined with respect to the demodulated output before passing through the low-pass filter 25, so it is shorter than the conventional hold time. By the way, when this invention was applied to 8 mm video, the hold time was shortened to 3 p seconds.

Also, since the pulse SP is synchronized with the demodulated signal SE,
The leading and trailing edges of this pulse coincide with the zero-crossing point of the rising edge of the signal SG. Therefore, the average value (DC value) of the signal does not change before and after this hold period, so the portion of this hold period hardly appears as noise in the audio signal after passing through the low-pass filter 25. .

In the above example, the bandpass filter for obtaining the audio signal from the reproduced RF signal was provided on the output side of the head changeover switch circuit 3. A band pass filter may be provided for each. In this case, the levels of the RF signals before and after the switching point of the output of the switch circuit 3 can be matched by adjusting the gains of the two band pass filters. This allows the noise at the time of head switching to be reduced accordingly.

〔Effect of the invention〕

According to this invention, the noise period is replaced with a DC value at the output stage of the demodulator before the low-pass filter for converting into an audio signal, and the noise at the time of head switching is removed. There is no need to consider the response characteristics of the filter, and therefore the hold period for noise removal is shorter than in the past.

In addition, since the hold period for noise removal is synchronized with the output of the demodulator, the DC value of the output signal of the demodulator does not fluctuate before and after the hold period. It is possible to prevent the portion of this hold period from appearing as noise in the output signal.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of a reproduction circuit equipped with a demodulation circuit for reproduced audio signals according to the present invention, FIG. 2 is a waveform diagram for explaining the same, and FIG. 3 is an example of a conventional noise reduction circuit. It is a figure for explaining. Explanation of main symbols in the drawings 3: Head changeover switch circuit, 9: Frequency demodulator, 10: Switch circuit for converting the noise period to a DC value, 11: Low pass for obtaining the DC value of the output of the demodulator 9 filter, 12: sample and hold circuit, 13: sample and hold pulse forming circuit, 22: D-flip-flop circuit for synchronizing the sample and hold pulse with the output signal of the demodulator, 25: converts the output of the demodulator 9 into an audio signal Low pass filter for Agent Patent Attorney Tadashi Sugiura Chiba? f/II, Figure 2

Claims (1)

[Scope of Claims] A demodulator for demodulating a reproduced frequency modulated audio signal made into a temporally continuous signal by sequentially switching a plurality of heads; and a demodulator for demodulating the reproduced frequency modulated audio signal, which is supplied with the reproduced frequency modulated audio signal, and which is configured to demodulate the reproduced frequency modulated audio signal. a pulse generation circuit that synchronizes with the output of the demodulator and generates a pulse to replace the part at the time of head switching; a sample hold circuit that samples and holds the output of the demodulator; a first low-pass filter; a switch circuit for switching between the output of the demodulator and the output of the sample-and-hold circuit; and a second switch circuit provided on the output side of the switch circuit for converting the demodulated output into an audio signal.
A demodulation circuit for reproduced audio signals consisting of a low-pass filter and a low-pass filter.