JPH02188135A - Charging controller - Google Patents

Charging controller

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Publication number
JPH02188135A
JPH02188135A JP654589A JP654589A JPH02188135A JP H02188135 A JPH02188135 A JP H02188135A JP 654589 A JP654589 A JP 654589A JP 654589 A JP654589 A JP 654589A JP H02188135 A JPH02188135 A JP H02188135A
Authority
JP
Japan
Prior art keywords
value
voltage
charging
output
battery
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP654589A
Other languages
Japanese (ja)
Inventor
Tatsu Morioka
森岡 達
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP654589A priority Critical patent/JPH02188135A/en
Publication of JPH02188135A publication Critical patent/JPH02188135A/en
Pending legal-status Critical Current

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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

PURPOSE:To obtain a one-chip control circuit by subjecting battery voltage to frequency conversion then digitizing the converted value and comparing the digitized value thus performing charging control. CONSTITUTION:Battery voltage is converted through a voltage-frequency converter 1 into frequency which is then counted through a counter 2 and converted into a digital value. Digitized data are stored in a latch 4 and compared, three times through a comparator 7, with data stored in a maximum value memory section 6, then a new maximum value is stored in the maximum value memory section 6. Count in the counter 2 is also stored in another latch 5 then the difference between the value in the latch 5 and the value stored in the maximum memory section 6 is obtained through a comparator 2. A charge stop command is provided through an output control section 13 upon detection of the battery voltage lower than the maximum value by a predetermined amount. A charge stop output is provided forcibly, based on an output from a timer 10, upon elapse of 90min. after start of charging operation.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明はニッケルカドミウム電池等の二次電池を短時間
で充電する充電装置に係り、その充電電流制御手段に関
するものである。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a charging device for charging a secondary battery such as a nickel-cadmium battery in a short period of time, and relates to charging current control means therefor.

(ロ)従来の技術 従来の充電制御装置は、例えば特公昭59−37654
号公報の如く電池電圧を検出する電圧検出装置の出力電
圧と、記憶部の記憶電圧を比較器により比較し、前記出
力電圧が記憶電圧より大のときのみ記憶電圧を前記出力
電圧まで上昇せしめ、前記出力電圧が低下してきても記
憶電圧は前記出力電圧の最高値を保持するように回路を
構成し、前記出力電圧が記憶電圧より一定電圧以上低下
すると充電電流を制御、または充電を終了させるもので
ある。この例の場合、電池電圧と記憶電圧を比較する電
気回路部分がアナログ的に組まれており、この部分を構
成する各電気部品の選別が厄介であり、且つこれら部品
の調整工程が必要であり、満充電時の検出精度を上げる
のが難しかった。
(b) Conventional technology A conventional charging control device is, for example,
Comparing the output voltage of a voltage detection device that detects the battery voltage with the storage voltage of the storage unit as in the publication, and increasing the storage voltage to the output voltage only when the output voltage is higher than the storage voltage, The circuit is configured so that the storage voltage maintains the highest value of the output voltage even if the output voltage decreases, and when the output voltage decreases by a certain voltage or more from the storage voltage, the charging current is controlled or charging is terminated. It is. In this example, the electric circuit section that compares the battery voltage and memory voltage is constructed in an analog manner, making it difficult to sort out the electrical components that make up this section, and requiring an adjustment process for these components. However, it was difficult to improve detection accuracy when fully charged.

またマイクロコンピュータを使用してデジタル的に電池
電圧と記憶電圧とを比較しようとする場合、回路システ
ムが大きくなり、且つ付属の電気回路部品を多くを必要
とする問題点があった。
Furthermore, when attempting to digitally compare the battery voltage and the storage voltage using a microcomputer, there is a problem in that the circuit system becomes large and a large number of attached electric circuit parts are required.

(ハ) 発明が解決しようとする課題 本発明が解決しようとする課厘はワンチップのIC(集
積)回路を用いてデジタル的な満充電検出回路を組み、
この検出回路の出力によって電池への充電電流を制御し
ようとするものである。
(c) Problems to be solved by the invention The problem to be solved by the invention is to assemble a digital full charge detection circuit using a one-chip IC (integrated) circuit.
The purpose is to control the charging current to the battery based on the output of this detection circuit.

(ニ)課題を解決するための手段・ 充電回路に接続される二次電池の端子電圧を入力しこれ
を対応する周波数に変換する電圧−周波数変換部と、前
記端子電圧対応周波数をカウントしデジタル値に変換す
るカウンタと、充電中の電池の最大電圧に対応する周波
数を変換して得られるデジタル値と前記端子電圧対応デ
ジタル値とを比較する比較器と、該比較器からの出力制
御信号に基き前記充電回路を流れる電流を制御する出力
制御部とより成る。
(d) Means for solving the problem - A voltage-frequency converter that inputs the terminal voltage of the secondary battery connected to the charging circuit and converts it into a corresponding frequency, and a digital converter that counts the frequency corresponding to the terminal voltage. a counter that converts the frequency into a value, a comparator that compares the digital value obtained by converting the frequency corresponding to the maximum voltage of the battery being charged with the digital value corresponding to the terminal voltage, and an output control signal from the comparator. and an output control section that controls the current flowing through the charging circuit.

(ホ)作用 電池電圧またはその分圧電圧を入力信号として電圧−周
波数変換を行ない、得られた周波数をカウンタで計測し
て、電池電圧をデジタル値に変換する。このデジタル値
を0から始まるデジタル最大値と比較し、入力した値の
方が大きい場合が数回続くと、その入力値をデジタル最
大値として入れ換え、以後この操作を繰り返す。電池電
圧がその充電特性のピーク電圧を記録し、所定電圧降下
することを先の入力値とデジタル最大値との比較から判
別し、出力制御信号を発して充電電流を制御する。
(e) Perform voltage-frequency conversion using the working battery voltage or its partial voltage as an input signal, measure the resulting frequency with a counter, and convert the battery voltage into a digital value. This digital value is compared with a digital maximum value starting from 0, and if the input value is larger several times, that input value is replaced as the digital maximum value, and this operation is repeated thereafter. The peak voltage of the battery voltage of its charging characteristics is recorded, and it is determined from a comparison between the previous input value and the digital maximum value that the battery voltage has dropped by a predetermined value, and an output control signal is issued to control the charging current.

(へ)実施例 以下本発明の充電制御装置を図面の一実施例について詳
細に説明する。
(F) Embodiment Below, the charging control device of the present invention will be described in detail with reference to an embodiment of the drawings.

第2図にトランス型充電回路の一実施例を示す、同図に
おいて、(T1)はその−次コイル(Ll)を商用交流
電源に接続可能とし、二次コイル(B2)側に降圧電流
を誘導する降圧トランス、(Di)(B2)は該二次コ
イル(B2)の両端に各々アノード側を接続しそのカソ
ード同志を接続してなる全波整流器、(Ql)はそのエ
ミッタ・コレクタ回路を前記整流器(Di)(B2)の
カソード側に接続したスイッチングトランジスタ、(B
1)は3本のNi−Cd電池を直列接続して成り前記ス
イッチングトランジスタ(Ql)のコレクタ側にその正
極を接続し、負極を前記二次コイル(B2)の中間タッ
プ接続して成る二次電池、(ICI)は前記二次コイル
(B2)の一端と中間タップとの間にダイオード(B3
)を介して電源入力端子(Vcc−)、を接続して成る
ワンチップのICから成る充電制御回路、(C2)は前
記スイッチングトランジスタ(Ql)のベースと前記二
次コイル(B2)の中間タップとの間にそのエミッタ・
コレクタ回路を介挿して成る補助トランジスタである。
Figure 2 shows an example of a transformer-type charging circuit. In the figure, (T1) allows its secondary coil (Ll) to be connected to a commercial AC power supply, and supplies a step-down current to the secondary coil (B2) side. (Di) (B2) is a full-wave rectifier whose anode side is connected to both ends of the secondary coil (B2) and whose cathodes are connected together; (Ql) is its emitter-collector circuit; a switching transistor (B) connected to the cathode side of the rectifier (Di) (B2);
1) consists of three Ni-Cd batteries connected in series, the positive electrode of which is connected to the collector side of the switching transistor (Ql), and the negative electrode of which is connected to the center tap of the secondary coil (B2). The battery (ICI) has a diode (B3) between one end of the secondary coil (B2) and the intermediate tap.
), a charging control circuit consisting of a one-chip IC connected to a power input terminal (Vcc-), (C2) is an intermediate tap between the base of the switching transistor (Ql) and the secondary coil (B2). and its emitter between
This is an auxiliary transistor formed by inserting a collector circuit.

前記スイッチングトランジスタ(Ql)のエミッタへコ
レクタ間には該トランジスタ(Ql’)が非導通となり
なときに前記二次電池(B1)に微小電流を供給するた
めの限流抵抗(R1)を接続し、そのエミッタ〜ベース
間にはベース抵抗(R2)を接続している。
A current limiting resistor (R1) is connected between the emitter and the collector of the switching transistor (Ql) for supplying a minute current to the secondary battery (B1) when the transistor (Ql') is not conductive. , a base resistor (R2) is connected between its emitter and base.

前記補助トランジスタ(C2)のコレクタ〜べ〒ス間に
はベース抵抗(R4)を接続するとともに前記充電制御
回路(ICI)の出力端子(OUT)はこのトランジス
タ(C2)のベースに接続されている。
A base resistor (R4) is connected between the collector and the base of the auxiliary transistor (C2), and the output terminal (OUT) of the charge control circuit (ICI) is connected to the base of this transistor (C2). .

前記電池(B1)の正極は前記充電制御回路(ICI)
の入力端子に接続され、前記ダイオード(B3)と二次
コイル(B2)の中間タップとの間には充電制御回路(
ICI)と並列に該充電制御回路(ICI)を電源入力
安定化のため平滑コンデンサが接続され、且ツェナダイ
オード(ZDi)はこの平滑コンデンサ(C1)の両端
間に接続されている。
The positive electrode of the battery (B1) is connected to the charging control circuit (ICI)
A charging control circuit (
A smoothing capacitor is connected in parallel with the charging control circuit (ICI) to stabilize the power input, and a Zener diode (ZDi) is connected across the smoothing capacitor (C1).

次に第1図に充電制御回路(ICI)の中味をブロック
化した回路図を示す。同図において充電制御回路(IC
I)はその入力端子に接続された電圧−周波数(V−F
)変換部(例えば電圧制御発振器:VCO)(1)、該
変換部(1)の出力をカウントする13ビツトのカウン
タ(2)、タイミング回路(3)による記憶機能を有す
る2つの13bitのラッチ(4)(5)、任意の時点
での周波数最大値を記憶する13bitのmax、デー
タ記憶部(6)、一方のラッチ(4)のデータとm a
’x 。
Next, FIG. 1 shows a circuit diagram showing the contents of the charging control circuit (ICI) in blocks. In the figure, the charging control circuit (IC
I) is the voltage-frequency (V-F
) conversion unit (for example, voltage controlled oscillator: VCO) (1), a 13-bit counter (2) that counts the output of the conversion unit (1), and two 13-bit latches (2) with a memory function using a timing circuit (3). 4)(5), 13-bit max that stores the maximum frequency value at any time, data storage section (6), data of one latch (4) and m a
'x.

データ記憶部(6)のデータとを3回に亘り比較する第
1比教器(7)、他方のラッチ(5)のデータとmax
、データ記憶部(6)のデータとを比較する第2比較器
(8)、前記変換部(1)の出力によって動作する3分
タイマ部(9)及び90分タイマ部(10)、前記電源
入力端子(Vcc)に接続されて前記両タイマ部(9)
 (10)及びmax、データ記憶部(6)を初期化す
るクリア回路(11)、前記電源入力端子(Vcc)接
続され、前記3分タイマ部(9)及び90分タイマ部(
lO)の動作をスタートさせるスタート回路(12)、
前記第2比較器(8)、クリア回路(11)及び90分
タイマ(lO)からの出力に基き、出力端子(OUT)
に所定の出力を発する出力制御部(13)とより構成さ
れる。
The data of the first latch (7) is compared three times with the data of the data storage unit (6), and the data of the other latch (5) is max.
, a second comparator (8) that compares the data with the data in the data storage section (6), a 3-minute timer section (9) and a 90-minute timer section (10) that operate based on the output of the conversion section (1), and the power supply. Both timer sections (9) are connected to the input terminal (Vcc).
(10) and max, a clear circuit (11) for initializing the data storage section (6), connected to the power input terminal (Vcc), and connected to the 3-minute timer section (9) and the 90-minute timer section (
a start circuit (12) for starting the operation of lO);
Based on the outputs from the second comparator (8), the clear circuit (11) and the 90 minute timer (lO), the output terminal (OUT)
and an output control section (13) that outputs a predetermined output.

第4回は電池(B1)の充電特性を示し、該電池(B1
)の端子電圧Vと前記充電制御回路(IC1)の電圧−
周波数変換部(1)で変換された周波数fとは同じ特性
曲線を描く0時刻Tpにおいて電圧■、または周波数f
は最大値を記録し、以後所定値低下(ΔV、Δf)した
時点Tsで電流■が微小電流に切換わるように制御する
のが一般的である。
The fourth part shows the charging characteristics of the battery (B1), and shows the charging characteristics of the battery (B1).
) and the voltage of the charging control circuit (IC1) -
At time 0 Tp, which draws the same characteristic curve as the frequency f converted by the frequency converter (1), the voltage ■ or the frequency f
It is common practice to record the maximum value and then control so that the current ■ is switched to a minute current at a time point Ts when the current decreases by a predetermined value (.DELTA.V, .DELTA.f).

上記第1.2図の実施例では、降圧トランス(T1)の
−次コイル(Ll)に商用電源が接続されると、ダイオ
ード(B3)を介して充電制御回路(ICI)の電源入
力端子(Vc c )に電源が印加される。するとクリ
ア回路(11)が動作してmax、データ記憶部(6)
、3分タイマー(9)。
In the embodiment shown in Fig. 1.2 above, when the commercial power supply is connected to the secondary coil (Ll) of the step-down transformer (T1), the power supply input terminal ( Power is applied to Vcc). Then, the clear circuit (11) operates and the data storage section (6)
, 3 minute timer (9).

90分タイマ(1G)及び出力制御部(13)が初期状
態となり、次にスタート回路(12)が動作する。これ
により両タイマ(9) (10)が動作を開始し、3分
タイマ(9)は13bitカウンタ(2)を初期状態に
して、充電初期の電池(B1)の端子電圧の不安定さに
対して無動作状態にして、強制的に3分間急速充電する
。この充電開始直後においては充電制御回路(ICI)
の出力端子(OUT)i、trHIGHJレベルの出力
を出し、補助トランジスタ(Q2)を導通させるため、
スイッチングトランジスタ(Ql)が導通し、大き7な
電流が電池(Bl)に流れる。
The 90-minute timer (1G) and the output control section (13) are in the initial state, and then the start circuit (12) is activated. As a result, both timers (9) and (10) start operating, and the 3-minute timer (9) sets the 13-bit counter (2) to the initial state to prevent instability in the terminal voltage of the battery (B1) at the initial stage of charging. to put it in a non-operating state, and then force a quick charge for 3 minutes. Immediately after starting this charging, the charging control circuit (ICI)
In order to output the output terminal (OUT) i of trHIGHJ level and make the auxiliary transistor (Q2) conductive,
The switching transistor (Ql) becomes conductive and a large current flows into the battery (Bl).

充電開始から3分が経過すると、電池(B1)の端子電
圧を抵抗(R3)を介して充電制御回路(ICI)の入
力端子(IN)に取込む、電圧−周波数変換部(1)は
取込まれた電圧を周波数に変換し、続いてこれを13b
itカウンタ(2)にて一定時間カウントし、電池(B
1)の端子電圧に対応したデジタル値とする。
When 3 minutes have passed from the start of charging, the voltage-frequency converter (1), which takes in the terminal voltage of the battery (B1) to the input terminal (IN) of the charge control circuit (ICI) via the resistor (R3), is removed. Convert the input voltage to frequency and then convert this to 13b
The IT counter (2) counts for a certain period of time, and the battery (B
The digital value corresponds to the terminal voltage of 1).

13bitmax、データ記憶部(6)(初期値は0)
は1・3bitラツチ(4)に−旦保存された上記デジ
タル値と第1比較器(7)で3回比較され、上記デジタ
ル値の方がデータ記憶部(6)の値より大きい(カウン
ト数人)の場合に該デジタル値をmax、データとして
書き換える。そしてデータ記憶部(6)の新max、デ
ータとカウンタ(2)の値とがもう一方の13bitラ
ツチ(5)を介して第2比較器(8)で比較され、カウ
ンタ(2)の値がmax、データから所定値低下したら
出力制御部(13)への出力が反転し、出力端子(OU
T)の出力はrHIGH」からrLOWJへ反転する。
13bitmax, data storage section (6) (initial value is 0)
is compared three times in the first comparator (7) with the digital value previously stored in the 1/3-bit latch (4), and the digital value is larger than the value in the data storage unit (6) (count number). (person), the digital value is rewritten as max data. Then, the new max data in the data storage section (6) and the value of the counter (2) are compared in the second comparator (8) via the other 13-bit latch (5), and the value of the counter (2) is max, when the data decreases by a predetermined value, the output to the output control section (13) is inverted and the output terminal (OU
The output of T) is inverted from rHIGH to rLOWJ.

即ち第4図の充電特性で充電開始から電池(B1)の端
子電圧がピーク値に達するまでは、断続的にmax、デ
ータ記憶部(6)のカウント数データが上昇し、ピーク
値を過ぎてもこのmaX、データが保存される一方、カ
ウンタ(2)の値はピーク値以降低下し、所定値低下し
たところで充電制御回路(ICI)の出力が反転する。
In other words, according to the charging characteristics shown in Fig. 4, from the start of charging until the terminal voltage of the battery (B1) reaches its peak value, the count data in the data storage section (6) increases intermittently until it exceeds the peak value. While this maX data is stored, the value of the counter (2) decreases after the peak value, and when it decreases by a predetermined value, the output of the charging control circuit (ICI) is inverted.

こうして補助トランジスタ(Q2)が非導通となり、ス
イッチングトランジスタ(Ql)も非導通となって急速
充電は終了し、抵抗(R1)を通った微小電流が電池(
B1)に供給される。
In this way, the auxiliary transistor (Q2) becomes non-conductive, the switching transistor (Ql) also becomes non-conductive, and rapid charging ends, and a minute current passes through the resistor (R1) and the battery (
B1).

もし充電開始から90分を経過しても急速充電が停止し
ない場合が起こると電池(B1)が過充電となり、内部
温度上昇による電池(B1)の破損等が生じる0本実施
例ではこう云う万一の事態に備えて90分を経過する強
制的に充電制御回路(ICI)の出力を反転させ、スイ
ッチングトランジスタ(Ql)を非導通にするように9
0分タイマ(10)を備えている。
If rapid charging does not stop even after 90 minutes have passed from the start of charging, the battery (B1) will be overcharged, causing damage to the battery (B1) due to an increase in internal temperature. In preparation for the first situation, the output of the charging control circuit (ICI) is forcibly inverted after 90 minutes, and the switching transistor (Ql) is made non-conductive.
It is equipped with a 0 minute timer (10).

第3図はインバータ型充電回路の一実施例を示し、全波
整流器(B4)、整流器(B4)の一端に接続される一
次コイル(Ll)、二次コイル(R2)、整流器(B4
)の他端に接続される帰還コイル(B3)を有するイン
バータトランス(T2)、前記−次コイル(Ll)にコ
レクタ・エミッタ回路を接続された発振トランジスタ(
C3)、該トランジスタ(C3)のベース抵抗(R5)
、前記−次コイル(Ll)の両端間に介挿されたスパイ
ク電圧吸収用コンデンサ(C3)、前記帰還コイル(B
3)と整流器(B4)問に接続されたコンデンサ(C2
)及び抵抗(R9)、前記トランジスタ(C3)のベー
スに接続された制御トランジスタ(C4)、前記二次コ
イル(B2)に接続されたダイオード(B5)、前記ト
ランジスタ(C4)のベースに接続された抵抗(R8)
によってインバータ回路(INV)を構成するとともに
、前記二次コイル(B2)の両端間にNi−Cd電池を
2本直列して成る電池(B2)を接続し、前記整流器(
B4)の再出力端間に抵抗(R6)を介して充電制御回
路(ICI)、ツェナダイオード(ZD2)及びコンデ
ンサ(C4)を夫々が並列となるように接続し、前記電
池(B2)の正極を抵抗(R7)を介して充電制御回路
(ICI)の入力端子(IN)に接続し、該充電制御回
路<ICI)の出力端子(OUT)を抵抗(R8)を介
してトランジスタ(C4)のベースに接続したものであ
る。
Figure 3 shows an embodiment of an inverter type charging circuit, including a full-wave rectifier (B4), a primary coil (Ll) connected to one end of the rectifier (B4), a secondary coil (R2), and a rectifier (B4).
), an inverter transformer (T2) having a feedback coil (B3) connected to the other end; and an oscillation transistor (T2) having a collector-emitter circuit connected to the secondary coil (Ll).
C3), the base resistance (R5) of the transistor (C3)
, a spike voltage absorbing capacitor (C3) inserted between both ends of the secondary coil (Ll), and the feedback coil (B
3) and the capacitor (C2) connected between the rectifier (B4)
) and a resistor (R9), a control transistor (C4) connected to the base of the transistor (C3), a diode (B5) connected to the secondary coil (B2), and a resistor (R9) connected to the base of the transistor (C4). resistance (R8)
An inverter circuit (INV) is configured by connecting a battery (B2) consisting of two Ni-Cd batteries in series between both ends of the secondary coil (B2), and a battery (B2) consisting of two Ni-Cd batteries connected in series.
A charging control circuit (ICI), a Zener diode (ZD2), and a capacitor (C4) are connected in parallel between the re-output terminals of the battery (B2) via a resistor (R6), and the positive electrode of the battery (B2) is is connected to the input terminal (IN) of the charging control circuit (ICI) through a resistor (R7), and the output terminal (OUT) of the charging control circuit <ICI is connected to the transistor (C4) through a resistor (R8). It is connected to the base.

この例の場合も第1図の実施例と同様にインバータ回路
(INV)の出力は充電開始直後は大電流を二次コイル
(B2)に誘導し電池(B2)をまず3分間急速充電し
た後、電池(B2)の端子電圧がピーク値を経て所定値
低下するまで、周波数に変換された状態でのmax、デ
ータ記憶値との比較が行なわれ、所定値低下した時点で
充電制御回路(ICI)の出力(OlJT)が反転し、
帰還コイル(B3)に帰遷された電流はトランジスタ(
C4)を通ることにより発振トランジスタ(Ql)のベ
ース電流が減じられ、電池(B2)に供給される電流は
微小電流となる。
In this example, as in the embodiment shown in Figure 1, the output of the inverter circuit (INV) is as follows: Immediately after charging starts, a large current is induced into the secondary coil (B2), and the battery (B2) is first rapidly charged for 3 minutes. , until the terminal voltage of the battery (B2) passes through the peak value and decreases by a predetermined value, the max in the state converted to frequency is compared with the data storage value, and when the terminal voltage decreases by the predetermined value, the charging control circuit (ICI) ) output (OlJT) is inverted,
The current transferred to the feedback coil (B3) is transferred to the transistor (
By passing through C4), the base current of the oscillation transistor (Ql) is reduced, and the current supplied to the battery (B2) becomes a minute current.

(ト)発明の効果 本発明は以上の説明の如く、充電回路に接続される二次
電池の端子電圧を入力しこれを対応する周波数に変換す
る電圧−周波数変換部と、前記端子電圧対応周波数をカ
ウントしデジタル値に変換するカウンタと、充電中の電
池の最大電圧に対応する周波数を変換して得られるデジ
タル値と前記端子電圧対応デジタル値とを比較す、る比
較器と、該比較器からの出力制御信号に基き前記充電回
路を流れる電流を制御する出力制御部とより成る充電制
御装置であるから、該装置を充電回路の一部品として容
易にワンチップのICとすることができ、且つデジタル
で処理するために部品のバラツキを考慮する手間が省け
るという効果が期待できる。
(G) Effects of the Invention As described above, the present invention includes a voltage-frequency conversion unit that inputs the terminal voltage of a secondary battery connected to a charging circuit and converts it into a corresponding frequency, and a counter that counts and converts it into a digital value; a comparator that compares the digital value obtained by converting the frequency corresponding to the maximum voltage of the battery being charged with the digital value corresponding to the terminal voltage; and the comparator. Since the charging control device includes an output control section that controls the current flowing through the charging circuit based on an output control signal from the charging circuit, the device can be easily made into a one-chip IC as a part of the charging circuit. In addition, since the processing is done digitally, it is expected that there will be no need to take into account variations in parts.

【図面の簡単な説明】[Brief explanation of the drawing]

一第1図は本発明の充電制御装置を示すブロック回路図
、第2図は第1図の充電制御装置を使った降圧トランス
型充電装置の一実施回路図、第3図は同じく第1図の充
電制御装置を使ったイン′バー、り型°充電装置の一実
施回路図、第4図は電池の充電特性図である。 (Bl)(B2)・・・二次電池、(1)・・・電圧−
周波数変換部、(2)・・・カウンタ、(8)・・・比
較器、(13)・・・出力制御部。
Fig. 1 is a block circuit diagram showing a charging control device of the present invention, Fig. 2 is an implementation circuit diagram of a step-down transformer type charging device using the charging control device of Fig. 1, and Fig. 3 is a block circuit diagram showing the charging control device of the present invention. FIG. 4 is a circuit diagram of an inverter type charging device using the charging control device of the present invention, and FIG. 4 is a diagram showing the charging characteristics of the battery. (Bl) (B2)... Secondary battery, (1)... Voltage -
Frequency conversion unit, (2)...Counter, (8)...Comparator, (13)...Output control unit.

Claims (1)

【特許請求の範囲】[Claims] (1)充電回路に接続される二次電池の端子電圧を入力
しこれを対応する周波数に変換する電圧−周波数変換部
と、前記端子電圧対応周波数をカウントしデジタル値に
変換するカウンタと、充電中の電池の最大電圧に対応す
る周波数を変換して得られるデジタル値と前記端子電圧
対応デジタル値とを比較する比較器と、該比較器からの
出力制御信号に基き前記充電回路を流れる電流を制御す
る出力制御部とより成る充電制御装置。
(1) A voltage-frequency converter that inputs the terminal voltage of the secondary battery connected to the charging circuit and converts it into a corresponding frequency, a counter that counts the frequency corresponding to the terminal voltage and converts it into a digital value, and a charging circuit. a comparator that compares a digital value obtained by converting a frequency corresponding to the maximum voltage of the battery therein with a digital value corresponding to the terminal voltage, and a current flowing through the charging circuit based on an output control signal from the comparator. A charging control device consisting of an output control section for controlling.
JP654589A 1989-01-13 1989-01-13 Charging controller Pending JPH02188135A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP654589A JPH02188135A (en) 1989-01-13 1989-01-13 Charging controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP654589A JPH02188135A (en) 1989-01-13 1989-01-13 Charging controller

Publications (1)

Publication Number Publication Date
JPH02188135A true JPH02188135A (en) 1990-07-24

Family

ID=11641307

Family Applications (1)

Application Number Title Priority Date Filing Date
JP654589A Pending JPH02188135A (en) 1989-01-13 1989-01-13 Charging controller

Country Status (1)

Country Link
JP (1) JPH02188135A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0757422A2 (en) * 1995-08-03 1997-02-05 Motorola, Inc. Peak voltage and peak slope detector for a battery charger circuit

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS645334A (en) * 1987-06-24 1989-01-10 Matsushita Electric Works Ltd Boosting charge control device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS645334A (en) * 1987-06-24 1989-01-10 Matsushita Electric Works Ltd Boosting charge control device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0757422A2 (en) * 1995-08-03 1997-02-05 Motorola, Inc. Peak voltage and peak slope detector for a battery charger circuit
EP0757422A3 (en) * 1995-08-03 1997-07-02 Motorola Inc Peak voltage and peak slope detector for a battery charger circuit

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