JPH02186892A - Multiplex transmission system - Google Patents

Abstract

PURPOSE:To improve data transmission efficiency by recording an opposite party number and a flag to indicate a multiplex position corresponding to the communication speed of a terminal in a memory, reading out the data of the terminal written in a multiplex part in the time slot of the same transmission channel based on the information, and executing multiplexing. CONSTITUTION:While the opposite party number is recorded in a first memory 61 according to the calling request of the terminal, the flag to designate at which position in the time slot of the transmission channel the multiplexing is to be executed is recorded in a second memory 62 correspondingly to the communication speed of the terminal, the first memory 61 is retrieved for a new calling request, next, a second memory 62 is retrieved when the same number exists in the memory 61, and recording is executed when the margin of the number of bits necessary for the multiplexing exists. Further, the data of plural terminals to the same opposite party are multiplexed in the same transmission channel by calling the data in the time slot of the same channel by a bit multiplex part 63 based on the information recorded in the second memory 62. Thus, the transmission efficiency can be improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention is a system for multiplexing and transmitting data from multiple terminals to the same destination within the same channel from a private branch exchange via a communication network such as an L5DN network. This relates to a multiplex transmission system.

[Conventional technology]

Figure 8 shows C when transmitting data via the 15DN network.
This is a conceptual diagram showing a conventional example according to the speed matching method for a 64Kbp θ channel (hereinafter referred to as B channel) specified in CTC Recommendation 1.460.
(1d) is a data terminal with an existing interface # (
2' is a terminal adapter for accommodating four terminals of the existing interface T to the industrial SDN interface, and has the function of protocol conversion and speed conversion to match the communication speed of the terminals. (3) is the terminal adapter (2)
) is a speed converter. (4a) and (4o) are private branch exchanges.

(It is a 51-digit 1aDN network.

Next, the operation will be explained. For ease of explanation, the communication speeds of data terminals (1a) to (1) are respectively 1.2 Kbps, 2.4 Kbps, and 9.
Kbps, and the data terminal (1d) is an ILT computer, and a case where a plurality of data terminals and computers perform n-to-1 communication will be described.

In the 15DN, a method has been standardized in which the communication speed of a low-speed data terminal is converted to a B channel of 64 Kbps information channel in units of 8 Kbps. For example, 4.
8Ktlp8 and below speed is g Kbps,
9. The speed of @ Kbps is 16 Kbps [,
A speed of 19.2 Kbps is converted to a speed of 32 Kbps. These speeds converted to 8 Kbps,
The speeds of 18 Kbps and 32 Kbpe are called subrates, and the signal tones are called subrate signals.

A method of directly accommodating a terminal with a speed conversion function to subrate, a method of accommodating it via a data interface module such as a digital telephone, and a method of accommodating an existing interface terminal by using a DN terminal 2. There is a method of accommodating the terminal via an adapter (hereinafter referred to as a terminal adapter).

In FIG. 8, the terminal (1a) is a computer terminal (I
d) When communicating with the other party, the signal channel (hereinafter referred to as D channel) is
A call is set up via the terminal (1a) and the terminal (1d), a KB channel communication path is established, and data is exchanged. Next, when terminal (1b) sends a call request to terminal (1d) while terminal (1a) and terminal (1d) are communicating, the B channel between terminal (1a) and terminal (1d) is A separate B channel is set up for data exchange.

[Problem to be solved by the invention]

Conventional data transmission is structured as described above, so
When multiple terminals exchange data with the same destination terminal, it is necessary to set up separate B channel communication paths for each terminal, and if the communication speed of the terminals is low, the transmission capacity will be lower than the B channel transmission capacity. Since the amount of information is small, the transmission efficiency is low and the cost is high.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a multiplex transmission system that can transmit a plurality of data having the same destination via the same channel via a public network.

Regarding this, CC engineering TT recommendation 1,460 is $4Kb.
Although a format for time division multiplexing onto psB channels has been defined, the present invention is concerned with an implementation according to this concept.

[Means to solve the problem]

The multiplex transmission system according to the present invention includes a first memory that records the communication destination number transmitted by the terminal, and a flag that specifies all the positions to be multiplexed within the time slot of the transmission channel in accordance with the communication speed of the terminal. a bit multiplexer that multiplexes the data of the two calling terminals within the time slot of the transmission channel; This system is equipped with a common trunk consisting of a control unit that performs II control, and a management unit that manages the common trunk, so that multiple pieces of data destined for the same destination can be multiplexed and transmitted within the same channel. .

[Effect]

The multiplex transmission method in this invention records the destination number in a first memory in response to a call request from a terminal, and also determines where in the time slot of a transmission channel the number is multiplexed in accordance with the communication speed of the terminal. is recorded in the second memory, and the first memory lJ' is recorded in response to a new call request.
If the same number is found, then the second memo IJ'
Search for it and record it if there is room for the number of bits necessary for multiplexing,
Second Memo 'JK Data of a plurality of terminals destined for the same destination is multiplexed within the same transmission channel by calling within the time slot of the same channel in the bit multiplexing unit based on the recorded information.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure shows the concept of this embodiment.

In the figure, (6) is a common trunk, and a plurality of trunks are provided corresponding to each line. (7) and (8) are highways that connect the common trunk (6) and the private branch exchange (4a8 (4b). Also, the same reference numerals as in Fig. 8 indicate the same or equivalent parts. Fig. 2 In Figure 92, which is a block diagram showing the configuration of the common trunk (6), ((Sl)H is the first memo IJ for recording the destination number, (62) is a bit for multiplexing data into the time slot of the same channel. (65) ij bit multiplexing unit, (64) is a control unit that controls the bit multiplexing unit (63), (65), (6 is the highway connection with the exchange) The highway interface unit that provides the interface ((57) is the highway in the common trunk).

(91 is a call processing processor of the private branch exchange (4a), (4''), which includes a control unit (64), a first memory (64) for recording the destination number and a second memory (62 ) and a common trunk (6
).

FIG. 3 is a diagram showing in detail the relationship between the bit multiplexing unit (63) and the control unit (66), where (66) is a third memory that temporarily stores data from each terminal for every time slot;
(632) is the pledge circuit, (1533J is the third
memory (readout circuit from 63rd, (64th
The memory (address memory for recording 63 read addresses, (s42), (s43) is 11 katanta. Figure 4 shows the first memory (for recording the destination number).
61] is a diagram showing the memory configuration of a second memo IJ (62) that records the bit position to be multiplexed with. FIG. 5 is a diagram showing how data from a plurality of terminals is multiplexed.

FIG. 6 is a flowchart.

Next, the operation will be explained based on the drawings.

First of all, when one of the terminals (1a) to (1) (for example, terminal (1a) makes a call request as the other party), the call processing processor (91) of the private branch exchange (4a) is a terminal (
Upon receiving the communication speed and destination number in 1a), it requests connection to the network, records the destination number in the first memo IJ (61), and then stores it in the second memory (62) VC terminal (1a).
Sets a flag with the number of bits corresponding to the communication speed. When the call setting procedure on the D channel is completed, the call processing processor (9) establishes a path to the private branch exchange (4a) and the common trunk B channel network. The data of the terminal (1a) is sequentially written in time slot units through the write circuit (532) according to the address generated by the counter (643) in the third memory (63) of the bit multiplexing unit (63). To explain the time slot, the unit is an 8-bit string, and since the terminal (1a) has a communication speed of 'i 1.2 Kbpε, the first bit in the time slot is a data bit, and the shift bit to the eighth bit are not used. (CC Engineering TT Recommendation 1゜4)
(60) stipulates that unused bits be set to a binary ``1''. Reading from the third memory (63) of the bit multiplexing unit (63) is performed using the bit position recording memo IJ.
(62) Address memo IJ based on the information recorded in VC (641) VCg 3 memory (65j
) is recorded. According to this address information, the third memory (65) is read out from the third memory (633).
) i, the data bits of terminal (1a) can be read.

Next, when the terminal (1b) makes a call request to all the same parties, the call processing processor 49B' is transferred to the first memo I.
When searching for J(61,)', it is learned that the destination number of terminal (1d) is already recorded, and it is stored in the second memory (y
62) to check whether there is a bit margin corresponding to the communication speed of the terminal (1b). There is still 7 bits left, so the second bit in the time slot is specified for the terminal (1b), and a flag is set in the second bit of the next area of the second memory (62). Based on this information, the data bits of the terminal (1b) are recorded in the second area of the address memo IJ (641) in the reading order.
Write memory address B of . Next, the address memory (address information recorded as 64)
memory (641) '(zIf read out randomly, the first bit in the time slot is the data bit of the terminal (1a).

The data bit of the terminal (1b) is read out in the second bit, and the data bit of the terminal (1a) and the terminal (1b) are read out in the same time slot.
) is multiplied and transmitted to the terminal (1d) using the flffl-B channel.

In this state, when terminal (1d) makes a call to terminal (1d), the call processing processor similarly searches the destination number recording memory (61), recognizes that the same address exists, and A flag indicating the number of pits corresponding to the communication speed of the terminal (1C) and the multiplex section gt is recorded in the third area of the position recording memory (62).

Here, since the communication speed of the terminal (1) is 9.6 Kbps, it occupies 2 bits in the time slot. Therefore, the bit position recording memory (62), VC, the 1st bit and the 2nd bit are the terminal (1a). Since the flag for the terminal (1b) has already been set, the flag for the terminal (1C) is set at the 3rd and 4th bits.With this information, the bit multiplexer (63) memo IJ (651) terminal (1C) data bit is written to address C.

Write D to the third and fourth address memory (641). Then, the third memory (
When reading 63 bits, the addresses A, B, C, and D recorded in the address memory (641) can be read in order.The first bit in the time slot is the data bit of the terminal (1a), and the second bit is the data bit of the terminal (1a). is the data bit of the terminal (1b), and the 3rd and 4th bits are the data bit of the terminal (3 terminals CI&), (D') and (1
C) data is multiplexed within the same B channel and sent to the terminal (1
d).

Similarly, data from multiple terminals can be multiplexed until the data bits in a time slot are full.

On the other hand, each time a call request is received from a terminal, the call processing processor (9) activates a sound channel indicating which terminal's data has been fully multiplexed in which bit position of the time slot, and sends it to the partner private branch exchange (4b). In the private branch exchange (4b) and the common trunk (6), the call processing processor (9) performs the reverse procedure of the operation described above based on the information, so that the data of multiple terminals multiplexed within the B channel is is decomposed into data for each terminal and sent to the computer (1d). The computer (1d) processes the data of each terminal and then sends it to the on-premises switching machine (4b). The data led from the private branch exchange (4b) to the common trunk (6) is multiplexed here based on time slot position information and transmitted to the calling side private branch exchange (4a) via the network (5).

In the above embodiment, multiplexing to 64 to 1) T) 8B channels of IBDN was described, but the transmission speed is not limited to this, and transmission speeds other than 18DN may be used. Further, in the explanation of multiple operations, writing to the memory is performed sequentially and reading is performed randomly, but the same effect can be obtained even if the reverse is done.

Furthermore, although the common trunk has been described as being provided outside the private branch exchange, it may be provided inside the private branch exchange.

Further, FIG. 7 shows another embodiment in which a speed converter is provided on the incoming highway of the common trunk.

〔Effect of the invention〕

As described above, according to the present invention, a flag indicating the multiplex unit ft corresponding to the destination number and the communication speed of the terminal is recorded in all memories, and based on that information, the terminal data written to the multiplex unit is Since the data is read out within the time slot of the transmission channel (multiple IT-rows), it is possible to improve the data transmission efficiency of the transmission channel and to obtain an economical product.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIG. 1 is a conceptual diagram showing a multiplex transmission system according to an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a multiple common trunk, and FIG. 3 is a multiplex unit. and detailed diagram of the control section, 4th
The figure shows the configuration of memory. FIG. 5 is a diagram showing how data is multiplexed, and FIG. 6 is a flowchart. FIG. 7 is a diagram showing another embodiment. FIG. 8 is a conceptual diagram showing a conventional transmission system. (1a) ~(1(t) is the terminal, (2a) ~(2g
) are r8DN terminal adapters, (3a) to (3
g) is a speed converter. (4a) to (4b) are private branch exchanges, (5) is network 2 (6
) is a common trunk, (61) and (62) are memory, (
63) is a multiplex part. (631) is memory, (652) is writing circuit,
(633) is a readout circuit, (6ri is a control section, (64)
memory. (642), (645) are empty, +91&! bus,
(Ig indicates the call processing processor of the private branch exchange. In the two figures, the same reference numerals indicate the same or corresponding parts.

Claims (2)

[Claims] (1) In a transmission system in which data is exchanged via a network at a predetermined transmission speed between private branch exchanges that accommodate terminals that have the function of speed conversion to a predetermined signal speed, the communication destination number of the calling terminal is recorded. a first memory; a second memory for recording a flag specifying a position to be multiplexed within a time slot of a transmission channel of the private branch exchange according to the communication speed of the calling terminal; A common trunk consisting of a bit multiplexing section for multiplexing, a control section for controlling the bit multiplexing section based on information recorded in the first and second memories, and a common trunk for transmitting multiple data to the same destination through the same transmission channel. 1. A multiplex transmission system, comprising: a management unit that manages the common trunk so that transmission is multiplexed within the same trunk. (2) The multiplex transmission system according to claim 1, characterized in that a speed converter for converting the communication speed of the terminal to a predetermined signal speed is provided in the common trunk.