JPH02184072A - Solid-state image sensing device - Google Patents

Abstract

PURPOSE:To obtain a MOS type solid-state image sensing device which can read the received light signal of the same picture element twice excellently by providing first and second light receiving regions which can store electric charges independently for the same incident light in a charge storing region, and providing fist and second transistors which discharge the electric charges to the first and second light receiving regions independently. CONSTITUTION:An N-type second light receiving region 30 is formed at the lower side of a light receiving region 14 forming a photodiode D with a P-type layer in-between. A second photodiode E is formed with a P-N junction between the light receiving region 30 and an isolating substrate region 12. The charging and discharging of the photodiode are performed with a first MOS transistor (q). The charging and discharging of the photodiode E are performed with a second MOS transistor (r). Therefore, the incident light is received with the two light receiving regions.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a solid-state imaging device.

In particular, the present invention relates to a solid-state imaging device suitable for two-dimensional optical signal processing such as an optical neural network.

[Prior art] As a conventional solid-state imaging device, an MO as shown in FIG.
There is one in which a large number of S-type light receiving elements are two-dimensionally arranged to form a circuit configuration as shown in FIG.

First, the configuration of the light receiving element will be explained with reference to FIG. In the figure, 1, for example, an N-type silicon substrate 1
A separated substrate region 12 made of a P-type epitaxial layer is formed on the main surface side of the substrate, and an N-type light-receiving region (source region) 14. N-type drain region 16
are formed respectively.

Between these light receiving region 14 and drain region 16,
A reading gate electrode 20 is provided with an insulating film 18 made of a silicon oxide film interposed therebetween.

Further, a drain electrode 22 is provided on the train region 16. Note that one isolated substrate region 12 is grounded via the substrate IO.

Among the above-mentioned parts, a photodiode D by a PN junction is formed at the boundary between the P-type separated substrate region 12 and the N-type light receiving region 14, and the MOS transistor operates as a switching element.

To explain the operation of such a light receiving element, first, the photodiode D is charged to an appropriate voltage E. When an optical signal enters the photodiode D in this state as indicated by an arrow FA, a charge is generated depending on its intensity, and a portion of the charging voltage is discharged.

In this state, when a pulse is input to the gate electrode 20, M
The OS transistor turns on and the photodiode D
is charged again to voltage E. That is, a drain current corresponding to the intensity of the incident light flows. The value of this drain current is converted into a voltage signal by a load resistor (not shown) and output.

Next, referring to FIG. 9, an imaging device in which the above-described elements are two-dimensionally arranged will be described.

In the figure, MOS transistors qij arranged in a two-dimensional manner have gates connected to a common selection line ki in each row, and drains connected to a common selection line ej in each column.
For example, MO3I-transistor ct
The gate of 23 is connected to the selection line 2, and its drain is connected to the selection line β3. In addition, each MO5I
- The above-mentioned photodiodes Dlj are connected to the sources of the transistors q1j.

The selection lines ki are connected to the vertical shift registers 24, and the 1 selection lines [j are connected to the horizontal readout output terminals 28 via the main electrode side of the horizontal readout gate array aj. Further, a horizontal shift register 26 is connected to each gate of the horizontal readout gate array aj, and a shift pulse is inputted to each gate.

Next, the operation of the imaging device having one or more configurations will be explained. As described above, the photodiode Dij of each MOS transistor qij is charged to a predetermined voltage.

In this state, when light is incident on the photodiode Dij, the photodiode Dij is discharged according to the intensity of each incident light.

On the other hand, in the vertical shift register 24, selection pulses are sequentially output to the selection lines ki, and the horizontal shift register 26
Here, selection pulses are sequentially output to the gates of the horizontal readout gate array aj. As a result, the MOS transistors qij are selected in order, and the selection pulse from the vertical shift register 24 is applied to the gate of the selected MOS transistor qij, and the drain is connected to the output terminal 28.

Therefore, from the output terminal 28, the MOS transistor ql
The charging current of the phototransistor Dij of phototransistor Dij will flow in order, and this will be converted into a voltage signal by a load resistor (not shown).

[Problems to be Solved by the Invention] As described above, in a MOS type solid-state imaging device, signals are read out by charging and discharging accumulated charges. Therefore, once a -degree light reception signal is read out, the light reception signal cannot be read out from the photodiode again.

Therefore, for example, if you want to read out the same pixel signal twice in two-dimensional image processing, use X.

Such a MOS type solid-state imaging device cannot be used when it is desired to read signals separately in two directions in the Y direction.

The present invention has been made in view of this point.

It is an object of the present invention to provide a MOS type solid-state image carrier that can satisfactorily read out the light reception signal of the same pixel twice.

[Means for Solving the Problems] One of the present invention provides a light-receiving element in which a charge accumulation region formed by incident light from the outside is formed in one main electrode region of a transistor: First and second light-receiving regions each capable of independently accumulating charges with respect to incident light are provided; The device is characterized in that it is provided with a transistor.

Another invention is one in which a large number of light-receiving elements as described above are arranged one-dimensionally or two-dimensionally.

[Effect] According to the invention, by external light incidence.

Charge accumulation is performed independently in the first and second light receiving regions. These accumulated charges are read out independently by the first and second transistors.

That is, information regarding the same incident light is read out twice.

[Example] An example of the present invention will be described below with reference to the accompanying drawings. Note that the same reference numerals are used for the same components as in the conventional example described above.

FIG. 1 shows an example of the configuration of a light receiving element constituting one pixel in a solid-state imaging device according to an embodiment of the present invention. In the figure, an N-type second light-receiving region 30 is formed on the lower layer side of the light-receiving region 14 forming the photodiode D described above, with a P-type layer interposed therebetween. A second photodiode E is formed by the PN junction between the light receiving region 30 and the separated substrate region 12.

Next, on the main surface side of the separation substrate region 12, an N-type drain region 32 is formed close to the light receiving region 30, and a gate electrode 34 is formed between the two with an insulating film 18 interposed therebetween. has been done. Further, a drain electrode 36 is provided in the train region 32 .

That is, charging and discharging of the photodiode D formed by joining the separated substrate region 12 and the light receiving region 14 is performed by the train region 16. This is done by a first MOS transistor q having a gate electrode 20° and a rain electrode 22 below it. On the other hand, charging and discharging of the photodiode E formed by joining the separated substrate region 12 and the light-receiving region 30 is performed in the drain region 32. Gate electrode 34. Second MO5I-transistor r with drain electrode 36
It is now carried out by

In this way, in this embodiment, the incident light is received by two light-receiving regions. Penetrates to a certain depth. 600-70
Even at a wavelength of 0 nm, it penetrates from the surface to a depth of about several μm to 10 μm. Therefore, in any light receiving area,
Signal detection is possible.

Next, the main manufacturing steps of the light receiving element will be explained with reference to FIG. First, on the main surface side of the isolated substrate region 12, which is a P-type epitaxial layer on the substrate IO,
An N layer 40 is formed (see TAI in the same figure).Next, a second layer 42 is formed on this N layer 40 so that a portion thereof remains (see T8 in the same figure). Two light receiving areas 30 are formed.

Next, on the main surface side of the separation substrate region 12 and P region 42,
First light-receiving area 14 of the mold. Drain region 16.32
are formed respectively (see the same figure (C1)).

Next, an insulating layer 44 for gate insulation is applied to the light receiving area 14.3.
0 and the train region 16.32 (see figure (b)), and a gate electrode 1420.34 is formed thereon.
are formed respectively (see figure (see El)), and an insulating film 18 is formed on the main surface side except for the drain region 16.32.
is formed (see the same figure (Fl)), and furthermore, train region 1
Drain electrodes 22, 36 are formed on each of the electrodes 6, 32 (see Gl in the same figure).

A solid-state imaging device is constructed by arranging the light receiving elements as described above in a multi-dimensional or two-dimensional manner. In Figure 3,
A portion of a two-dimensional solid-state imaging device is shown. Each MO
An element isolation layer 46 is formed between the S transistors, and drain electrodes 22 and 36 are respectively connected to selection lines 48 and 50 for signal readout. These selection lines 4
8.50 is insulated by an insulating layer (not shown). Further, the gate electrodes 20.34 are also connected to selection lines (not shown).

Next, with reference to FIG. 4, a two-dimensional non-life insurance apparatus according to this embodiment will be explained. In the figure, the light receiving element corresponding to a single pixel has two MOS transistors qij and rij and two photodiodes Dij and Eij, respectively (i= l~
x.

j=l=y).

Among these, MOS) - transistors qij.

The connection of the photodiode Dij is the same as in the prior art described above.

Next, second light receiving areas 30 are arranged two-dimensionally in the same manner.
For example, the MO3I-range disk rij corresponding to 6 has a gate connected to a common selection line mj for each column, and a drain connected to a common selection line ni for each row.

The gate of MOS transistor r21 is connected to selection line ml, and its train is connected to selection line n2. Further, the above-mentioned photodiode Eij is connected to the source of each MOS1-transistor rij.

The selection lines mj are each connected to the water shift register 52, and the selection lines ni are each connected to the vertical readout output terminal 54 via the main electrode side of the vertical readout gate array bi. Further, vertical shift registers 56 are connected to the gates of the vertical readout gate array bi, respectively, and shift pulses are input to the gates of the vertical readout gate rows bi.

Next, the overall operation of the above embodiment will be explained. First, the vertical shift register 24 and the horizontal shift register 26
The operation of switching the MO5I-transistor qij and thereby reading out a signal from the photodiode Dij is similar to the conventional example described above. That is,
From the horizontal readout output terminal 28, the light reception signals from each photodiode Dij are sequentially outputted in the horizontal direction.

Next, signal readout in the second photodiode Eij will be explained. In this case, as mentioned above,
Each MO5) Photodiode Eij of transistor rlj
is charged to a predetermined voltage. In this state, when light is incident on the photodiode Eij, the photodiode Eij is discharged according to the intensity of each incident light.

On the other hand, in the horizontal shift register 52, selection pulses are sequentially output to the selection line mj, and the vertical shift register 56
Here, selection pulses are sequentially output to the gates of the vertical readout gate array bi. As a result, the MOS transistors rij are selected in order, and the selection pulse from the horizontal shift register 52 is applied to the gate of the selected MOS transistor rij, and the drain is connected to the output terminal 54.

Therefore, from the output terminal 54, MOS) - transistor r
ij's phototransistor Eij's charging! A current will in turn flow, which is converted into a voltage signal by a load resistor (not shown). That is, the light reception signals from each photodiode Eij are sequentially output from the vertical readout output terminal 54 in the vertical direction.

In this way, according to this embodiment, the light reception signal is output from the output terminal 28.54 independently in both the horizontal and vertical directions.

Next, other embodiments of the present invention will be described with reference to FIGS. 5 to 7. These embodiments are application examples in which a neurocomputer is realized as optical hardware. The output state of each neuron in a network of N neurons is approximately represented by a matrix-vector product (e.g., Journal of the Television Society Vol.
, 42° No. 9 (see 19881, P931-P936).

According to this document, an optical system for calculating such a matrix-vector product has a basic configuration as shown in FIG. 5. In the figure, vector information Vj is output from a light emitting element array 60. These lights are wavefront-converted by a lens system (not shown) into a fan-shaped beam, and uniformly illuminate only the j-column line segment of the optical mask Tij. Here, if each size of the optical mass scale Tij is given as a light transmittance, its output intensity is proportional to Tij-Vj.

Next, all i components of the output light from the optical mask Tij are focused onto one of the light receiving element arrays 62 by a lens system (not shown). Therefore, the i-th light receiving element output tJi is Ui=Ti1. VI+Ti2. V
2+...+Tij, Vj, and a matrix-vector product is obtained at the output of the light receiving element.

If a combination of an imaging device 64 and a light emitting diode array 66 as shown in FIG. 6 is used instead of the optical mask Tij of such a matrix-vector calculator, the lens system before and after the optical 722115 can be eliminated. Become. The same figure (A
) shows an image pickup device 64 and a light emitting diode array 66 facing each other, and the device shown in FIG. It is something.

In the above case, the imaging device 64 shown in FIG. 7 is used. The figure shows a configuration in which the code data input gate (gai) is connected to one selection line ki and the code data manual input gate gbj is connected to the selection line mj in the configuration shown in FIG. 4 above. It becomes.

Each of these gates gai and gbj has one of its main electrodes connected to ground, and when a pulse is input to the gate, the connected selection line is grounded. That is, the signal from the photodiode connected to that selection line will not be read out. By processing the pulses input to these gates gai and gbj, it is possible to freely use the matrix signals to perform various calculations.

Thus, according to the embodiment of FIG. 6, the optical mask Ti
The pattern of j can be easily and quickly changed, and arithmetic processing in the X to Y directions can be freely performed to easily perform two-dimensional image processing.

Note that the present invention is not limited to the above-mentioned embodiments; for example, the present invention can be realized even if the conductivity type of each part is reversed to PN. In addition, the shape and dimensions may be set as appropriate.

Further, in the above embodiment, the image pickup device has the light receiving elements arranged in a two-dimensional manner, but the light receiving elements may be arranged in a prepaid manner.

[Effects of the Invention J As explained above, according to the present invention, since the light receiving areas are formed in an overlapping manner, there is an effect that the light receiving signal of the same pixel can be read out twice in good condition. .

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram showing an example of a light receiving element according to an embodiment of the present invention, FIG. 2 is an explanatory diagram showing the main manufacturing process of the light receiving element of FIG. 1, and FIG. 3 is a diagram showing the light receiving element of FIG. 1. FIG. 4 is a circuit diagram of an embodiment of the present invention, and FIG. 5 is an explanatory diagram showing an example of a matrix-vector arithmetic unit in a neurocomputer. , FIG. 6 is an explanatory diagram showing another embodiment in which the present invention is applied to the arithmetic unit in FIG. 5, FIG. 7 is a circuit diagram of an imaging device in the embodiment of FIG. 6, and FIG. 8 is a conventional FIG. 9 is a circuit diagram showing an example of a conventional image carrying device. 12... Source region, 14.30... Light receiving region, 1
6.32...Drain region, l8-...Insulating film. 20.34...Gate i! Pole, 22.36... Train electrode, 24.56... Vertical shift register, 26
゜52...Horizontal shift register, aj, bi...-gate column, ki, (lj, mj, ni-selection line, Dij. Eij...photodiode, rij, qij=-M
OS transistor. Patent applicant: Japan Victor Co., Ltd. Representative: Kunio Kakiki

Claims (2)

[Claims] (1) In a light-receiving element in which a charge accumulation region formed by incident light from the outside is formed in one main electrode region of a transistor, the charge accumulation region is capable of independently accumulating charges in response to the same incident light. 1. A light-receiving element, comprising first and second light-receiving regions, and first and second transistors each independently emitting charges to the first and second light-receiving regions. (2) A light-receiving element in which a charge accumulation region formed by incident light from the outside is formed in one main electrode region of the transistor.
In a solid-state imaging device having a large number of one-dimensional or two-dimensional arrays, each of the light-receiving elements has first and second light-receiving regions capable of independently storing charge in response to the same incident light. What is claimed is: 1. A solid-state imaging device, comprising: a first transistor and a second transistor, each of which discharges charge independently from the first and second light-receiving regions.