JPH02183123A - Semiconductor circuit - Google Patents

Abstract

PURPOSE:To enable always obtaining of a quantization data with high resolutions by building up a memory means with a plurality of memory circuits connected changeably to a semiconductor circuit to use the memory circuits switching with a contrast judging circuit. CONSTITUTION:A memory means 20 is built up with a plurality of memory means 21 and 22 connected changeably to a circuit through multiplexers 23 and 24 as switching circuit and quantization data are stored as obtained by dividing in plurality an expanse varied in a range of intensity of light to be measured thereinto respectively. A contrast judging circuit 30 for objects is provided to transmits a switching signal to the multiplexers 23 and 24 when a stop signal which a unit light sensor 1 is to output detecting a rising of a detection signal with a maximum time range is outputted before counts of a counter 15 as addressing circuit reaches a specified number. Then, based on counts of an address and the stop signal, the judging circuit 30 outputs a switching signal for the memory circuits 21 and 22 thereby enabling quantization by an ideal step corresponding to a contrast of a video.

Description

[Detailed Description of the Invention] [Industrial Field of Application] This invention uses an optical sensor that converts the distribution of light intensity received by an optical sensor array into a detection signal having a time width that is in a functional relationship with the distribution and outputs the detected signal. The present invention relates to a semiconductor circuit that converts the time width of a detection signal into quantized data and outputs the quantized data, and particularly to a semiconductor circuit for photometry that is incorporated into an autofocus camera.

[Conventional technology]

The light reflected from the subject has a very wide contrast,
In addition, the contrast changes significantly depending on solar radiation conditions, etc., so the optical sensor that detects this needs to have a measurement range that can cover the entire range as much as possible and distinguish between strong and weak light intensity, and when the light intensity distribution width is narrow. It is also required that the resolution does not drop significantly. Therefore, by using an optical sensor that converts the intensity of light into a detection signal with a time width that is a function of the intensity, the dynamic range that can be measured is expanded, and by using a semiconductor circuit that converts the detection signal into a quantized signal, the detection signal can be improved. Products that facilitate post-processing are known.

FIG. 2 is a connection diagram showing one unit optical sensor, and FIG. 3 is a signal waveform diagram of its traverse portion. In the figure, a unit photosensor 1 is composed of a photoconductive type photodiode 1a, a capacitor 1C connected in parallel to this, a reset transistor 1b connected in series, and a comparator 1d having a threshold value vth. ib KH level reset pulse R1 is applied to make the comparator 1 conductive.
The input terminal potential V of d is set to 0 potential (ground potential). At this time, the capacitor 1C is charged via the conductive transistor 1b by the voltage VDD applied in the opposite direction to the diode 1a, and at the time the reset pulse R1 changes to L level, the charging voltage of the capacitor 1C is equal to the applied voltage VDD.
In balance, the voltage V maintains zero potential. In this state, when the light to be detected enters the phototransistor 1aK and its resistance decreases in inverse proportion to the intensity λ of the incident light, the charge in the capacitor 1C is discharged through the diode 1at, and its charging voltage gradually decreases to VDD. Since a voltage difference is generated between the two, the input voltage V of the comparator 1d increases linearly as shown in FIG. When the voltage V reaches the threshold value vth, the output of the comparator 1d changes from the L level to the H level, and thereafter the detection signal S1 that maintains the H level is output. Therefore, the unit optical sensor functions to convert the light intensity λ1 of the detected light into a time width τ1, which is a function of the light intensity λ1, and after the reset pulse R8 returns to the L level until the detection signal S1 rises. The time becomes the time width τ1.

In the unit optical sensor described above, the light intensity λ of the detected light
1 and the time width τ1 until the detection signal rises are inversely proportional to each other, the function curve becomes a hyperbola as shown in FIG. When trying to quantize the light intensity λ1 by the time width τ1, which is a function of the light intensity, determine the range R of the light intensity to be measured, and set its maximum value to λ0. The minimum value is λm, and the time interval is divided into a plurality of 9, for example, m pieces, and the time width T1 corresponding to each light intensity λ0 to λ1 to λm and its minimum time τ0 (corresponding to the light intensity λ0).

If the longest time τm (corresponding to λm) is quantized data, then
A semiconductor circuit determines which of the quantized data the time width τ1 of the detection signal S1 of the unit photosensor 1 corresponds to, thereby determining the distribution of the light intensity of the detected light, in other words, the contrast of the light from the subject. can be measured by converting it into easily measurable quantized data that has a wide dynamic range called time width.

FIG. 5 is a block diagram showing a conventional semiconductor (b) circuit using the above-mentioned optical sensor, and the optical sensor section 1o is constructed by arranging a plurality of unit optical sensors 1 in an array as explained in connection with FIG. The detection signal S1 of each unit optical sensor 1 is input to the OR gate 7 as a starting signal generation circuit, and is also supplied as an activation signal to a latch circuit '11 arranged corresponding to each unit optical sensor 1. be done. On the other hand, 2 is, for example, a ROM that stores the above-mentioned quantized data at addresses and
, and the quantized data D specified by the address A1 issued by the counter 5 as a quantized data specifying means.
R is input to a comparator 4 as comparison means. The clock circuit 6 emits a clock pulse CP with a fixed period, for example, which is shorter than the minimum time width τ0 of the quantized data, and is counted by a counter 3 as a clock counting circuit, and the counted data DC is input to the comparator 4. be done. Therefore, if the quantized data DR to be stored in the ROM 2 is stored in the form of how many clock pulses CP should be counted within each time width τ1, the comparator 4 determines that the data DR and DC have the same value. When this occurs, an address switching signal SAy is generated, and upon receiving this, the counter 5 serving as address designation means counts the switching signal SAi and updates the address by one. At that time, the quantized data DR outputted to the comparison means 4 is called to the bus 41, and if there is a unit photosensor 1 whose detection signal S1 has risen to H level during this time, the corresponding latch circuit 11 is Loaded. In addition, the Hisun circuit 4 has an RO
New quantized data stored at the updated address of M2 is input.

To start the semiconductor circuit shown in FIG. 5, initialize by applying a reset pulse R1 to each unit optical sensor 1 and a reset pulse R8 to the counter 5. The photodiode 1a senses the detected light and connects the capacitor 1C. Start charging. The potential V of the unit photosensor 1 that received the strongest light in the sensor array reaches its threshold value vth, and the output of the comparator 1d changes from L level to H level.
The first quantized data of the level is read into the comparator 4. Further, the output of the NAND gate 9 which receives the signal SS changes from the H level to the L level, the counter 3 which receives this also becomes operable, and the counter 6 starts counting clock pulses CP.

When the data DR and DC match, the comparator 4 outputs an address switching signal S that instantaneously changes from H level to L level.
A is output, the counter 5 updates one address, and at the same time, the quantized data that has been output to the comparator is latched into the latch circuit 11.

Furthermore, the output of the NAND gate 9 instantaneously goes to the L level due to the switching signal SA, and the counter 3 starts counting the clock pulses CP again after being reset. By repeating this operation by the number of quantized data, the latch circuit 11 accumulates quantized data corresponding to the number of unit photosensors 1.

[Problem to be solved by the invention]

In conventional semiconductor circuits, ROM is used as a storage means.
The quantized data to be stored in 2 is stored in the range R1 of the light intensity λ1 of the detected light B, in other words, the contrast t of the subject to be measured - the range Rt - the quantized data DR that is divided into multiple parts is assumed in advance. Therefore, if the contrast of the subject and the range R of the assumed light intensity λ happen to coincide, or if both ranges are close, quantized data with high resolution can be obtained. however,
If the contrast of the subject is lower than the expected range, only a portion of the quantized data stored in ROM2 can be used for quantization, resulting in a decrease in contrast resolution.For example, the quantized data required for automatic focus adjustment The problem arises that it is not possible to obtain

An object of the present invention is to obtain a semiconductor circuit that can always obtain quantized data with high resolution even if there is a difference in the range of the intensity of the detected light.

[Means for determining the problem 'j &: #I] In order to solve the above problem, according to the present invention, a plurality of detection signals 'fr which receive the light to be measured and have a time width that is a function of the intensity of the light are provided.
- A light sensor unit that sequentially generates light, a storage means that stores the light intensity obtained by dividing the light distribution range of the measured light into multiple units as quantized data as a time value that is a function of each address, and generates the address. an addressing circuit for counting clock pulses having a predetermined period;
a comparison circuit that outputs an address switching signal to the addressing circuit when the counted value of the counting circuit and the quantized data from the storage means are equal, and the time width of the detection signal is adjusted accordingly. A storage circuit that stores quantized data corresponding to a reference light distribution range and a memory that stores quantized data that corresponds to a narrower light distribution range in a device that converts and outputs quantized data. a storage means switchably connected to a semiconductor circuit; and when all of the plurality of detection signals are output at a point in time when the number of addresses counted by the addressing circuit is less than a predetermined number, the storage circuit is connected to a narrow light beam. and a contrast determination circuit for the light to be measured that issues a signal to switch to a storage circuit that stores quantized data corresponding to the distribution range of .

[Effect]

In the above means, the storage means is switchably connected to a circuit via a multiplexer serving as a switching circuit, and consists of nine plurality of storage circuits, and the range R of the light intensity to be measured is divided into a plurality of different widths. In addition to storing the quantized data obtained by By providing a contrast determination circuit for the subject that issues a switching signal to the multiplexer as a switching circuit when the subject contrast is output, for example, quantization is first performed by a memory circuit that stores quantized data corresponding to standard contrast, and the result is If a stop signal is issued when the count number of the quantized data specifying means does not reach a predetermined number, this is determined to be a low contrast of the subject, and quantized data with a narrower range is stored in the memory. Since it is possible to automatically adjust the quantization by switching to the circuit, even when the contrast of the subject is low, it is possible to perform quantization by reducing the quantization increments. It is possible to prevent a decrease in the resolution of the underlying Doji data.

〔Example〕

The present invention will be explained below based on examples.

FIG. 1 is a block diagram showing an embodiment of the present invention, and detailed explanation will be omitted by using the same reference numerals for the same parts as in the conventional device. In the figure, the optical sensor section 10
2 and 3 are arranged in a plurality of unit optical sensors 1 in a play shape, and on the output side of each unit optical sensor 1 there is a latch that uses the respective detection signal 81 as an operation signal. circuit 11, OR gate 7 as a starting signal SS generating circuit, and A? as a stopping signal ST generating circuit. lrD gate 8 is provided. Furthermore, in the storage means 2a for the quantized data DR, a plurality of storage circuits represented by two ROMs 21 and 22 in the figure are switchably connected by multiplexers 23 and 24 as switching circuits, and an H level signal is connected to the in terminal of the multiplexer. When the switching signal SW is input, the ROM 21 storing wide quantized data in the range R is connected to the semiconductor circuit, and the in
When the L level switching signal 5lll is input to the n terminal, the ROM 22 with a narrow range is connected to the semiconductor circuit. Furthermore, the counter 15 as an addressing circuit has a Qk terminal whose output changes to L level when the count reaches a predetermined number, and seven lip-flop circuits 31, 32 . and 33 are connected in cascade to form a nine-contrast determination circuit 30, and a stop signal ST from the jND gate 8 is applied to the flip-flop 32. The reset terminal R of the counter 15 as an address designation circuit receives the start signal SS from the OR gate 7, and the count input terminal C receives the switching signal 8A and the stop signal ST from the comparator 4 via the OR gate 25. is input, and the start signal SS,
The switching signal SA is inputted via the NAND gate 9 to the reset terminal R of the counter 3 as a clock counting circuit.

In the nine-embodiment circuit configured as described above, the original sensor section 10 is usually composed of nine optical sensors 1 arranged in an array, and the image of the object is captured by means such as a lens (not shown). The image is formed on the Senbu array. Therefore, the reset transistor j of each unit light center t1
When the bK reset pulse R1 is applied at the same time, each unit optical sensor 1 starts photometry when R1 changes to L level. Then, a detection signal S1 that rises after a time width τ0 is output, which is the time required for the voltage V of the unit photosensor that received the strongest light λ0 to reach the threshold value vth and for the output of the comparator 1d to change to the H level. Ru. Thereafter, a detection signal s1 is sequentially output from each unit optical sensor after a time width τ1 that is a function of the light intensity.

Counters 3 and 15. Comparator 4. clock times
186. Storage means 20. The contrast determination circuit 30 and the like are semiconductor circuits that sequentially quantize the time width τ1 required for the rise of the detection signal S1 in DiC, starting from the shortest side. A set is provided. The counter 15 as an addressing circuit is, for example, a 7-bit counter, and is connected to the multiplexer 23 and the latch circuit 11 via the address bus 41. Each latch circuit 11 is configured with 7 pits corresponding to the bus 41, reads the address A1 in synchronization with the rise of the detection signal S1, and reads the address A1 from the data bus 41.
It may be configured so that the address A1 stored therein can be read out via the ROM 21 or 22 as a storage circuit, and the quantized data DR stored in the ROM 21 or 22 as a storage circuit may be read out.

The ROMs 21 and 22 store quantized data obtained by dividing the measuring range R of the intensity of light to be quantized into a plurality of equal numbers, corresponding to the address A1, and store the quantized data corresponding to the address A1. It suffices if it can be read by A1, and if the number of divisions m is the number of bits of the addressing circuit 15 fn bits, then m = 2 +
i can decide. That is, when the counter 15 of the addressing circuit has a 7-bit configuration, the memory circuit 21 stores a total of 129 functions for the light intensities λ0 to λm divided into the measurement range R4-128 shown in FIG. Quantized data having a time value of τ0 to 7m is stored for each address A1, and the memory circuit 22 stores finely divided quantized data obtained by dividing the narrow measurement box @R/X in the same way.

In addition, the clock CP is the minimum time τ0 of the quantized data DR.
1L with a constant cycle clock pulse which is further divided into multiple parts.
Data D counted by counter 3 as the counting circuit
Since C is compared with the quantized data DR inputted from the storage circuit by the comparator 4, the quantized data DR is
The clock pulse CPt is stored in the memory circuits 21 and 22 in a form that specifies how many clock pulses CPt should be counted.

Next, the operation of the embodiment circuit will be explained. First, reset pulses R, , R,' of the KH level are applied to each unit optical cell 1 and the counter 15, and reset pulses R, , R4 of the L level are applied to the 7-lip 70-tubes 31 and 33.

At this time, the comparator input terminal of each unit photosensor is at ground potential, and the outputs of the comparators 1d are all at L level, so the outputs of OR gate 7 and AND gate 8 are also at L level. As a result, the output of the NAND gate 9 becomes H level) The counter 3 of the clock CP is reset, and the counter 15 is reset by the H level reset pulse R2. Also, since the output Qk of the counter 15 becomes H level, the output Ql of the 7-lip 70-tub 31
is L level, output Q of 32, and output Q3 of 33 are H level.
By applying the H level switching signal SW to the multiplexers 23 and 24, the ROM 21 storing quantized data with a wide range R is connected to the semiconductor circuit.

Next, the reset pulse R,,R,'frL level K.

When R,, R, are changed to H level, the comparator input V of the unit optical sensor starts to rise at a rising speed inversely proportional to the intensity of light received by the photodiode 1a, but the 7 lip-flops 31, 32, 33 State f: Maintain. After 70 hours have elapsed from this state, when the most intense light λ0 is received and the voltage V of the nine-unit optical sensor reaches the threshold value Vth K, the output of the comparator 1d changes to H level. At the same time, the output of KOR gate 7 changes to H level and the start signal SS is applied to NAND gate 9 and counter 15, so the output of WAND gate 9 becomes L level and counter 3 starts counting clock pulses CP. At the same time, the 1-column 15 outputs the first address AI, and the quantized data corresponding to this is read into the comparator 4 from the ROM 21. In this state, the output of the comparator 4 is in a mismatched state, so it becomes H level.

In this state, when the counter 3 counts CPt and the count data DC matches the quantized data DR, the output of the comparator 4 changes from H level to L level for a short time, and the L level switching signal 8A is applied to the NARD gate 9. As a result, the output of the NAND gate becomes H level for a short time to reset the counter 3, and immediately returns to the KL level, and the counter 3 resumes counting the clock pulses CP. Also, the switching signal 8A that has changed to L level is O
R gate 25f: Since the count terminal CK of the counter 15 as an address designation circuit is inputted through the R gate 25f, the counter 15 counts one and the updated address A! is sent to the ROM 21 via the bus 41 and the corresponding quantized data is read into the comparator 4, and at the same time, the quantized data corresponding to the address A1 or the address AI is allocated corresponding to the unit optical sensor that operated first. The time width τ0 as a function of the light intensity λ0 received by the first unit photosensor that was latched by the latch circuit 11
The next time width τ1 is converted into quantized data or address data and stored in the latch circuit 11 based on .

The above quantization operation is performed using counter 1 as an addressing means.
The process is repeated every time the address 5 is updated, and quantization is performed sequentially starting from the unit photosensor that receives strong light. When the output of the comparator 1d of the unit light cell receiving the weakest light λm changes to HL/H, the output of the AND gate 8 becomes H level, and the stop signal ST is sent to the counter via the OR gate 25. Since the signal is input to the reset terminal R of the counter 15, the count terminal C of the counter 15 is fixed at H level and stops counting. Furthermore, if the counter 15 counts a predetermined number of switching signals and the output Qk changes to L level before the output of the AND gate 8 changes to H level, the output Q of the flip-flop 61 changes to H level. However, the output Qz − of the flip-flop 32.33 is
Since Qs maintains the H level, multiplexer 23.
24 remains connected to the ROM 21, and quantization is completed when the output stop signal ST of the AND gate 8 becomes H level, and the reset signal R1yR2 is again at H level.
The quantization operation is stopped until the circuit is initialized by the L level reset signal R@#R4.

On the other hand, when the count number of the counter 15 as an addressing circuit does not reach a predetermined number smaller than the number of quantized data, the outputs of all unit photosensors 1 change to H level, and in response to this, the AND gate 8 is the H level stop signal 5Tt
- When the counter 15 receives this via the OR gate 25 and stops the counter 15, the contrast judgment circuit 30 receives the stop signal 5Tt.
The 0 knob 32 changes its output to the Qzt-L level, and in response, the output switching signal 8W' of the 7 lip-flop 33 changes.
The ROM 22 has a contrast determination function that changes the level to lzL level, and a pair of multiplexers 21 and 22 operates to store quantized data in a narrow measurement range R.
is connected to the semiconductor circuit, and the quantization operation in fine steps is performed again from the beginning.

Assuming that the contrast of the image formed on the photosensor array from one subject changes significantly in this way, different contrasts were set as the measurement range R, and the measurement range R was divided into 2 m and 11 parts. A suitable step that corresponds to the contrast of the video is provided by providing a plurality of storage circuits storing quantized data and having a contrast judgment circuit output a switching signal for the storage circuits based on the address count number and the stop signal. It becomes possible to transform into a child. Note that it goes without saying that the child-ized data temporarily stored in the latch circuit 11 is read out to an external circuit via the data bus 42, and post-processing of the data is performed.

〔Effect of the invention〕

As described above, the present invention comprises a storage means consisting of a plurality of storage circuits switchably connected to a semiconductor circuit through switching circuits, each storage circuit storing quantized data having a different contrast from the other, and The memory circuit is configured to be switched and used by the contrast judgment circuit. As a result, it is now possible to quantize the contrast of light incident on the original sensor array using quantization data suitable for this, which conventionally caused problems when the contrast of light incident on the optical sensor array was low. It is possible to provide a semiconductor circuit in which deterioration in resolution is eliminated and highly accurate quantized data can be obtained without being affected by the width or narrowness of the contrast. Further, by applying this semiconductor circuit to, for example, focus adjustment of an automatic focus camera, an advantage can be obtained that focus adjustment can be performed with higher precision than conventional devices.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG.
Figure 3 is a connection diagram showing a unit optical sensor, Figure 3 is a signal waveform diagram of each part of the unit optical sensor, Figure 4 is a characteristic diagram showing the relationship between light intensity and time width, which is a function of it, and Figure 5 is FIG. 2 is a block diagram showing a conventional circuit configuration. 1... Unit light cell, 1a... Photodiode, 1
d... Comparator, 2.20... ff1-1.
3...clock), 6...clock generation circuit, 7...
Starting signal generation circuit (OR gate), 8...Stop signal generation circuit (AND game)), 10...Light/sensor section, 1
1... Latch circuit, 21.22... Memory circuit, 23
．． 24... switching circuit (multiplexer), 30...
Contrast judgment circuit, 31.32.33...7 lip-flop circuit, R1, R,, R,, R,... Reset signal, L... Detected light, Sl... Detection signal, R.
...Measurement range, τ...Time width, CP...Clock pulse, DR...Quantized data, A1...Address data, SA, SW...Switching signal, SS and 28th 3rd In the time span of Kuni No. 4 Goku Ritdengo

Claims (1)

[Claims] 1) An optical sensor unit that receives the light to be measured and sequentially generates multiple detection signals with a time width that is a function of the intensity of the light, and a light sensor that detects the intensity of the light by dividing the distribution range of the light to be measured into multiple parts. A storage means that stores each address as quantized data as a time value that is a function of the address, an addressing circuit that generates the address, a counting circuit that counts clock pulses having a predetermined period, and a count value of this counting circuit. and a comparator circuit that outputs an address switching signal to an addressing circuit when and the quantized data from the storage means are equal, and converts the time width of the detection signal into quantized data corresponding thereto. In a device that outputs quantized data based on a reference light distribution range, a memory circuit that stores quantized data that corresponds to a reference light distribution range, and a memory circuit that stores quantized data that corresponds to a narrower light distribution range can be switched. a storage means connected to the circuit; and when all of the plurality of detection signals are output at a point in time when the number of addresses counted by the addressing circuit is less than a predetermined number, the storage circuit is connected to a quantum circuit corresponding to a narrow distribution range of light. 1. A semiconductor circuit comprising: a contrast determination circuit for light to be measured that emits a signal to switch to a storage circuit that stores data for determining the contrast of light to be measured.