JPH02174243A - Pattern inspection device and optimization of filter used - Google Patents

Abstract

PURPOSE:To enable all chip patterns on a wafer to be inspected 100% in a short time by providing a means for drawing an optical filtering processing filter at a chip central part detection system by detection signal of Fourier image-forming optical system and by using an optical screening filter for optimizing characteristics of inspection at the central part. CONSTITUTION:Optical distribution of the position of a filter 18 is detected by a movable area sensor 41 using a Fourier image-forming optical system 33 the Fourier image of pattern at the central part of a chip 11 is detected. That detection signal is processed by a CPU 42 and characteristics suited as a screening filter is calculated. Then, by setting a filter material and controlling in the movement of a shutter 44 using data stored into the CPU 42, drawing is made so that light from a second laser light source 43 obtains specified characteristics at a filter 19 through a rotary mirror 45.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a method for optimizing an apparatus for inspecting patterns of IC chips on a wafer and a filter to be used, which enables continuous processing even when an optical cutoff filter is used.
The purpose of this project is to provide a device that performs pattern inspection in a short time and a method for optimizing the filters used in it. Chip periphery inspection involves dividing an IC chip on a wafer into the periphery of the chip and the center of the chip and inspecting each separately. The latter is equipped with a chip center inspection system and a chip center inspection system, the former performs digital image processing on the pattern image for inspection, and the latter optically forms the pattern image and performs filtering processing for inspection. In the chip center inspection system, the chip center inspection system is configured to include means for optically drawing a filtering filter using a detection signal of a Fourier image forming optical system, and In order to optimize the filter to be used, the drawing means is repeatedly used.

[Industrial Application Field] The present invention relates to an apparatus for inspecting patterns of IC chips on a wafer and a method for optimizing a filter to be used.

Conventionally, it is desirable to repeat checks as many times as possible during the manufacturing process for IC chips on a wafer, but even with the use of optical spatial processing type and digital image processing type automatic inspection equipment, due to the high degree of miniaturization, It often took a long time.

Therefore, there was a need to develop a technology that could perform high-speed, high-resolution processing over the entire wafer area in a short period of time.

(Prior art) Since LSI is used for large-scale memory devices, for example, MO
S devices have started to produce 4M bits from 1M bits. Therefore, it has become necessary to make patterns on wafers increasingly finer and process them with submicron line widths. The size of the machine itself has become larger, and 6-inch sizes have become mainstream. Inspection of LSI requires functional testing using electrical methods and inspection using automatic visual inspection equipment. In the former function test, although it is possible to check for breakage and short circuits in the pattern,
This is because it is impossible to discover defects such as short circuits, and inspection using a visual inspection device is also required. LSI
There are two types of automatic pattern visual inspection equipment: optical spatial processing type and digital image processing type. The former is an inspection method in which the detection signal is optically filtered and inspected.
The latter detects a wide area all at once using a camera or the like, applies inspection logic, and performs automatic inspection. The applicant for the patent of the present invention has already proposed that by using both in combination, it is possible to perform general-purpose inspection on LSI patterns.

The invention is to inspect IC chips on a wafer by dividing them into a peripheral part A and a central part B, depending on the size of the pattern and the presence or absence of regularity. In FIG. 6, the wafer 10
When a part of the area is enlarged, it is divided into a peripheral area A (macro area) and a central area B (micro area).

First, the former [inspection using the spatial filtering method] for the peripheral area A will be explained.

This inspection utilizes the fact that optical Fourier transformation occurs when a laser beam is reflected from a fine repeating pattern. When a plane wave beam is incident on a regularly repeating pattern and the reflected light is projected through a lens, or when the pattern is light transmissive, the transmitted light is projected through a lens, the repeating portions form a Fourier transform image. However, they are distributed as bright spots at discrete locations. However, if there is a defect in the pattern, the pattern repeatability will deviate from that part, and the resulting light distribution will have a widely diffused shape. Therefore, by masking the normal bright spot distribution, only defect No. 48 (non-repetitive component) can be extracted.

FIG. 7 is a diagram showing the configuration of the light cutoff filter optical system.

In FIG. 7, ■ indicates a laser light source, 2 to 4 are ordinary lenses, and 5 to 7 indicate a surface on which a target pattern is placed or an imaging surface. Now, if a pattern 5a to be inspected is placed on the surface 5 and the pattern 5a is a regular fine pattern, a Fourier diffraction image 6a appears on the imaging surface 6. When this image is re-imaged on the surface 7 by the lens 4, the image 7a, ie, undergoes inverse Fourier transformation, returns to the original target pattern 5a. Therefore, if there is a defective portion d, d2 in the target pattern 5a, the image of this defective portion on the surface 6 will look like the defective diffraction image 5b. If the target pattern 6a is both a fine repeating pattern and a defect, the image on the surface 6 will be the sum of the Fourier diffraction image 6a and the defect diffraction image 6b, and in addition to a large number of bright spots, there will be a faint glow overall. It looks like there is.

Consider the case where a light blocking filter 6C is installed on this Fourier transform surface 6. In the figure, the black dot of filter 6C is the light blocking part,
The white part around it is the light transmitting part. in this case,
When the diffraction image 6a due to the normal pattern is blocked, only the diffraction image due to the defect passes through the filter 6C.
The surface 7 is re-imaged (i.e., inversely Fourier transformed) by
A defect image 7b appears. In this way, defects d,,d, can be detected. When inspecting a chip pattern, a film on which the chip pattern is imaged is placed as the target pattern surface 5, or a light reflection method is used.

If the filter 6C is placed on the surface 6, a defect image 7b is obtained on the surface 7 when there is a defect in the chip pattern, and the inspection ends instantaneously. It is suitable for inspecting the micro area B of the chip pattern, and since this inspection does not involve pattern comparison or logical operations as described later, the processing does not require a long time.

Next, digital image processing suitable for inspecting macro area A of a chip pattern will be described.

As shown in FIG. 8, two chips on a wafer 10 are to be inspected, and part 2 of their peripheral area (macro area) A is
When 0a and 20b are extracted, the images become 21a and 21b, and the degree of mismatch is detected for these image patterns in step 22. At this time, image 21a
has defect d, and image 21b is normal. If the degree of mismatch is determined multiple times (for example, nine times) while shifting these image patterns by n (≧1) pixels vertically, horizontally, etc., the degree of mismatch will be 0 between normal patterns when they are completely matched. In reality, there is a matching error due to noise and manufacturing misalignment, which is close to 0. However, if there is a defect d as in this example, the degree of mismatch will not be 0 even if the positioning is performed as shown in . Therefore, the case where the degree of mismatch is the minimum is determined in step 23.The arrow indicates the case where the degree of mismatch is the minimum.In the case where the degree of mismatch is the minimum, the difference between images 21a and 21b is determined in step 24.

Next, filtering is performed in step 25, and the defect image is left in step 26. In order to inspect all of the chip peripheral area (macro area) A, the small areas 20a and 20b are moved around the entire circumference.

As explained above, in FIG. 7, the center part B of the chip is inspected, and the peripheral part A is excluded from the inspection target.
Masking. In addition, in FIG. 8, the chip peripheral area A is inspected, and the chip center area B is not subject to inspection.
Mask the center part B. (In the latter case, masking the center B is actually not necessary due to resolution issues.) The areas to be inspected and the areas to be excluded from inspection are divided by a means such as an area division mechanism. do. An example of this means is to change the aperture of the optical system for an actual chip so that when the Fourier diffraction image is clearly visible, the range within the aperture is defined as the center part B of the chip, and the outside thereof is defined as the peripheral part A of the chip.

In this way, it was possible to inspect the entire number of chips across the front surface of the wafer.

[Problems to be Solved by the Invention] In the configurations shown in FIGS. 7 and 8, conventional photographic plates and films are used as optical cutoff filters. Therefore, although these filters are used to create a drawing once, they cannot be optimized for fine changes in the pattern actually inspected, and the S/N of the detected image is low. Furthermore, when producing these, wet processing using chemicals is required, making it difficult to simplify the equipment and shorten the processing time. Furthermore, when the pattern is changed to another one, the filter must be rewritten each time, making inline inspection impossible.

SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned drawbacks, to provide an apparatus that enables continuous processing even when an optical cutoff filter is used, and allows pattern inspection of all chips in a short time.

[Means for Solving the Problems] FIG. 1 is a diagram showing the basic configuration of the present invention. In FIG. 1, 31 is a chip peripheral inspection system, 32 is a chip center inspection system, 33 is a Fourier image forming optical system, and 34 is a filter drawing means.

It is equipped with a chip peripheral inspection system 31 that divides the ■C chip on the wafer into the chip periphery and the chip center and inspects each separately, and a chip center inspection system 32, and the former performs digital image processing on the pattern image. In wafer pattern inspection equipment, the latter is performed by optically forming an image of the pattern and performing filtering processing.
The present invention has the following configuration. That is, the chip center inspection system 32 is equipped with a means 34 for drawing an optical filter using a detection signal from the Fourier image forming optical system 33.

[Operation] Using the Fourier imaging optical system 33, the light distribution at the filter position is detected, and the Fourier image of the pattern at the center of the chip is detected. The detection signal is subjected to arithmetic processing to calculate characteristics suitable for a cutoff filter. Next, add the filter material. A filter is created by the filter drawing means 34 based on the calculation result. By detecting the pattern image at the center of the chip using the new filter, pattern detection can be performed in an extremely short time under optimal conditions.

[Example] Figures 2 and 3 are schematic diagrams of the configuration of an apparatus for inspecting IC chip patterns using a chip center inspection system as an embodiment of the present invention, and Figure 2 uses a Fourier image forming optical system. FIG. 3 is a diagram showing the time of filter drawing according to the present invention. In Fig. 2, ■ is a laser light source, 11 is a wafer sample, 12 is a sample stage,
13 is a light beam expander, 14 is a dividing shutter for the peripheral and central parts of the chip, 15 is a beam splinter, 16 is a Fourier transform lens, 17 is an inverse Fourier transform lens, 18
19 is a filter, 19 is an imaging lens, and 33 is a Fourier image imaging optical system. The light from the laser light source 1 is reflected once by the beam splitter 15 and irradiated onto the wafer sample 11 through the split shutter 14 . The reflected light is passed through the beam splinter 15 again to the Fourier transform lens 1
6. By using the Fourier transform lens 16, the position of the filter 18 becomes the Fourier transform plane, so if a light blocking filter is placed there, the diffraction image of the normal pattern of the wafer 11 will be blocked. On the other hand, the diffraction image due to the defect is diffused over a wide range and is not completely blocked by the filter. When the transmitted light is inversely transformed by the inverse Fourier transform lens I7 and imaged by the imaging lens 19, only a defect image is obtained, and the position of the defect can be detected.

In the present invention, before that, the light distribution on the Fourier plane indicated by the filter 18 is detected by the movable area sensor 41, and the third
A filter pattern is calculated and stored by the central processing unit CPU42 shown in the figure. Fig. 3 H filter wi image means 3
4, the position of the Fourier image forming optical system 33 in FIG. 2 has been replaced with a wafer inspection optical system 35 using a new filter. In FIG. 3, reference numeral 19 indicates a new filter, and the filter is drawn as described later at the position of the broken line, and then the wafer pattern is inspected at the position of the solid line where hunting is performed. 42 is the central processing unit CPU
, 43 is a second laser light source, 44 is a shutter, and 45 is a rotating mirror. Preferably, the filter 19 is made of photochromic glass. Here, photochromic glass is a glass that causes a photoreversible color change phenomenon between light energy and chemical energy, and has the characteristics shown in the following general formula.

Here, λ indicates the wavelength, and λ1<λ2. At this time,
The short wavelength portion is absorbed on the left side, and the long wavelength portion is absorbed on the right side. - The left side part absorbs ultraviolet light, and the right side part absorbs visible light. The change from left to right is a coloring process called a photochemical reaction, and the reaction is fast. Conversely, the change from right to left is a fading process and is generally a slow reaction.

Discoloration progresses over time, but in some cases the coloring remains stable until irradiation with light of a certain wavelength. Therefore, if a cutoff filter is made using glass with this property, ICs on the wafer can be
The same blocking filter characteristics can be maintained while inspecting the chip pattern. and other species of chi.
Characteristics can also be easily modified to apply to knob patterns.

By controlling the movement of the shutter 44 using the data stored in the central processing unit 42 through the processing described above, the light from the second laser light source 43 passes through the rotating mirror 45 to the filter 19 to obtain predetermined characteristics. The drawing is done as follows.

FIG. 4 is a flowchart for the above operations shown in FIGS. 2 and 3. In Figure 4, pattern detection is performed using the previously drawn filter, the obtained signal is Fourier-transformed through arithmetic processing, and the filter is optimized by creating the filter again. It is shown that by repeating , a filter that is more suitable for the actual pattern can be obtained. Furthermore, the diagram shown next to the step of centering the filter drawing system shows the relationship between the light intensity and the filter pattern to be created.

Furthermore, FIG. 5 is a perspective view of the apparatus including an IC chip peripheral inspection system. In FIG. 5, the same reference numerals as in FIGS. 1 to 3 indicate the same parts. Reference numeral 4647 indicates a peripheral inspection camera, in which two identical cameras are arranged in parallel to take images of different chips. Reference numeral 48 denotes a camera controller, which controls the movement of the camera that images the peripheral and central parts of the chips on the wafer 11 and the divided shutter 14 .

[Effects of the Invention] As described above, according to the present invention, in an apparatus that detects the pattern of an IC chip by dividing it into the center and the periphery, the center inspection is performed using a light blocking filter whose characteristics can be optimized. , all chip patterns on a wafer can be easily inspected in a short time. Since the characteristics are good, the inspection results have high resolution. Furthermore, if a material that causes a photoreversible color change phenomenon is used as the light blocking filter, it is possible to easily inspect different types of chip patterns.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle configuration of the present invention, FIGS. 2 and 3 are schematic diagrams showing the configuration of an apparatus as an embodiment of the present invention, and FIG. 4 is an operation flowchart of FIGS. 2 and 3. Figure 5 is a perspective view of the inspection device for the center and peripheral parts of the IC chinon pump, Figure 6 is an explanatory diagram of the wafer and chip, Figure 7 is a diagram showing the configuration of the light blocking filter optical system, and Figure 8 is FIG. 3 is a diagram for explaining digital image processing. 1.-Laser light source 11-Wafer sample 19--Filter 31-Chip peripheral inspection system 32-Chip center inspection system 33-Fourier image forming optical system 34-Filter drawing means

Claims (1)

[Claims] I. A chip peripheral inspection system that divides an IC chip on a wafer into a chip peripheral area and a chip central area and inspects each separately (
31) and a chip center inspection system (32), the former performs digital image processing on the pattern image for inspection, and the latter optically forms the pattern image and performs filtering processing for inspection. In the wafer pattern inspection apparatus, the chip center inspection system (32) is equipped with means (34) for drawing an optical filtering filter using a detection signal from a Fourier image forming optical system (33). Pattern inspection equipment. II. A chip peripheral part inspection system (31) and a chip center part inspection system (32) for dividing an IC chip on a wafer into a chip peripheral part and a chip central part and inspecting each part separately;
In the filter used in a wafer pattern inspection apparatus, the former performs digital image processing on a pattern image for inspection, and the latter performs an inspection by optically forming a pattern image and performs filtering processing. The optical filtering filter provided in (32) is connected to the Fourier image forming optical system (32).
The filter pattern is optimized by drawing by the drawing means (34) using the detection signal of 3), and then drawing the pattern detection signal of the wafer inspection optical system on the filter again by the drawing means (34). Optimization method for filters used in pattern inspection equipment.