JPH0216708A - Structure of capacitor - Google Patents

Abstract

PURPOSE:To obtain a capacitor array at a low cost by a method wherein a silicon oxide layer or a silicon oxinitride layer formed by subjecting a silicon substrate directly to an oxidization treatment or a nitrization treatment is used as a dielectric layer and a metal thin film applied to the surface of the dielectric layer is used as one of the electrodes and the silicon substrate is used as the other electrode. CONSTITUTION:The surface of a silicon substrate 5 having a specific resistivity of 15OMEGA<-cm> is polished to have a mirror surface and a precise and defect-free silicon oxide layer 8 with a thickness of 2.0mum is formed on the mirror surface. An electrode layer 9 is formed on the layer 8 on the mirror surface of the substrate 5. The rear of the substrate 5 is also polished to remove silicon oxide and, after that, an electrode layer 7 is formed on the rear by evaporation of gold. If the silicon substrate is cut into chips with proper sizes to form capacitor elements, the proper number of the capacitors having little variation of capacitances can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a capacitor structure for an electronic component. Furthermore,
Specifically, the present invention relates to a chip-type single-layer capacitor structure using a silicon substrate.

[Conventional Technique #l] Recently, capacitors have become smaller as electronic devices have become smaller, so capacitors for integrated circuits have been manufactured using many techniques.

Conventional substrates for chip-type electronic components usually use alumina sintered bodies, and if a particularly smooth surface is required, glazed alumina is used, which is a glazed alumina substrate. A substrate is used. Further, especially when surface defects such as insufficient smoothness and boreness must be avoided, a substrate made by slicing alumina crystal (sapphire) and mirror-polishing is used.

Metal substrates such as aluminum, iron, and copper have good conductivity and have no defects on their surfaces, but these metals have problems with heat resistance and cannot be used in electronic parts in the air. heat treatment was not possible.

Furthermore, when trying to make a single-layer capacitor using an extremely thin dielectric film, if you try to take out the electrodes in the thickness direction, it is extremely difficult to take out the external electrodes on the alumina substrate side because the element thickness is thin. It was difficult. In addition, when the thickness of a single-layer capacitor element is extremely thin, the bores, irregularities, and roughness on the surface of the alumina substrate can cause cracks and non-uniformity in the dielectric and resistor. There was a second problem with management.

Furthermore, in the current development of MO3 type DRAM for LSI, an MO3 type gate and a :1 capacitor are formed as one memory on a silicon wafer, and this is highly integrated to develop a megabit class memory. This :1 capacitor uses silicon oxide, unsightly silicon nitride, and silicon nitride, which are produced by direct oxidation or nitridation on a silicon wafer, as a dielectric material. ) is a microscopic capacitor, and its scale is different from that of the large-area, large-capacity capacitor of about 1 OnF (nanofarad), and its purpose is also completely different.

Furthermore, conventional capacitors that utilize an oxide film formed on the surface of metal as a dielectric include aluminum electrolytic capacitors and tantalum electrolytic capacitors. Furthermore, in the conventional single capacitor structure, the electrode area of the capacitor cannot be easily changed, making it difficult to manufacture a precision capacitor.

[Problems to be Solved by the Invention] The present invention shows that a capacitor structure can be manufactured using a conductive silicon substrate. Therefore, the present invention has a silicon substrate that is conductive and serves as an electrode on one side, has high reliability, and has temperature characteristics.
The purpose is to provide a precision capacitor structure with excellent frequency characteristics.

Another object of the present invention is to provide a high-performance capacitor structure that can be made inexpensive by forming an array of capacitors using an extremely thin dielectric layer with stable quality.

[Structure of the Invention] [Means for Solving the Problems] The gist of the present invention is to oxidize or nitride the surface of a silicon thin plate having a specific electrical resistance of 20 Ω-cm or less to reduce the resistance to 2.0 μm or less. A silicon oxide film, oxynitride film, or nitride film with a thickness of This is a capacitor structure that is formed by vapor deposition or plating and is made of other electrodes.

By using a silicon thin plate whose surface is roughened and whose surface area is increased, the dielectric surface area can be increased and a larger capacity can be achieved.

It is preferable that the MsA made of the metal film is divided into a plurality of independent electrodes to form a parallel capacitor array. In addition, by trimming the metal electrode film on the dielectric surface and slightly adjusting its area,
Capacitance can be adjusted, and precision capacitors with less variation in capacitance can be manufactured.

In conventional aluminum electrolytic condensers, the surface of aluminum foil is oxidized to form aluminum oxide on the surface.
Because aluminum oxide is porous, it has a large surface area and is suitable for increasing capacity, but since a liquid electrolyte solution is used as an electrode, there are problems with chipping and miniaturization. Because the film has rectifying properties, it has polarity. In addition, since the structure uses liquid electrolyte, it is not possible to create independent capacitors on the same substrate when chipped, and the only way to create individual aluminum electrolytic capacitors is to integrate them. Tantalum oxide produced by oxidizing the surface of porous tantalum metal, which is powder-sintered metal, is used as a dielectric and a liquid solid electrolyte is used as an electrode, but since a porous metal sintered body is used, Arraying is difficult and expensive.

The types of conventional capacitors are as follows.

That is, as described above, it is a capacitor of ultra-small size and ultra-small capacity for LSI memory, and cannot be used for anything other than LSI memory.

Furthermore, since aluminum electrolytic capacitors have polarity and use liquid, there are problems with miniaturization and environmental resistance, and it is impossible to form them into an array.

Although tantalum electrolytic capacitors are small, large-capacitance, and highly reliable capacitors, they cannot be formed into an array. In addition, tantalum oxide, which is used as a dielectric,
Although it has a higher dielectric constant than the silicon oxide of the present invention, it is inferior in temperature characteristics and frequency characteristics.

The present invention directly oxidizes or nitrides a silicon substrate, and uses silicon oxide, silicon oxynitride, or silicon nitride generated on the surface of the silicon substrate as a dielectric layer, and uses the silicon substrate as one electrode, and the surface of the dielectric layer. Au, Ag%A
The other electrode was coated with a metal thin film such as I, 81, etc. by vapor deposition, plating, etc.: There is a J capacitor structure.

Silicon substrates are currently being produced in large quantities as raw materials for ICs, solar cells, ponds, etc., and in order to manufacture the capacitor structure of the present invention, the specific resistance value of the silicon thin plate must be determined from the viewpoint of temperature and frequency characteristics. , 20Ω-e1m or less, these silicon substrates for ICs and solar cells that can be produced in large quantities can be used as they are.

Therefore, the silicon thin plate can be made of single crystal or polycrystal.

Forming a defect-free homogeneous silicon oxide, silicon oxynitride, or silicon nitride film with a thickness of 2 μm or less on the silicon substrate surface by oxidizing or nitriding the silicon substrate is a clean method developed for LSI manufacturing. roots,
Also, by using an oxidation furnace and a nitriding furnace, it is possible to form a uniform defect-free pattern up to a thickness of several tens of layers.

Silicon oxides and nitrides are extremely stable substances.
Temperature characteristics 4 Frequency characteristics are extremely excellent, but due to their low dielectric constant, materials with high dielectric constants such as lead titanate and tantalum oxide have been used as capacitor materials. By reducing the thickness of the dielectric material, a capacitance of several tens of nF was obtained. Furthermore, the surface area of the dielectric can be increased by increasing the surface area by making the surface of the Zinocon substrate uneven by polishing or blasting, and then subjecting it to oxidation or nitriding treatment.
Large capacitances, for example several hundred nF, can be obtained.

According to the present invention, in order to produce an electrode of a capacitor, if a silicon substrate having a specific resistance value of 20 Ω-e1m or less is used, the silicon substrate can be used directly as an electrode. However, if soldering is required, apply Au%Ag, A! etc. to be coded.

Other electrodes are made of Au, Ag, Affi, S on the dielectric layer.
Furthermore, in the capacitor structure of the present invention, a plurality of parallel capacitors having the same or different capacitances are arranged on the same silicon substrate. Providing Au, Ag, A! directly coated on the dielectric layer.
A capacitor array can be easily fabricated by partially removing the electrode layer of , SI, etc. by etching or polishing and providing a plurality of independent electrodes. Furthermore, in the capacitor structure of the present invention, even in the final manufacturing process, the gold i-electrode layer on the M electric layer can be trimmed to a predetermined capacitance, and a capacitor with extremely high precision can be manufactured. Furthermore, since the dielectric layer of the present invention is made of silicon oxide, silicon oxynitride, or silicon nitride, it has a small coefficient of thermal expansion and is resistant to thermal shock, so laser trimming can be used and the production of precision capacitors can be increased.

The structure of the chip-type:1 capacitor of the present invention is such that its substrate includes:
Utilizes silicon single crystal or polycrystalline wafers used in ICs, solar cells, etc. that have no defects such as bores, have mirror surfaces, and have a specific electrical resistance value of 20 Ω-cm or less. Extremely thin silicon oxide on the surface L,
A dielectric film of silicon oxynitride or silicon nitride can be formed. Further, the formed dielectric film of silicon oxide, silicon oxynitride, or silicon nitride can have good bonding properties with the metal thin film.

According to the capacitor structure of the present invention, an array type capacitor with a thickness of 2 μm or less is formed on a silicon substrate with a specific resistance value of 20Ω-C or less, and this substrate is also used as one electrode of the capacitor. It is possible.

Further, in the capacitor structure of the present invention, A is added to L of the dielectric film of silicon oxide, silicon oxynitride, or silicon nitride.
An electrode layer is formed by depositing or plating a metal thin film such as u, Ag, Affi, Si, etc., and the silicon thin plate of the substrate is used as another electrode.

The silicon substrate used in the present invention is suitably grown from a silicon melt. Such a silicon substrate generally does not have a bore and is formed into a single crystal or polycrystalline body.

By using a silicon substrate with such properties, defects in extremely thin dielectrics caused by surface bores can be fixed, making it possible to manufacture products with guaranteed high quality. Furthermore, according to the present invention, by using a silicon thin plate having an electrical resistivity of 2 Ω-cm or less, the silicon substrate itself can be used as an electrode, making it possible to form an extremely thin dielectric material. We were able to provide a capacitor structure in which electrodes can be easily taken out from the dielectric layer capacitor.

According to the capacitor structure of the present invention, by utilizing the surface of the silicon substrate, formation of an extremely thin dielectric film is possible.
This has become possible without impairing the film homogeneity.

Figure 1 shows the structure of a conventional single-layer capacitor, in which an electrode layer 3 made of gold or the like is formed on an insulator substrate 4 made of alumina or the like, leaving a region B of the gold layer 3 for forming external electrodes. Then, a dielectric layer 2 is formed thereon, an electrode layer 1 is formed thereon, and an external W and a pole are formed in the region A and the region B, respectively.

In contrast, the structure of the capacitor according to the present invention
As shown in FIG.
A dielectric layer 8 of silicon vg or silicon nitride is formed. An electrode layer 9 of a metal thin film layer forming a capacitor pattern is formed thereon. The areas where the external electrodes are to be formed are A on the top of the electrode layer 9 and B (on the bottom surface of the silicon substrate).
For example, as shown in the figure, an electrode Wj7 may be formed on the lower surface of a silicon substrate). Also, rather than just using the bottom surface of the silicon substrate as an electrode.

As shown in FIG. 2B, it is also possible to use a portion where the oxide film on the upper surface of the silicon substrate is removed by polishing, etching, etc. (if necessary, an electrode WJ7 is provided as shown in FIG. 1) as an electrode. The capacitor pattern of this electrode layer 9 can be formed as desired to form a desired capacitor array.

Therefore, with the capacitor structure according to the present invention, a plurality of capacitors with a capacitor pattern of 9.9"9" or 9+11 as shown in FIG. 3A can be created.

That is, a capacitor element f- having a cross section as shown in FIG.
If it is divided into the same substrate as shown in FIG. 3A, a plurality of capacitors having various capacitances can be integrated. IHJ can also be formed by integrating capacitors CIn, CI, Cs, and Ca, which have the area of each capacitor pattern and each capacitance, and the corresponding circuit diagram is shown at the beginning of Figure 3. It is.

In addition, the materials of the metal thin film electrode layer 9 used in the present invention include Au%Ag, AI! Or it is a conductive metal such as Si.

The capacitor structure obtained according to the present invention can be used, for example, for hybrid integrated circuits used in electronic equipment, etc.

Next, the capacitor structure of the present invention will be explained with reference to examples, but the present invention is not limited to the following examples.

[Example 1] A silicon substrate manufactured using the Czochralski method for IC manufacturing and mirror-polished and having a specific resistance value of 15 Ω-cm was baked in pure oxygen at 900°C for 11 hours to form a silicon substrate 5.
A dense and defect-free silicon oxide layer 8 having a thickness of 2°0 μm was formed on the surface of the substrate (see FIG. 2). Silicon oxide substrate 5
On the mirror surface of , gold is deposited for an electrode to form an electrode layer 9,
Further, after removing silicon oxide by polishing the back surface of the silicon substrate 5, gold was deposited to form an electrode layer 7. This silicon substrate was cut into large chips of 1 cm x 1 cm by dicing to produce capacitor elements.

When we measured the capacitance of this capacitor, we found that it was 1 nF (
(at IMHz), the variation was ±10%. By adjusting the electrode area on the dielectric surface of the capacitor using laser trimming, the above-mentioned variation was reduced to 11% or less.

Further, the temperature coefficient was 350 ppm/''C.

[Example 2] A mirror-polished silicon substrate 5 for IC manufacturing with a thickness of 0.5 m and a specific resistance value of 0.1 Ω-C was treated in nitrogen at 1200° C. for 10 minutes to form a silicon substrate 5 with a thickness of 0.1 Ω. A 1 μm silicon nitride film 8 was grown on the silicon substrate 5. 1cm x 1cm+ with electrode 9.7 attached as in Example 1
A capacitor element was obtained. Is this capacitor static? 1te
When n was measured, it was 21 nF (at IMHz) and t-
an8 was 0°5%. Also, the temperature coefficient is 30
ppm/°C.

[Example 3] The mirror surface of a silicon substrate 5 with a specific resistance of 10"Ω-C and a thickness of 0.6" was mirror-polished for IC manufacturing with an abrasive to a uniform roughness of 15μ. After roughening the surface and increasing the surface roughness, oxidation treatment was performed at 1000°C for 30 minutes in a silicon oxide to uniformly cover the rough surface with a thickness of 0.1 μm:
A 1-inch film 8 was obtained.

Furthermore, after polishing and removing the oxide film on the back surface, both surfaces were plated with gold to form electrodes 9 and 7.

As a result, I cut out a 5 m x 5 ■ capacitor and quietly installed it. When the vit was measured, it was 30nF (IMHz
), and tan δ was 0.3%.

Further, the temperature coefficient was 50 ppm/''C.

[Example 4] 5g x 1 from the electrode-formed silicon substrate produced in Example 3
The silicon substrate of QIII@ was cut out, and the gold electrode 9 on one side of the oxidized Schiffun film 8 was partially etched.
A parallel capacitor array with three different independent capacitances formed on the same substrate by forming independent electrode patterns (for example, 9.9'9") in the shape of ax 5wa, 5w x 3+m, 5■ x 1-. 9.9"9" was created.The capacitance of each was 30nF, 18nF, and 6nF, respectively.
Met.

[Effects of the Invention] By adopting the above-described structure of the capacitor according to the present invention, the following remarkable technical effects were obtained.

First, we were able to provide a chip-type capacitor using an extremely thin dielectric layer with a structure that allows reliable manufacture.

Second, by creating a capacitor structure using silicon oxide, silicon oxynitride, and silicon nitride as dielectric materials, we have achieved high-frequency characteristics with extremely little variation in capacitance.
We were able to provide a small plate capacitor with an excellent temperature coefficient.

Thirdly, since it is possible to provide a fundensor array with stable quality and different capacities, it is possible to downsize HICs and the like.

[Brief explanation of the drawing]

FIG. 1 is a perspective view showing the structure of a conventional single-layer capacitor. FIGS. 2A and 2B are perspective views showing the structure of a single-layer capacitor according to the present invention. 3rd IyJ shows the structure of a plurality of integrated capacitors using the capacitor structure of the present invention, A is an example of the capacitor pattern, and B is a circuit diagram thereof. [Explanation of symbols of main parts] 5, Silicon substrate 7, Electrode layer 8, Dielectric layer of silicon nitride, fIII silicon nitride, or silicon nitride 9.9°, 9'', 9 '611. Metal thin film electrode layer patent applicant Mitsubishi Mining and Cement Co., Ltd. (one other person) Representative Patent attorney Hiroshi Kuramochi (one other person) Go to Figure 3 Figure 3B Procedural amendment December 2, 1988 Patent Office site Kan Yoshi 11'1 Takeshi Bun 1, Indication of 11 cases 1988 Special Patent, YF Application No. 165925 2, Title of invention'-1 Denser structure 3, Supplementary + E +: Relationship with i person, 11 cases Applicant Address: 5-1 Marunouchi-chome, Daida-ku, F, Tokyo Name: Mitsubishi Mining Cement Co., Ltd. (1 other person) Representative: Masaya Fujimura 4, Agent address: 1-chome, Suda-cho, Kami 11.1, Chiyoda-ku, Tokyo 101 2
Address [1 Koku-Shikoku Building 3F 5, Amendment Order No. 11, Attendance 6, Supplement 11:, Target (1) [Inventor] column 7 of the application, Contents of the amendment (1) Inventor column of the application Please correct it as per the attached application form. (Inventors = "J) There is no change." (2) On page 9, line 5 of the specification, [by polishing, blasting, etc.] [by polishing, blasting, etching, etc.] (3) Correct [Production] in the 14th line of page 10 of the same h to [productivity]. (4) Correct [Figure 3 A] of the 1st line of the 14th page of the same h to [ Third
Figure A] is corrected. (5) Correct [Figure 3 opening] on page 14, line 7 to [Figure 3 B]. (6) Correct Figure 3A as shown in the attached sheet. 8. List of attached documents (1) Corrected application form (2) Corrected Figure 3A

Claims (3)

[Claims] (1) The surface of a silicon thin plate having a specific electrical resistance of 20 Ω-cm or less is oxidized or nitrided to form a silicon oxide film, oxynitride film, or nitride film with a thickness of 2.0 μm or less on the surface of the silicon substrate. A capacitor structure comprising a dielectric layer formed on the dielectric layer, the silicon thin plate used as one electrode, and a metal film formed on the dielectric surface by vapor deposition or plating to serve as the other electrode. (2) The capacitor structure according to claim 1, wherein the silicon thin plate has a roughened surface to increase the surface area. (3) The capacitor structure according to claim 1, wherein the metal film electrode is divided into a plurality of independent electrodes to form a parallel capacitor array.