JPH0216679U

JPH0216679U -

Info

Publication number: JPH0216679U
Application number: JP9521488U
Authority: JP
Priority date: 1988-07-19
Filing date: 1988-07-19
Publication date: 1990-02-02

Description

[Brief explanation of drawings]

第１図は、本考案に係る時間差画面メモリ付テ
レビ受像機の一実施例を示すブロツク図である。１……画像処理部、２……画面メモリ部、３…
…画像遅延回路、４……メモリ動作遅延回路、５
……メモリ制御部、６……画像切換部、７……画
像表示部。 FIG. 1 is a block diagram showing an embodiment of a television receiver with time difference screen memory according to the present invention. 1... Image processing section, 2... Screen memory section, 3...
...Image delay circuit, 4...Memory operation delay circuit, 5
. . . memory control section, 6 . . . image switching section, 7 . . . image display section.

Claims

[Claims for Utility Model Registration] An image display section that displays a television image; an image processing section that generates a television image signal to be displayed on the image display section; and between the image display section and the image processing section. an installed image switching unit; a plurality of screen memory units installed in parallel between the image processing unit and the image switching unit; a memory control unit that issues a storage command to the screen memory unit; an image delay circuit that is installed in association with a predetermined number of screen memory units among the screen memory units and makes the screen stored in the screen memory unit a screen at a time earlier than the time when the storage command is issued; A memory operation that is installed in association with a predetermined number of screen memory units among the plurality of screen memory units, and makes the screen stored in the screen memory unit a screen at a later time than the time when the storage command is issued. A television receiver with a time-difference screen memory, comprising a delay circuit and a time difference screen memory.