JPH02165787A - Synchronization separation circuit for magnetic recording and reproducing device - Google Patents

Abstract

PURPOSE:To obtain a synchronizing signal with simple composition by applying a compared output obtained by comparing an up and down counter output with video data by a digital comparator to a gate circuit, switch-controlling first and second clock signals, and deriving the synchronizing signal from the output terminal of the digital comparator. CONSTITUTION:In the horizontal synchronizing signal part of the video data, when the relation between values (a) and (b) in a figure is a<b, an H-CLK passes through an AND gate 35, an OR gate 38, and an AND gate 37 and executes control so that an up-down counter 34 can be counted down. At this time, an up-down terminal U/D is made into a down D direction. Consequently, in the synchronizing signal part, detailed following up is executed by the H-CLK signal. On the other hand, for a video signal interval, the relation of a>b is obtained, an L-CLK counts up the up-down counter 34, and the U/D is made into an up U direction. Thus, the horizontal synchronizing signal can be obtained from a terminal 41.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a magnetic recording/reproducing device, and particularly to a simple type of magnetic recording/reproducing device, in which a video signal recorded with FM modulation, which is most suitable for the device, is processed after FM demodulation.
The present invention relates to a synchronization separation circuit of the same device that separates a synchronization signal from video data.

(b) Conventional technology In general, home VTRs have a cassette type β
Three formats have been put into practical use: the β format, the VH8 format based on the VHS format, and the 8mm format, which has a standardized standard.Each uses a dedicated cassette and is compatible with VTRs of the same format. recording and playback. For example, signal processing during recording and playback is based on analog signal processing, published by Japan Broadcasting Publishing Association, edited by Japan Broadcasting Corporation, NHK Home Video Technology JP, 67 and P.
93-96.

(c) Problems to be Solved by the Invention In the conventional example described above, each luminance signal and color signal is amplified by a linear amplifier, and most of the processing of color signals, etc. is also done in analog processing, so various adjustments are required. There are extremely many parts and the disadvantage is that there are many steps when assembling the equipment, leading to an increase in equipment costs.

In view of the above-mentioned drawbacks, the present invention proposes a synchronization separation circuit that is most suitable for a magnetic recording/reproduction device that can record and playback using a tape cassette called an audio C cassette. .

(d) Means for Solving the Problems The present invention converts an analog video signal obtained by a photoelectric conversion element into an AD converter, performs FM modulation on the digital output of the AD converter, and records it on a magnetic tape with a magnetic head. In a magnetic recording and reproducing apparatus that reproduces a video signal recorded on the magnetic tape, the FM
A digital comparator to which video data obtained by demodulating the signal with an FM demodulator is added, a gate circuit to which a first clock signal and a second clock signal having different frequencies are added, and an upstream circuit to which the output of the gate circuit is added. a down counter, a comparison output obtained by comparing the up/down counter output and the video data by the digital comparator is applied to the gate circuit to control switching of the first and second clock signals, The configuration is such that a synchronization signal is derived from the output end.

(*) Effect: In the synchronization separation circuit of the magnetic recording/reproducing apparatus of the present invention, a synchronization signal can be obtained from video data with a simple configuration without requiring various adjustment circuits.

To explain the present invention according to the drawings, FIG. 1 is a synchronization separation circuit of the magnetic recording/reproducing device of the present invention, FIG. 2 is a block diagram of the same device, and FIG. 3 is for explanation of FIG. 2. The waveform diagram is shown.

In the drawings, (1) is an image sensor as a photoelectric conversion element, (2) is a first preamplifier, (3) is a DC regeneration circuit, (4) is an AD converter, (5) is a pre-emphasis circuit, and (6) is a counter. FM modulation circuit, (7) is a head driver, (8) is a magnetic head, (9) is a first switching circuit, (10) is a second preamplifier, (11)
is the limiter amplifier, (12) is the counter 2 FM demodulator,
(13) is a controller that outputs various control signals;
(14) is a sensor driver, (15) is an iris adjustment circuit, (16) is an image integration circuit, (17) is an iris adjustment terminal, (18) is a control input terminal, (19) is a de-emphasis circuit, (20) is the dropout detection circuit, (2
1) is a second switching circuit, (22) is an image memory,
(23) is a DA converter, (24) is a mixer, (25
) indicates an RF modulator, (26) indicates a magnetic tape,
The image signal is obtained from the image sensor (1) as an analog video signal, and the image sensor output is obtained from the first preamplifier (2).
), and only the effective signal components contained therein are extracted.

In the next stage DC regeneration circuit (3), the image sensor (1)
DC reproduction is performed using the OP B (optical black) signal as a reference, and the DC reproduced video signal is passed through a video integration circuit (16) and an AD converter (
4). In the former case, a value corresponding to an average value, peak value or intermediate value is obtained by setting a desired time constant.

As a result, the video integrated output signal is sent to the iris adjustment circuit (15).
The sensor driver (14) is connected to the sensor driver (14) through the iris, and iris adjustment is performed by reverse charge transfer or the like. In this case, when using a mechanical iris adjustment method, the output of the iris adjustment circuit drives the driver of the mechanism.

On the other hand, the latter is applied to the AD converter (4).

This is a circuit that performs AD conversion by making step changes in accordance with the input. Its function is oven loop automatic gain control (AGC), which maintains a nearly constant average value even if the average value of the input signal fluctuates. Conversion data can be obtained. One of the outputs of the AD converter (4) is applied to the image memory (22) through the second switching circuit (21) as a signal for direct display, and after being stored in the memory (22), it is sent to the DA humbater (23) - mixing. A composite video signal is output through the device (24).

On the other hand, data corresponding to high frequency parts of the image is emphasized through a pre-emphasis circuit (5), and applied to a counter-type FM modulation circuit (6), where the digital signal is FM-modulated and sent to the head driver (7) and the first switching It is applied to the magnetic head (8) via the circuit (9) and recorded on the magnetic tape (26).

Next, during reproduction, the video signal recorded on the magnetic tape (26) is detected as an FM signal by the magnetic head (8), and the video signal is detected as an FM signal by the first switching circuit (9) - second preamplifier (10) -
Limiter amplifier (11) - Power counter 2 FM demodulator (12)
) - second switching circuit (21) - image memory (22
)-DA converter (23)-mixer (24), a composite video signal is obtained. A synchronization separation circuit for obtaining a synchronization signal provided in the controller (13) shown in FIG. 2 is shown in FIG. 1, and includes (27) (28) (29)
(30) is a video data terminal, (31) and (32) are first and second clock terminals to which high and low clock signals (CLK) are applied, respectively, (33) is a digital comparator, and (34) is an up/down counter. , (35)<36)
(37) is an AND gate, (3g) (39) is an OR gate, (40) is an inverter, (41) is a synchronous output terminal,
(42) indicates a DC power supply terminal.

Next, the operation of the synchronous separation circuit of the present invention will be explained.
The first clock terminal (31) is set to high (-19 as an example).
0KHz) CLK, the second clock terminal (32) receives a low (-201Qlz for example) CLK, and the input terminal (27) (2g
)(29) and (30) are assumed to include 4-bit video data. At this time, the 4-bit video data has a numerical value consisting of 0 or 1 data at each timing, and for explanation, it is represented as a DA (digital-to-analog) converted video signal in FIG. The broken line is the count contents of the up/down counter (34).

First, in the horizontal synchronization signal part of the video data, the value a in FIG.
When the relationship between and b is a<b, the high CLK is AND
The up/down counter (34) is controlled to count down through a gate (35), an OR'7' gate (38), and an AND gate (37). At this time, U/D(
The up and down terminals) should be in the down (D) direction.
0” is added.

Therefore, the synchronization signal section follows the high CLK signal closely. When the video data and the contents of the up/down counter (34) are equal, the AND gate (37)
is closed, CLK is cut off, and the up/down counter (3
4) remains unchanged.

- Since a>b for the actual video signal section, AN
The low CLK controls the up/down counter (34) to count up through the D gate (36), OR gate (38), and AND gate (37). At this time, "1" is added to U/D (up, down terminal) so that it is in the up (U) direction. From the above operation, the terminal (41
), a horizontal synchronizing signal shown in FIG. 3(b) is obtained as a synchronizing signal.

As for the vertical synchronization signal, a synchronization signal with a vertical frequency (60 Hz) can be obtained using a similar configuration.

(g) Effects of the invention According to the synchronization separation circuit of the magnetic recording and reproducing apparatus of the present invention, F
The synchronization signal included in the M-demodulated video data can be configured by a logic circuit including a digital comparator, an up/down counter, and a gate circuit, and a synchronization separation circuit that can handle digital signals can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing a synchronization separation circuit of a magnetic recording/reproducing device of the present invention, FIG. 2 is a block diagram of the same device, and FIG.
Explanation of the figure A waveform diagram is shown. (1... Image sensor, (4)... AD converter, (6)... Counter 2 FM modulator, (8)
... Magnetic head, (12) ... Counter type FM demodulator, (13) ... Controller, (27) (2B
)(29)(30)...Video data terminal, (31)
...High CLK terminal, (32)...Low CL x
Terminal, (33)...Digital comparator, (34
)...up/down counter, (35) (36 bar 37
)...AND'7'-), (38)(39)・O
R gate, (41)... Synchronous output terminal.

Claims (1)

[Claims] (1) The analog video signal obtained by the photoelectric conversion element is AD converted by an AD converter, the digital output of the AD converter is FM modulated, the FM wave is magnetically recorded on a magnetic tape by a magnetic head, and the magnetic head is used to convert the In a magnetic recording and reproducing apparatus for reproducing video signals recorded on a tape, a digital comparator to which video data obtained by demodulating an FM signal recorded on the magnetic tape by an FM demodulator is added, and a first comparator having different frequencies. It comprises a gate circuit to which a clock signal and a second clock signal are applied, and an up-down counter to which an output of the gate circuit is applied, and a comparison output obtained by comparing the output of the up-down counter and the video data by the digital comparator is In addition to the gate circuit, the first and second
1. A synchronization separation circuit for a magnetic recording/reproducing device, characterized in that the circuit controls switching of a clock signal of the digital comparator, and derives a synchronization signal from an output terminal of the digital comparator.