JPH02164187A - Signal interpolation method - Google Patents

Signal interpolation method

Info

Publication number
JPH02164187A
JPH02164187A JP63320025A JP32002588A JPH02164187A JP H02164187 A JPH02164187 A JP H02164187A JP 63320025 A JP63320025 A JP 63320025A JP 32002588 A JP32002588 A JP 32002588A JP H02164187 A JPH02164187 A JP H02164187A
Authority
JP
Japan
Prior art keywords
signal
circuit
interpolation
input
frequency component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63320025A
Other languages
Japanese (ja)
Inventor
Masashi Hori
正志 堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP63320025A priority Critical patent/JPH02164187A/en
Publication of JPH02164187A publication Critical patent/JPH02164187A/en
Pending legal-status Critical Current

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  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Television Systems (AREA)

Abstract

PURPOSE:To form an interpolation signal not causing flicker and deterioration in resolution by applying average interpolation to a low frequency component of an original signal through a delay line for a prescribed delay time and applying pre-value interpolation to a high frequency component of an original signal. CONSTITUTION:The original signal is inputted to an input terminal 20 and the original signal is fed to a low pass filter(LPF) 22 for low frequency component output and a high pass filter(HPF) 24 for high frequency component extraction. An output of the LPF 22 fed to a 1st input of an adder circuit 30 via a 1H delay line 24 and a 1/2 circuit 28 and fed to a 2nd input of the adder circuit 30 via a 1/2 circuit 32. The output of the HPF 24 is fed to a 3rd input of the adder circuit 30, the adder 30 sums the 1st, 2nd and 3rd input signals and outputs the sum to an output terminal 34. The 1/2 circuits 28, 32 halve the amplitude of the input signals. Thus, the adder circuit 30 applies average interpolation to a low frequency component from the LPF 22 and applies pre- value interpolation as to the high frequency component from the HPF 24.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は信号補間方法に関し、例えば、フィールド信号
を疑似フレーム信号に変換する場合のように原信号の間
を相似の信号で補間する方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a signal interpolation method, and for example, to a method of interpolating between original signals with a similar signal, such as when converting a field signal into a pseudo frame signal. .

[従来の技術] フィールド信号を疑似フレーム信号に変換する場合の補
間方式としては、基本的には、第1フイールドをそのま
ま第2フイールドにする前値補間方式と、第1フイール
ドの隣接する水平走査信号の平均値を第2フイールドと
する平均補間方式と〔発明が解決しようとする降考捻〕 しかし前値補間方式では、補間信号が原信号と同一であ
るため、再生映像にフリッカが発生することがある。特
に、低域成分におけるフリッカは画像劣化の原因になる
。他方、平均補間ではフリッカは発生しないが、信号の
低域から高域にわたり一様に平均化するため、高域成分
が損なわれてしまい、再生映像のシャープさに欠けるこ
とがある。特に、垂直相関の無い画像では解像度が著し
く低下してしまう。
[Prior Art] The interpolation methods for converting a field signal into a pseudo frame signal are basically a pre-value interpolation method in which the first field is converted into a second field, and a horizontal scanning method in which the first field is adjacent to the first field. In the average interpolation method in which the average value of the signal is used as the second field, and in the previous value interpolation method, flicker occurs in the reproduced video because the interpolated signal is the same as the original signal. Sometimes. In particular, flicker in low frequency components causes image deterioration. On the other hand, average interpolation does not cause flicker, but because it uniformly averages the signal from low to high frequencies, high frequency components are lost and the reproduced video may lack sharpness. In particular, the resolution of images without vertical correlation is significantly reduced.

例えば、映像信号の成る1水平走査周期におけう信号が
第2図Aのようであり、その次の1水平走査周期におけ
る信号が第2図Bのようであるとする。平均補間回路は
、基本的には、第6図に示すように1水平走査期間(I
H)の遅延線10と、遅延線10の出力に遅延前の信号
を加算する加算回路12とからなる。実際には加算回路
12の加算後に1/2を乗算するか、加算前の各信号を
1/2にするのであるが、本質的な問題ではないので図
示、を省略した。遅延線10から加算回路12に第2図
Aの信号が印加される時点では、加算回路12の他の人
力には第2図Bの信号が入力され、加算回路12の出力
(補間信号)は、信号Aと信号Bの高域成分の位相ズレ
により、第2図Gに示すような、著しく解像度の低下し
た信号になる。
For example, assume that the signal in one horizontal scanning period of a video signal is as shown in FIG. 2A, and the signal in the next one horizontal scanning period is as shown in FIG. 2B. The average interpolation circuit basically operates during one horizontal scanning period (I
The delay line 10 shown in FIG. Actually, after addition by the adder circuit 12, the signals are multiplied by 1/2, or each signal before addition is halved, but this is not shown since it is not an essential problem. At the time when the signal shown in FIG. 2A is applied from the delay line 10 to the addition circuit 12, the signal shown in FIG. , due to the phase shift between the high frequency components of signal A and signal B, a signal with a significantly reduced resolution as shown in FIG. 2G is obtained.

そこで本発明は、フリッカが生じず、且つ解像度の劣化
を伴わない信号補間方法を提示すること本発明にかかる
信号補間方法は、原信号の帯域に応じて適応的に補間方
法を変更することを特徴とする。また、原信号の低域成
分ついて所定遅延時間の遅延線により平均補間し、原信
号の高域成分について前値補間することを特徴とする。
Therefore, the present invention provides a signal interpolation method that does not cause flicker and does not cause resolution deterioration.The signal interpolation method according to the present invention adaptively changes the interpolation method according to the band of the original signal. Features. Further, the present invention is characterized in that average interpolation is performed on the low frequency components of the original signal using a delay line having a predetermined delay time, and previous value interpolation is performed on the high frequency components of the original signal.

[作用] このように、信号帯域に応じて補間方法を変更すること
により、信号に応じた好ましい補間を行なえる。また、
低域成分と高域成分とで補間信号の形成法を変えること
により、平均補間の不具合も、前値補間の不具合も生じ
ない。従って、フリッカも生じず、解像度の大きな劣化
も無い。
[Operation] In this way, by changing the interpolation method according to the signal band, it is possible to perform preferable interpolation according to the signal. Also,
By changing the method of forming interpolation signals for low-frequency components and high-frequency components, neither average interpolation problems nor previous value interpolation problems occur. Therefore, no flicker occurs, and there is no significant deterioration in resolution.

〔実施例〕〔Example〕

以下図面を参照して本発明の詳細な説明する。 The present invention will be described in detail below with reference to the drawings.

第1図は本発明の方法を実施する第1の回路例を示す。FIG. 1 shows a first example circuit implementing the method of the invention.

入力端子20には原信号が入力され、その原信号は、低
域成分抽出用のロー・パス・フィルタ(LPF)22と
、高域成分抽出用のハイ・バス・フィルタ(HPF)2
4とに印加される。
An original signal is input to the input terminal 20, and the original signal is passed through a low pass filter (LPF) 22 for extracting low frequency components and a high bass filter (HPF) 2 for extracting high frequency components.
4.

LPF22の出力は、IHの遅延線24及び1/2回路
28を介して加算回路30の第1人力に印加され、また
、1/2回路32を介して加算回路30の第2人力に印
加される。HPF24の出力は加算回路30の第3人力
に印加され、加算回路30は第1、第2及び第3人力の
信号を加算して出力端子34に出力する。1/2回路2
8.32は入力信号の振幅を半分にする回路である。従
って、加算回路30は、LPF22からの低域成分につ
いては平均補間を行い、HPF24からの高域成分につ
いては前値補間を行う。
The output of the LPF 22 is applied to the first power of the adder circuit 30 via the IH delay line 24 and the 1/2 circuit 28, and is also applied to the second power of the adder circuit 30 via the 1/2 circuit 32. Ru. The output of the HPF 24 is applied to the third human power of the adding circuit 30, and the adding circuit 30 adds the signals of the first, second, and third human power and outputs the result to the output terminal 34. 1/2 circuit 2
8.32 is a circuit that halves the amplitude of the input signal. Therefore, the adder circuit 30 performs average interpolation for the low frequency component from the LPF 22, and performs previous value interpolation for the high frequency component from the HPF 24.

第2図の信号A1その後に信号Bが原信号として入力端
子20に印加されるとする。第2図の信号Cは信号Aの
低域成分を示し、信号りは信号Bの低域成分を示し、信
号Eは信号Bの高域成分を示す。加算回路30の第1人
力に1/2回路28から信号C(実際にはその1/2の
信号)が入力される時点では、加算回路30の第2人力
には172回路32から信号D(実際にはその1/2の
信号)が入力され、加算回路30の第3人力には信号E
が入力される。この結果、加算回路30は第2図Fに示
す信号を出力する。低域成分については平均補間である
のでフリッカは生じず、また、信号Gとの比較からも分
かるように、解像度は劣化していない。
Assume that after signal A1 in FIG. 2, signal B is applied to the input terminal 20 as an original signal. Signal C in FIG. 2 shows the low frequency component of signal A, signal I shows the low frequency component of signal B, and signal E shows the high frequency component of signal B. At the time when the signal C (actually 1/2 signal) is input from the 1/2 circuit 28 to the first input of the adder circuit 30, the signal D (from the 172 circuit 32) is input to the second input of the adder circuit 30. In reality, 1/2 of that signal) is input, and the third input of the adder circuit 30 receives the signal E.
is input. As a result, the adder circuit 30 outputs the signal shown in FIG. 2F. Since low-frequency components are average interpolated, flicker does not occur, and as can be seen from the comparison with signal G, the resolution has not deteriorated.

この回路では、平均補間のためのIH遅延線に低域成分
のみが印加されるため、この遅延線の帯域は狭くてよい
。従って、例えばこの遅延線にCOD素子を用いる場合
には、COD駆動クロックの周波数が低くてもよくなり
、低消費電力化を図りつる。また、ガラス遅延線を採用
することも容易となる。
In this circuit, only low frequency components are applied to the IH delay line for average interpolation, so the band of this delay line may be narrow. Therefore, for example, when a COD element is used in this delay line, the frequency of the COD driving clock may be low, and power consumption can be reduced. Moreover, it becomes easy to employ a glass delay line.

第3図、第4図及び第5図は、本発明に係る方法を実施
する別の回路例を示す。尚、平均補間のための1/2回
路については図示を省略した。
3, 4 and 5 show further circuit examples implementing the method according to the invention. Note that illustration of the 1/2 circuit for average interpolation is omitted.

第3図は、原信号からその高域成分を減算することによ
り低域成分を取り出すようにした例であり、LPFが不
要になる。入力端子36の原信号はHPF38を介して
加算回路40の第1人力に印加される。減算回路42の
一方の入力には入力端子36の原信号が印加され、他方
の入力にはHPF38の出力が印加される。減算回路4
2の出力は原信号の低域成分であり、それが、加算回路
40の第2人力に印加され、また、IHの遅延線44を
介して加算回路40の第3人力に印加される。結局、加
算回路40の出力は、原信号の高域成分については前値
補間を行い、低域成分については平均補間を行ったもの
に相当する。
FIG. 3 shows an example in which the low frequency component is extracted by subtracting the high frequency component from the original signal, which eliminates the need for an LPF. The original signal at the input terminal 36 is applied to the first input of the adder circuit 40 via the HPF 38. The original signal of the input terminal 36 is applied to one input of the subtraction circuit 42, and the output of the HPF 38 is applied to the other input. Subtraction circuit 4
The output of No. 2 is a low frequency component of the original signal, which is applied to the second input of the adder circuit 40, and is also applied to the third input of the adder circuit 40 via the IH delay line 44. After all, the output of the adder circuit 40 corresponds to the original signal obtained by performing previous value interpolation on the high frequency components and performing average interpolation on the low frequency components.

第4図は、第3図の場合とは逆に、原信号からその低域
成分を減算することで高域成分を取り出す例を示す。こ
の例ではHPFが不要になる。入力端子46の原信号は
、LPF及びIHの遅延線50を介して加算回路52の
第1の人力に印加される。減算回路54の一方の入力に
はLPF48の出力が印加され、他方の入力には入力端
子46の原信号が印加される。減算回路54の出力は原
信号の高域成分になる。加算回路52の第2の入力には
LPF48の出力が印加され、第3人力には減算回路5
4の出力が印加される。加算回路52の第1人力及び第
2人力により、低域成分については平均補間になり、加
算回路52の第3人力により、高域成分については前値
補間になる。
FIG. 4 shows an example in which a high frequency component is extracted by subtracting the low frequency component from the original signal, contrary to the case of FIG. 3. In this example, HPF is not required. The original signal at input terminal 46 is applied to the first input of adder circuit 52 via LPF and IH delay line 50 . The output of the LPF 48 is applied to one input of the subtraction circuit 54, and the original signal of the input terminal 46 is applied to the other input. The output of the subtraction circuit 54 becomes the high frequency component of the original signal. The output of the LPF 48 is applied to the second input of the addition circuit 52, and the subtraction circuit 5 is applied to the third input.
4 outputs are applied. The first and second human inputs of the adding circuit 52 result in average interpolation for low frequency components, and the third human input of the adding circuit 52 results in previous value interpolation for high frequency components.

第5図は更に回路を簡単化し、低域成分又は高域成分を
取り出すための減算回路42.54を不要にした例を示
す。入力端子54の原信号は、LPF56及びIHの遅
延線58を介して加算回路60の一方の入力に印加され
る。加算回路60の他方の入力には、入力端子54の原
信号が印加される。LPF56を経由する低域成分と、
経由しない“信号の低域成分とで平均補間信号が形成さ
れ、LPF56を経由しない信号の高域成分により前値
補間信号が形成される。この例では、平均補間のための
1/2処理が高域成分にも作用するが、視覚的にはあま
り大きな影響は無い。但し、この構成では、第3図及び
第4図では必要でない遅延補償を行わなければならない
FIG. 5 shows an example in which the circuit is further simplified and subtraction circuits 42 and 54 for extracting low-frequency components or high-frequency components are not required. The original signal at the input terminal 54 is applied to one input of the adder circuit 60 via the LPF 56 and the IH delay line 58. The other input of the adder circuit 60 is applied with the original signal of the input terminal 54 . Low-frequency components passing through LPF56,
An average interpolated signal is formed by the low-frequency components of the signal that does not pass through the LPF 56, and a previous value interpolated signal is formed by the high-frequency components of the signal that does not pass through the LPF 56. In this example, 1/2 processing for average interpolation is performed. Although it also affects high-frequency components, it does not have much of a visual impact.However, with this configuration, delay compensation, which is not necessary in FIGS. 3 and 4, must be performed.

第3図の回路では遅延線44として帯域の広いものを用
いなければならないが、第4図及び第5図の回路では、
遅延線50.58の帯域は狭くてもよく、例えばCOD
素子で実現する場合に駆動クロック周波数が低くてよく
なり、従って、低消費電力化を図ることができ、またガ
ラス遅延線を採用することも出来る。
In the circuit of FIG. 3, a delay line 44 with a wide band must be used, but in the circuits of FIGS. 4 and 5,
The band of the delay line 50.58 may be narrow, for example COD
When implemented using a device, the drive clock frequency can be lower, and therefore, power consumption can be reduced, and a glass delay line can also be used.

第7図は本発明の信号補間方法を適用した再生装置の全
体構成ブロック図を示す。第7図において、80は画像
信号が変調記録された記録媒体である磁気ディスクであ
り、当該磁気ディスク80には同心円状のトラックが複
数形成され、1とのトラックには1フイールドの画像信
号が記録されている。磁気ディスク80にはまた、その
回転状態を示すためのPGビン98が埋め込まれている
FIG. 7 shows a block diagram of the overall configuration of a reproducing apparatus to which the signal interpolation method of the present invention is applied. In FIG. 7, 80 is a magnetic disk which is a recording medium on which an image signal is modulated and recorded. A plurality of concentric tracks are formed on the magnetic disk 80, and the image signal of one field is recorded in the track 1 and 2. recorded. A PG bin 98 is also embedded in the magnetic disk 80 to indicate its rotational state.

82はディスク80から画像信号を再生する再生ヘッド
、84はヘッド82の出力を増幅する再生アンプ、88
はアンプ84の出力を復調する復調回路、90は第1図
、第3図乃至第5図にに占めした回路に対応する補間回
路、92は補間回路90の出力又は復調回路88の出力
を選択して出力端子outに出力する切換えスイッチ、
93はPGピン98の位置を検出するための検出ヘッド
、94はヘッド93の出力を増幅するPGアンプ、96
はPGアンプ94の出力を波形整形し、ディスク80の
2周を1周期とするパルスを発生する波形整形回路であ
る。
82 is a playback head that plays back the image signal from the disk 80; 84 is a playback amplifier that amplifies the output of the head 82; 88
90 is an interpolation circuit corresponding to the circuits shown in FIGS. 1, 3 to 5, and 92 selects the output of the interpolation circuit 90 or the output of the demodulation circuit 88. A selector switch that outputs the output to the output terminal OUT,
93 is a detection head for detecting the position of the PG pin 98; 94 is a PG amplifier for amplifying the output of the head 93; 96
is a waveform shaping circuit that shapes the waveform of the output of the PG amplifier 94 and generates a pulse whose period is two revolutions of the disk 80.

第7図に示すようにな再生装置に本発明の信号補間方法
を適用することによって、フリッカを生じず、且つまた
、解像度の劣化を生じない補間信号を形成でき、極めて
高品位の画像を再生出来るようになる。
By applying the signal interpolation method of the present invention to a reproduction device as shown in FIG. 7, it is possible to form an interpolation signal that does not cause flicker or deterioration of resolution, and reproduces extremely high-quality images. become able to do.

上記説明では、アナログ信号について考えてきたが、本
発明はディジタル信号にも適用可能である。その場合、
勿論HPF、LPFとしてディジタル・フィルタを用い
ることになる。また、上記実施例ではフィールド画をフ
レーム画に変換する場合に本発明の方法を用いたが、本
発明はこれに限らず、再生画像信号のドロップアウトに
対しても同様に適用できるものである。
Although analog signals have been considered in the above description, the present invention is also applicable to digital signals. In that case,
Of course, digital filters will be used as the HPF and LPF. Further, in the above embodiment, the method of the present invention is used when converting a field image into a frame image, but the present invention is not limited to this, and can be similarly applied to dropouts in reproduced image signals. .

[発明の効果] 以上の説明から容易に理解出来るように、本発明によれ
ば、フリッカが生じず、且つまた解像度の劣化の生じな
い補間信号を形成できる。
[Effects of the Invention] As can be easily understood from the above description, according to the present invention, it is possible to form an interpolation signal that does not cause flicker and does not cause resolution deterioration.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の方法を実施する第1の回路例、第2図
は第1図の回路の波形図、第3図、第4図及び第5図は
本発明の他の回路例、第6図は平均補間法による従来の
回路例、第7図は本発明を適用した再生装置の構成ブロ
ック図を示す。 12.30,40,52,60:加算回路 20゜36
.46,54:入力端子 42,54:減算回路 第 図
FIG. 1 is a first circuit example implementing the method of the present invention, FIG. 2 is a waveform diagram of the circuit of FIG. 1, and FIGS. 3, 4, and 5 are other circuit examples of the present invention. FIG. 6 shows an example of a conventional circuit using the average interpolation method, and FIG. 7 shows a block diagram of a reproducing apparatus to which the present invention is applied. 12.30, 40, 52, 60: Addition circuit 20°36
.. 46, 54: Input terminal 42, 54: Subtraction circuit diagram

Claims (2)

【特許請求の範囲】[Claims] (1)原信号の帯域に応じて適応的に補間方法を変更す
ることを特徴とする信号補間方法。
(1) A signal interpolation method characterized by adaptively changing the interpolation method according to the band of the original signal.
(2)原信号の低域成分ついて所定遅延時間の遅延線に
より平均補間し、原信号の高域成分について前値補間す
ることを特徴とする信号補間方法。
(2) A signal interpolation method characterized by performing average interpolation on the low frequency components of the original signal using a delay line with a predetermined delay time, and performing previous value interpolation on the high frequency components of the original signal.
JP63320025A 1988-12-19 1988-12-19 Signal interpolation method Pending JPH02164187A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63320025A JPH02164187A (en) 1988-12-19 1988-12-19 Signal interpolation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63320025A JPH02164187A (en) 1988-12-19 1988-12-19 Signal interpolation method

Publications (1)

Publication Number Publication Date
JPH02164187A true JPH02164187A (en) 1990-06-25

Family

ID=18116909

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63320025A Pending JPH02164187A (en) 1988-12-19 1988-12-19 Signal interpolation method

Country Status (1)

Country Link
JP (1) JPH02164187A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011101127A (en) * 2009-11-04 2011-05-19 Canon Inc Video processor and control method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011101127A (en) * 2009-11-04 2011-05-19 Canon Inc Video processor and control method thereof

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