JPH02161761A - Semiconductor device for electric power - Google Patents

Semiconductor device for electric power

Info

Publication number
JPH02161761A
JPH02161761A JP31484588A JP31484588A JPH02161761A JP H02161761 A JPH02161761 A JP H02161761A JP 31484588 A JP31484588 A JP 31484588A JP 31484588 A JP31484588 A JP 31484588A JP H02161761 A JPH02161761 A JP H02161761A
Authority
JP
Japan
Prior art keywords
thickness
bus bar
elements
semiconductor device
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31484588A
Other languages
Japanese (ja)
Inventor
Takuo Itami
卓夫 伊丹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP31484588A priority Critical patent/JPH02161761A/en
Publication of JPH02161761A publication Critical patent/JPH02161761A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To prevent unbalance of current among elements when semiconductor units are connected between bus bars in series, by constructing each of the bus bars so as to have different thicknesses or widths of a specific ratio, the difference of the thicknesses or widths being represented by arithmetic progression. CONSTITUTION:A bus bar 12A to which terminals 5A1, 5B1 and 5C1 are connected has a larger thickness T1 on the lefthand side close to the arrow IN and a smaller thickness T2 on the righthand side, as viewed on the drawing. Ratio of the thickness T1 to the thickness T2 is equal to a ratio of a number of semiconductor elements 1A through 1C connected in series-1:1, and T1=2T2 in this case. The boundary of the section having the thickness T1 and the section having T2 corresponds to the righthand end of a terminal plate 5B2 located at the center, while terminal plates are spaced by an equal distance l. Similarly, a bus bar 12B to which terminal plates 5A2, 5B2 and 5C2 are connected has similar configurations to those of the bus bar 12A while the terminal plates are spaced by the same distance l as those on the bus bar 12A. According to such arrangement, current paths in the elements 1A through 1C have equal resistances and, therefore, unbalance of current among the elements due to voltage drop in the bus bars 12A, 12B can be prevented effectively.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、半導体素子が並列に接続された電力用半導体
装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a power semiconductor device in which semiconductor elements are connected in parallel.

(従来の技術) 従来の電力用半導体装置の一例を示す第4図において、
帯材でつくられた鋼材のバス、<−2A、2Bの対向面
には、鋼板製のL形の端子板5A、、581゜5C1が
バスバー2Aに、同じく端子板5A2.5B2.5C2
がバスバー2Bにそれぞれ対向して等間隔に図示しない
ボルトで取付られ、端子板5A工と5A2,5Bよと5
B2.5C□と502 の対向面間には、例えばサイリ
スタなどの電力用半導体素子(以下、素子という)IA
、 IB、 Icが取付られている。更に、端子板5A
(Prior Art) In FIG. 4 showing an example of a conventional power semiconductor device,
On the opposing faces of the steel buses <-2A and 2B made of strip material, an L-shaped terminal plate 5A, 581° 5C1 made of steel plate is attached to the bus bar 2A, and a terminal plate 5A2.5B2.5C2 is also attached to the bus bar 2A.
are mounted with bolts (not shown) facing the bus bar 2B at equal intervals, and the terminal plates 5A, 5A2, 5B and 5
Between the opposing surfaces of B2.5C□ and 502, there is a power semiconductor element (hereinafter referred to as element) IA such as a thyristor.
, IB, and Ic are installed. Furthermore, the terminal board 5A
.

と5A2,5Bいと5B、、5Cよと5C2の非対向面
には、アルミニウム製の冷却フィン6がそれぞれ取付ら
れ、端子板5八〇と582.端子板5Bよと502間に
取付られた冷却フィン6の間には、絶縁板7が挟まれて
いて全体で一つのユニットに組立てられている。
5A2, 5B and 5B, 5C and 5C2 have cooling fins 6 made of aluminum installed on the non-opposed surfaces of terminal plates 580 and 582. An insulating plate 7 is sandwiched between the cooling fins 6 attached between the terminal plates 5B and 502, and the whole is assembled into one unit.

ところで、このように複数の素子が並列に接続された電
力用半導体装置では、各素子のオン電圧、順方向電圧降
下などの特性が同じであるだけでなく、各素子が接続さ
れた主回路のインピーダンスの差に起因する電流の不平
衡を防ぐことが必要である。そのため、従来は各素子に
抵抗器やアノードリアクトルを直列に接続したり、電流
平衡リアクトルを使っていたが、電力がむだになるだけ
でなく、接続バスバーや取付場所が増えて複雑かつ大形
となる。
By the way, in a power semiconductor device in which multiple elements are connected in parallel, not only do the characteristics such as on-voltage and forward voltage drop of each element be the same, but also the characteristics of the main circuit to which each element is connected are the same. It is necessary to prevent current imbalance due to impedance differences. Conventionally, resistors and anode reactors were connected in series with each element, or current balancing reactors were used, but this not only wastes power, but also increases the number of connection bus bars and mounting locations, making it complicated and large. Become.

(発明が解決しようとする課題) そこで、各素子間を接続するバスバーの長さと抵抗値を
等しくシ、各素子の特性も等しいものを使う方法も考え
られるが、それでも両側の素子に比べて内側の素子に流
れる電流は少なくなる。
(Problem to be solved by the invention) Therefore, a method of using bus bars that connect each element with the same length and resistance value and with the same characteristics of each element can be considered, but even then, the inner The current flowing through the element decreases.

すなわち、第4図の接続図を示す第5図において、今、
各素子に流れる電流iを等しいと仮定したとき、各素子
のAF間の電流路に生じる電圧降下は、 素子IAでは・・・・・・VrA=Vr+3r−i+ 
r’・j・・・・・・(1)素子IBでは・・・・・・
VFB=VF+4r−i+ r’・i・・・・・・■素
子ICでは一’%c”VF+3r−i+r ’ ・i 
−・・(3)但し、VF=各素子の順方向電圧降下 r:接続端子間のバスバーの抵抗 r′:接続端子自身の抵抗 となり、素子IBの電流路の電圧降下(VFB)が他よ
りも大きく必要となる。
That is, in FIG. 5 showing the connection diagram of FIG. 4, now,
Assuming that the current i flowing through each element is equal, the voltage drop occurring in the current path between AF of each element is as follows: In element IA...VrA=Vr+3r-i+
r'・j... (1) In element IB...
VFB=VF+4r-i+r'・i...■For element IC, 1'%c''VF+3r-i+r'・i
-...(3) However, VF = Forward voltage drop of each element r: Resistance of the bus bar between the connecting terminals r': The resistance of the connecting terminal itself, and the voltage drop (VFB) of the current path of element IB is higher than the other is also greatly needed.

注;実際には各素子のvrが等しく選定されるので、素
子IBの電流が少なくアンバランスとなる。
Note: Actually, since vr of each element is selected to be equal, the current of element IB is small and unbalanced.

そこで本発明の目的は、電流バランスが良く小形で効率
のよい電力用半導体装置を得ることである。
SUMMARY OF THE INVENTION Therefore, an object of the present invention is to obtain a small, efficient power semiconductor device with good current balance.

〔発明の構成〕[Structure of the invention]

(課題を解決するための手段および作用)本発明は、同
じ定格の半導体素子が一対の長方形断面のバスバー間に
等間隔に少なくとも3個以上並列接続された半導体ユニ
ットで構成された電力用半導体装置において、各バスバ
ーの外部と接続される側と他側との幅又は厚さの比を、
並列接続された半導体素子の数−1:1とし、その間の
幅又は厚さを等差数列の差とすることで、各半導体素子
に流れる電流を等しくし、効率がよく、小形化された電
力用半導体装置である。
(Means and Effects for Solving the Problems) The present invention provides a power semiconductor device comprising a semiconductor unit in which at least three semiconductor elements of the same rating are connected in parallel at equal intervals between a pair of rectangular cross-section bus bars. , the width or thickness ratio between the side connected to the outside and the other side of each bus bar is
By setting the number of semiconductor elements connected in parallel to -1:1 and making the width or thickness between them the difference in an arithmetic progression, the current flowing through each semiconductor element is made equal, resulting in efficient and compact power. It is a semiconductor device for

(実施例) 以下、本発明の電力用半導体装置の一実施例を図面を参
照して説明する。但し、第4図、第5図と重複する部分
は省く。
(Example) An example of the power semiconductor device of the present invention will be described below with reference to the drawings. However, parts that overlap with Figures 4 and 5 are omitted.

第1図において、端子5A工、 5Bよ、 5C工が接
続された側のバスバー12Aの厚さは、左端の図示ない
し外部バスバーに接続される(矢印IN)側が厚く、右
端が薄くなっていて、左側の厚さT1と右端の厚さT、
との比は、Ti=27.となっている。そして、その境
界は中央の端子板5B1の右端と一致しており、各端子
板の取付間隔Qは等しくなっている。
In Fig. 1, the thickness of the bus bar 12A on the side to which terminals 5A, 5B, and 5C are connected is thicker on the left end (not shown) or on the side connected to the external bus bar (arrow IN) and thinner on the right end. , the left side thickness T1 and the right end thickness T,
The ratio is Ti=27. It becomes. The boundary coincides with the right end of the central terminal plate 5B1, and the mounting intervals Q of the terminal plates are equal.

同じく、端子板5A2.5B、 、 5C2が接続され
るバスバー12Bも、バスバー12Aと同形で左半分の
厚さT2は右半分と右端の接続部の厚さT工の2分の1
で、各端子板はバスバー12A側と同じ間隔Qで接続さ
れている。
Similarly, the bus bar 12B to which the terminal boards 5A2.5B, , 5C2 are connected has the same shape as the bus bar 12A, and the thickness T2 of the left half is half the thickness T of the right half and the right end connection part.
Each terminal board is connected at the same interval Q as the bus bar 12A side.

この結果、バスバー12A側ではAB間の抵抗値はBC
間の2分の1となり、バスバー12B側でもEF間の抵
抗値はDE間の2分の1となるので、各素子の電流路の
抵抗を等しくすることができ、バスバーの電圧降下によ
る素子の電流不平衡を防ぐことができる。
As a result, on the bus bar 12A side, the resistance value between AB is BC
On the bus bar 12B side, the resistance value between EF and DE is one half of that between DE, so the resistance of the current path of each element can be made equal, and the resistance of the elements due to the voltage drop of the bus bar can be made equal. Current imbalance can be prevented.

すなわち、第1図のように構成した電力用半導体装置の
接続図を示す第2図において、各素子に等しく電流1が
流れるとして各素子のAF間の電流路間で生じる電圧降
下(VF。)は、素子」Aでは・・・・・・VFA=V
F+4r□・i+r’・i・・・・・・(へ)素子IB
では・・・・・・VFn=VF+4r□・i十r’・i
・・・・・・■素子ICでも一%rc=t/F+4r、
 ・i+ r ’ ・i −(69但し、r□:接続端
子間のバスバーの最小抵抗となる。
That is, in FIG. 2 showing the connection diagram of the power semiconductor device configured as shown in FIG. 1, if an equal current 1 flows through each element, the voltage drop (VF) that occurs between the current paths between the AFs of each element is is element A...VFA=V
F+4r□・i+r'・i・・・・・・(to) Element IB
So...VFn=VF+4r□・i+r'・i
・・・・・・■ Even in element IC, 1%rc=t/F+4r,
・i+r′ ・i−(69 However, r□: is the minimum resistance of the bus bar between the connection terminals.

そして、この結果、各素子に対する抵抗器、アノードリ
アクトルや電流平衡リアクトルの接続やそのための場所
も要らなくなり、効率がよく小形・軽量で各素子の電流
不平衡を防ぐことのできる電力用半導体装置となる。
As a result, there is no need to connect resistors, anode reactors, or current balancing reactors to each element, and there is no need for space for them, resulting in a power semiconductor device that is highly efficient, compact, lightweight, and capable of preventing current imbalance between each element. Become.

なお、上記実施例では、バスバー12A、 1211の
左右の断面積を厚さ方向で変えたが、幅方向で変えても
よく、このときは端子Fi5A1 などの幅の広いとき
に適する利点がある。
In the above embodiment, the left and right cross-sectional areas of the bus bars 12A and 1211 are changed in the thickness direction, but they may also be changed in the width direction, which has the advantage of being suitable for wide terminals such as the terminal Fi5A1.

又、素子の数が4個以上のときでも上記実施例と同様に
外部との接続端からの抵抗値を、rl : r2 :・
・・・ : r(n−2) : r(n−1)=1:2
:・・・: (n−2) : (n−1)と等差数列の
差に順に選定することで、各素子の電流の不平衡を防ぎ
、効率がよく小形軽量の電力用半導体装置を得ることが
できる。
Also, even when the number of elements is 4 or more, the resistance value from the connection end with the outside is defined as rl : r2 : · as in the above embodiment.
...: r(n-2): r(n-1)=1:2
:...: (n-2) : By selecting in order the difference between (n-1) and the arithmetic progression, unbalanced currents in each element can be prevented and efficient, compact and lightweight power semiconductor devices can be created. Obtainable.

なお、上記実施例で一対のバスバーの幅又は厚さは段階
的に狭くしたが、第3図のように台形にして連続的に狭
くしたバスバー24A、 24Bにしてもよく、これを
幅方向にしたときはせん断機で加工できるので、製作が
容易となる利点がある。
In the above embodiment, the width or thickness of the pair of busbars is narrowed stepwise, but the busbars 24A and 24B may be made trapezoidal and continuously narrowed as shown in FIG. When this happens, it can be processed using a shearing machine, which has the advantage of making it easier to manufacture.

〔発明の効果〕〔Effect of the invention〕

以上、本発明によれば、同一定格の半導体素子が少なく
とも3個以上一対の長方形断面のバスバー間に等間隔に
並列接続された半導体ユニットで構成した電力用半導体
装置において、各バスバーの外部と接続される側と他端
との幅又は厚さの比を、並列接続された半導体素子の数
−1:1とし。
As described above, according to the present invention, in a power semiconductor device configured with a semiconductor unit in which at least three or more semiconductor elements of the same rating are connected in parallel at equal intervals between a pair of rectangular cross-section bus bars, each bus bar is connected to the outside. The width or thickness ratio between the exposed side and the other end is set to be the number of semiconductor elements connected in parallel - 1:1.

その間の幅又は厚さの差を等差数列の差として、各半導
体素子を流れる電流を等しくしたので、小形で効率のよ
い電力用半導体装置を得ることができる。
Since the difference in width or thickness between them is treated as a difference in arithmetic progression, the current flowing through each semiconductor element is made equal, so that a small and efficient power semiconductor device can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の電力用半導体装置の一実施例を示す図
、第2図は第1図の接続図、第3図は本発明の電力用半
導体装置の他の実施例を示す図、第4図は従来の電力用
半導体装置を示す図、第5図は第4図の接続図である。 IA、IB、]、C・・・電力用半導体素子5A1.5
A、 、 5B1.5B2.5C工、5C2・・・端子
板12A、12B・・・バスバー (8733)  代理人 弁理士 猪 股 祥 晃(ば
か1名)第1図 第8図 第2図
FIG. 1 is a diagram showing one embodiment of the power semiconductor device of the present invention, FIG. 2 is a connection diagram of FIG. 1, and FIG. 3 is a diagram showing another embodiment of the power semiconductor device of the present invention. FIG. 4 is a diagram showing a conventional power semiconductor device, and FIG. 5 is a connection diagram of FIG. 4. IA, IB, ], C...Power semiconductor element 5A1.5
A, , 5B1.5B2.5C engineering, 5C2...Terminal board 12A, 12B...Bus bar (8733) Agent Patent attorney Yoshiaki Inomata (1 idiot) Figure 1 Figure 8 Figure 2

Claims (1)

【特許請求の範囲】 同一定格の半導体素子が一対の断面長方形のバスバー間
に少なくとも3個以上等間隔に並列接続されたユニット
で構成された電力用半導体装置において、 前記バスバーの外部と接続される側と他側との幅又は厚
さの比を、前記半導体素子の総数−1:1とし、その間
の前記素子接続部の前記幅又は厚さの差を等差数列の差
としたことを特徴とする電力用半導体装置。
[Scope of Claims] A power semiconductor device constituted by a unit in which at least three semiconductor elements of the same rating are connected in parallel at equal intervals between a pair of bus bars having a rectangular cross section, the power semiconductor device being connected to the outside of the bus bar. The width or thickness ratio between one side and the other side is set to the total number of the semiconductor elements - 1:1, and the difference in the width or thickness of the element connection part between them is set as the difference in an arithmetic progression. Power semiconductor devices.
JP31484588A 1988-12-15 1988-12-15 Semiconductor device for electric power Pending JPH02161761A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31484588A JPH02161761A (en) 1988-12-15 1988-12-15 Semiconductor device for electric power

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31484588A JPH02161761A (en) 1988-12-15 1988-12-15 Semiconductor device for electric power

Publications (1)

Publication Number Publication Date
JPH02161761A true JPH02161761A (en) 1990-06-21

Family

ID=18058298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31484588A Pending JPH02161761A (en) 1988-12-15 1988-12-15 Semiconductor device for electric power

Country Status (1)

Country Link
JP (1) JPH02161761A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008301684A (en) * 2007-06-04 2008-12-11 Toyota Motor Corp Electrical equipment and manufacturing method thereof
JP2014064127A (en) * 2012-09-20 2014-04-10 Auto Network Gijutsu Kenkyusho:Kk Current detection circuit and power supply control device
CN110654325A (en) * 2018-06-29 2020-01-07 株式会社自动网络技术研究所 Circuit structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008301684A (en) * 2007-06-04 2008-12-11 Toyota Motor Corp Electrical equipment and manufacturing method thereof
JP2014064127A (en) * 2012-09-20 2014-04-10 Auto Network Gijutsu Kenkyusho:Kk Current detection circuit and power supply control device
CN110654325A (en) * 2018-06-29 2020-01-07 株式会社自动网络技术研究所 Circuit structure
JP2020004915A (en) * 2018-06-29 2020-01-09 株式会社オートネットワーク技術研究所 Circuit structure

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