JPH02153485A - Microcomputer - Google Patents

Abstract

PURPOSE:To contrive the improvement of the processing speed of a program by generating an interruption request signal only when plural input signals satisfy a condition which is set in advance. CONSTITUTION:The value of a result of comparison of analog input signals IN1 - INN which are latched in a latch circuit 2, and a value which is set in advance in a register circuit 3 are compared by a comparator 4, and only when a condition that these values coincide with each other is satisfied, an interruption request signal IRQ is generated. Accordingly, only when the analog input signals IN1 - INN satisfy a prescribed condition, the interruption request signal IRQ is generated. In such a manner, comparing with the case in which the interruption request signal is generated, whenever the analog input signals IN1 - INN are compared and latched as before, the processing speed of a program can be increased remarkably.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microcomputer, and more particularly to a microcomputer that receives an analog signal and generates an interrupt request signal.

[Conventional technology]

Conventionally, this type of microcomputer receives a plurality of analog input signals IN, as shown in FIG.

A comparator circuit 1 comprising a plurality of comparators 11 to IN that compares ~INN with reference voltages VRI to VRN, respectively, a latch circuit 2 that latches the comparison results of this comparator circuit 1, and analog input signals IN and ~INN are compared. , and a timing control circuit 6B that generates an interrupt request signal IRQ to the interrupt control circuit 5 every time it is latched.

[Problem to be solved by the invention]

The conventional microcomputer described above is configured to generate an interrupt request signal IRQ every time the analog input signals IN, -INN are compared and latched.

Even when there is no change in , or for analog input signals IN and ~INN that do not require interrupt processing, an interrupt is generated every time they are compared or latched, which has the disadvantage that the processing speed of the entire program decreases. there were.

An object of the present invention is to provide a microcomputer that can improve program processing speed.

[Means to solve the problem]

The microcomputer of the present invention includes a comparator circuit including a plurality of comparators that compare a plurality of input signals with predetermined reference values, a latch circuit that latches the comparison results of the comparator circuit, and a and a comparison circuit that generates an interrupt request signal when the comparison result satisfies a preset condition.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a first embodiment of the present invention.

This embodiment uses a plurality of analog input signals IN.

A comparator circuit 1 includes a plurality of comparators 11 to IN that compare ~INN with reference voltages VRI to VRN, respectively, a latch circuit 2 that latches the comparison results of the comparator circuit 1, and a specific value is set in advance. A comparison circuit that generates an interrupt request signal IRQ to the interrupt control circuit 5 when the value set in the register circuit 3 and the value of the comparison result latched in the latch circuit 2 match. The configuration includes a circuit 4 and a timing control circuit 6 that controls the comparison of analog input signals INI to INN of the comparator circuit 1 and the latch timing of the latch circuit 2.

In this embodiment, the value of the comparison result of the analog input signals IN, ~INN latched in the latch circuit 2,
A comparison circuit 4 compares a value set in advance in the register circuit 3, and generates an interrupt request signal IRQ only when the condition that these values match is satisfied.

Therefore, the interrupt request signal IRQ is generated only when the analog input signals IN1 to IN satisfy a predetermined condition. Compared to the case where this occurs, the processing speed of the program can be significantly increased.

FIG. 2 is a circuit diagram showing a second embodiment of the present invention.

The comparators 11 and 12 of the comparator circuit IA each output a comparison result of a value 1111+ when the analog input signals INl and IN2 are larger than the corresponding reference voltages VR1, V, and □, and a value of "0°" when they are smaller.

The latch circuit 2A latches this comparison result.

Comparison circuit 4A includes inverters If, I2 and AND gates G1. G2, and when the comparison result latched in the latch circuit 2A is "10", the first interrupt request signal I R
Q 1 is generated, and when the comparison result is "01'°, the second interrupt request signal IRQ2 is generated and the comparison result is 00'", 1
1", no interrupt request signal is generated.

That is, in this embodiment, the first interrupt request signal IR is output only when the analog input signal Nl is greater than the reference voltage VR1 and the analog input signal IN2 is less than or equal to the reference voltage VR2.
Q, and the analog input signal IN2 is the reference voltage ■R
Analog input signal IN greater than 2 is reference voltage ■81
The second interrupt request signal IRQ2 is generated only when the following conditions are met.

In the first embodiment, the comparison conditions are set by the register circuit 3, but as in the second embodiment, the comparison conditions can also be set by the circuit configuration of the comparison circuit 4A.

〔Effect of the invention〕

As explained above, the present invention is configured to generate an interrupt request signal only when a plurality of input signals satisfy preset conditions. Since the request signal can be generated,
Compare as usual.

Compared to the case where an interrupt request signal is generated every time it is latched,
This has the effect of significantly increasing the processing speed of the program.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a first embodiment of the present invention;
The figure is a circuit diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing an example of a conventional microcomputer. 1, LA... Comparator circuit, 11~IN... Comparator, 2, 2A... Latch circuit, 3... Register circuit, 4, 4A... Comparison circuit, 5, 5A... Interrupt Control circuit, 6.6A, 6B...timing control circuit.

Claims (1)

[Claims] A comparator circuit including a plurality of comparators that compare each of the plurality of input signals with a predetermined reference value, a latch circuit that latches the comparison results of the comparator circuit, and a preset comparison result latched in the latch circuit. A microcomputer comprising: a comparison circuit that generates an interrupt request signal when a condition is satisfied.