JPH0214402A - Recording and reproducing circuit - Google Patents

Abstract

PURPOSE:To reduce the influence of a noise in a rotary transformer part and the influence of a signal loss and to eliminate the necessity of the characteristic management of a matching, etc., by providing a head amplifier at a rotary drum side, directly connecting it to a head and connecting it through a rotary transformer to a recording/reproducing circuit. CONSTITUTION:A head amplifier 11 is provided at a rotary drum side 21, rotary heads 13a and 13b are directly connected to the head amplifier 11, and the transmission and reception of a signal between the head amplifier 11 and an external circuit are executed through rotary transformers 12a and 12b. Thus, the noise loaded between the rotary transformers 12a and 12b and the head amplifier 11 can be prevented, simultaneously, the necessity to execute the matching the rotary heads 13a and 13b, rotary transformers 12a and 12b and the head amplifier 11 is eliminated, further, the loss at the time of reproducing and recording by the rotary transformers 12a and 12b can be prevented, and simultaneously, the necessity to manage the characteristic between channels can be eliminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a recording and reproducing circuit that performs recording and reproducing on a magnetic recording medium using a rotary head.

[Prior Art and Problems to be Solved] Conventional 1 A recording and reproducing circuit for recording and reproducing signals using a rotary head, such as a video tape recorder, is a low retransformer la as shown in FIG.

Signals are exchanged between the rotary heads 2a, 2b and the head amplifier 3 using the lb.

That is, during playback, the minute playback signals from the rotary heads 2a, 2b are input to the head amplifier 3 via the rotary transformers La, 1b and amplified, and during recording, the recording signals are input to the head amplifier 3 by the head amplifier 3. After amplification, rotate to the rad 2 a, via the lo retrans la, 1 b
2b. In this case, the rotating head 2
a, 2b are attached to the circumferential surface of a rotating drum (not shown) and rotated at a constant speed. The operation of the head amplifier 3 is controlled by a head switching signal HSW sent from a servo circuit (not shown) and a REC/PB (record/playback) switching signal sent from a CPU (also not shown). The head amplifier 3 is supplied with a Vcc voltage and a ground potential GND as operating power supplies.

When the rotary transformers la, lb are interposed between the rotating heads 'l a, 'l b and the head amplifier 3 as described above, during playback, the signals input to the rotary transformers la, l b are input to the rotary transformers la, l b. Since the signal level is very low, noise is easily picked up in the path from the rotary heads 2a, 2b to the head amplifier 3 via the low retransformers 1a, 1b. In addition, the rotating head 2 a,
2 b inductance, rotary transformer l a,
l b combined inductance, coupling coefficient.

It is necessary to match the input capacitance of the head amplifier 3. Further, there is a problem in that it is necessary to manage the transmission frequency characteristics of the rotary transformers 1a and 1b, signal loss, and the bearing between the channels of the rotary transformers 1a+tb both during reproduction and during recording.

The present invention has been made in view of the above-mentioned circumstances, and it is possible to prevent noise between the rotary transformer and the head amplifier, and there is no need to match the rotary head, rotary transformer, and head amplifier. It is an object of the present invention to provide a recording/reproducing circuit which can prevent losses during reproduction/recording due to the above and eliminates the need to manage characteristics between channels.

[Means and effects for solving the problem] The present invention provides a head amplifier on the rotating drum side, connects the rotating head directly to the head amplifier, and transmits and receives signals between the head amplifier and an external circuit. This is done via a rotary transformer.

Further, the present invention restores the head switching signal by shaping the waveform of the head switching signal sent via the rotary transformer, and also controls the recording amplification means and reproduction amplification means in the head amplifier according to the operation mode. The configuration is such that switching is controlled by

By providing the head amplifier on the rotating drum side and intervening between the head and the low retransformer as described above, during playback, the playback signal is amplified by the head amplifier and input to the low retransformer. Therefore, the level of the signal input to the rotary transformer increases, making it less susceptible to noise and eliminating the need to pay much attention to matching of the transmission system.

In addition, by providing a means for waveform shaping the head switching signal sent via the rotary transformer, the original signal waveform can be restored without providing a DC transmission circuit for the head switching signal, simplifying the configuration of the transmission system. can do.

[Embodiment of the Invention] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. First, the basic configuration of the present invention will be explained with reference to FIG. In FIG. 1, reference numeral 11 denotes a head amplifier, which is mounted on the rotating drum side as will be described in detail later, and is supplied with a Vcc voltage and a ground potential GND through sliding terminals a and b. In this case, the Vcc voltage is a different voltage in the recording mode and in the reproduction mode, for example, in the recording mode, a voltage of 10v1 is applied, and in the reproduction mode, a voltage of 5V is applied. In addition, the head amplifier 11 has terminals e and f connected to an external recording/reproducing amplification circuit (not shown) via a rotary transformer 12a (first channel ch-1) to send and receive recording/reproducing signals. , and a CPU (not shown) is connected to terminals c and d via a rotary transformer 12b (second channel Ch-2).
The head switching signal H8W is then applied. Further, the head amplifier 11 is connected to the rotary head 13a from the terminals g and h via capacitors C1 and C2, and is connected to the rotary head 13a through the terminal i.
, j and the rotary head 13 via recacitors CI and C2.
connected to b.

The head amplifier 11 is mounted on a rotating drum 21 as shown in FIG. The rotating drum 21 has a rotating shaft 22 rotatably held by a fixed drum 23, and is rotationally driven at a constant speed by a motor (not shown) provided in the fixed drum 23. Rotary heads 13a (13b) are mounted on the circumferential surface of the rotary drum 21 at an interval of 180 degrees, and a head amplifier board 24 is mounted on the upper part of the rotary drum 21. is configured. Further, a Vcc terminal plate 26 is attached to the upper end of the rotating shaft 22 with an insulating member 25 interposed therebetween, and a lead wire 27 is connected between the Vcc terminal plate 26 and the power line of the head amplifier 11. A sliding terminal 28 is pressed into contact with the center of the Vcc terminal plate 26, and Vcc power is supplied from this sliding terminal 28.

Further, the rotary shaft 22 has its lower end connected to the fixed drum 23.
A sliding terminal 29 is led out to the lower side, and a sliding terminal 29 is pressed into contact with the center of the tip, and a ground potential GND is applied through this sliding terminal 29. Further, the rotary transformer 12a is provided on the opposing surface of the rotating drum 21 and the fixed drum 23.

12b, a rotor is provided on the lower surface of the rotating drum 21, and a stator is provided on the upper surface of the fixed drum 23.

Next, the configuration of the head amplifier 11 will be explained with reference to FIG. A head switching signal H3W applied from the CPU (not shown) to the terminals c and d via the rotary transformer 12b is input to the waveform shaping circuit 32 via the window comparator 31, where the waveform is shaped and sent to the logic controller 33. .

Further, this logic controller 33 is given an R/P switching signal from an R/P (recording/reproduction) switching circuit 34 . The R/P switching circuit 34 detects the voltage level of the Vcc voltage applied via terminal a and generates an R/P switching signal. Based on the signals from the waveform shaping circuit 32 and the R/P switching circuit 34, the logic controller 33 generates channel switching signals AP and BP during playback and channel switching signals AR and BR during recording.

On the other hand, the recording signal applied to terminals e and f via the rotary transformer 12a is transmitted to the recording amplifier circuit 35 of channel A.
a and channel B recording amplifier circuit 35b. The recording amplifier circuit 35a includes a logic controller 33.
Turns on/off by channel switching signal AR given from
It is controlled to be off, and its output signal is sent from terminals g and h to the rotary head L3a via capacitors C1 and C2. Further, the recording amplification circuit 35b includes a logic controller 33
Turns on/off by channel switching signal BR given from
It is controlled to be off, and its output signal is sent from terminals i and j to the rotary pad 13b via capacitors C3 and C4.

Further, the signal reproduced by the rotary head 13a is inputted to the reproduction amplification circuit 36a of channel A from terminals g and h, and the signal reproduced by the rotary head 13b is inputted to the reproduction amplification circuit 36a of channel A from terminals g and h.
+J to the regenerative amplifier circuit 38b of channel B. The regenerative amplification circuit 36a.

36b is alternately controlled on/off by channel switching signals AP and BP from the logic controller 33, and its output signal is sent to the switching circuit 37.

This switching circuit 37 is controlled by channel switching signals AP and BP given from the logic controller 33, and alternately selects the output signals of the regenerative amplifier circuits 38a and 36b to record/record from the terminals e and f via the rotary transformer 12a. Output to a reproduction circuit (not shown).

Further, details of the head amplifier 11 will be explained with reference to FIGS. 4 and 5. First, as shown in FIG. 4, the reproduction amplification circuits 38a, 36b and the recording amplification circuit 35a.

35b will be explained in detail. The regenerative amplifier circuit Ha is
It is mainly composed of an NPN type transistor Ql-Q13, and is supplied with a Vcc voltage and a ground potential GND as an operating power supply, and a logic controller 3.
A channel switching signal AP sent from the transistor Q13 is input to the base of the transistor Q13. Above transistor Q
1 and Q2 constitute a differential amplifier circuit, to the base of which a reproduced signal from the rotary head 13a is inputted via terminals g and h.

Further, the transistor Q7. QB is a transistor Q
61. Q62 constitutes the active load differential amplifier circuit 40, and transistors Q7. The collector of Q81 is connected to terminal e, and the transistor Q8. The collector of Q82 is connected to terminal f. The above transistor QB1.6
2 is a transistor Q7.2 when the rotary head 13a reproduces channel A. It operates as an active load of the differential amplifier circuit consisting of Q8. The regenerative amplifier circuit 36a is turned on when the channel switching signal AP is at L level (low level), and turned off when it is at H level (high level). That is, when the channel switching signal AP goes to L level, the transistor Q13 is turned off, its collector potential rises, and the transistors QIO and Q12 are turned on.

As a result, the bias circuit transistors Q3, Q5. Q
6. Q9. A base current is supplied to Qll to turn the circuit on, and the reproduced signal by the rotary head 13a is amplified. Further, when the channel switching signal AP becomes H level, the transistor Q13 is turned on, its collector potential is lowered, and both the transistors QIO and Q12 are turned off.

Therefore, transistor Q3. Q5. QB, Q9. Qll
No base current is supplied to the circuit, the circuit is turned off, and no amplification operation is performed.

The regenerative amplifier circuit 36b is mainly composed of PNP type transistors 015 to Q27, and is supplied with the Vee voltage and the ground potential GND as operating power supplies, and receives a channel switching signal BP sent from the logic controller 33. is applied to the base of transistor Q27. The transistor Q15.01B constitutes a differential amplifier circuit, and a reproduced signal from the rotary head 13b is input to its base via terminals i and j. Further, the transistor Q21. Q22 is a transistor Q
61. The active load differential amplifier circuit 40 is configured together with the transistors Q62, and the transistors Q21. The collector of QBI is connected to terminal e, and transistors Q22. The collector of Q82 is connected to terminal f. The above transistor Q6
1.62 indicates that transistor Q21. It operates as an active load of the differential amplifier circuit consisting of Q22. Similarly to the regenerative amplifying circuit 36a, the regenerative amplifying circuit 3Bb is turned on when the channel switching signal BP is at the L level, and is turned off when the channel switching signal BP is at the H level.

On the other hand, the recording amplifier circuit 35a includes a PNP transistor Q
37.03g and NPN type transistor 039~04g
The Vcc voltage and the ground potential GND are applied as operating power supplies, and the transistor Q4
A channel switching signal AR is applied from the logic controller 33 to the base of the signal B. The above transistor Q37~
Q40 constitutes a differential amplifier circuit, and transistors 039. A recording signal sent from the recording/reproducing circuit via the rotary transformer 12g and terminals e and f is input to the base of Q40, and a signal taken out from the collector is sent to the rotary head 13a via terminals g and h. .

The recording amplifier circuit 35a is turned on when the channel switching signal AR is at L level, and turned off when it is at H level. That is, when the channel switching signal AR goes to L level,
Transistor Q4g is turned off, its collector potential rises, and transistors Q45 and Q47 are turned on. As a result, transistor Q41 of the bias circuit. Q43.
Q44. A base current is supplied to Q46 to turn on the circuit, and the reproduced signal by the rotary head 11a is amplified. Furthermore, when the channel switching signal AR goes to H level, the transistor 048 is turned on and its collector potential decreases, causing the transistor Q45. Q47 both turn off. Therefore, transistor Q41. Q43. Q44
．． No base current is supplied to Q4B, the circuit is turned off, and no amplification operation is performed.

The recording amplifier circuit 35b also includes a PNP transistor Q.
49.050 and NPN type transistors Q51 to Q80
The Vec voltage and the ground potential GND are applied as operating power supplies, and the transistor Q8
A channel switching signal BR is applied from the logic controller 33 to the base of 0. The above transistor Q49~
Q52 constitutes a differential amplifier circuit, and a recording signal sent from the recording/reproducing circuit via the rotary transformer 12a and terminals e and f is inputted to the base of the transistor Q51.52 and taken out from the collector. The signal from terminal i
, j to the rotary head 13b.

The recording amplifier circuit 85b configured as described above is turned on when the channel switching signal BR is at the L level, and turned off when the channel switching signal BR is at the H level. That is, when channel switching signal BR goes to L level, transistor Q60 is turned off, its collector potential rises, and transistors Q57 . Q59
turns on. As a result, transistor Q53 of the bias circuit. Q55.05B.

A base current is supplied to Q511 to turn the circuit on, and the reproduced signal by the rotary head 13b is amplified. Further, when the channel switching signal BR becomes H level, the transistor 080 is turned on, and its collector potential decreases, causing the transistor Q57. Q59 both turn off. Therefore, transistor Q53. Q55゜Q 5B, Q
No base current is supplied to 58, the circuit is in an off state, and no amplification operation is performed.

Next, the window comparator 31. Waveform shaping circuit 32° logic controller 33. Details of the R/P switching circuit 34 will be explained with reference to FIG. Window comparator 3
1 is mainly composed of NPN transistors QB3 to Q74, and uses Vcc voltage and ground potential G as operating power supplies.
ND is given. The above transistor Q 69. Q
70, the first comparator 311, the transistor Q
72. Q73 constitutes the second comparator 312, and the head switching signal HSW sent from the CPU via the rotary transformer 12b is sent from the terminal C to the transistor Q89. Given to the base of Q72. In addition, the transistor 070. A predetermined bias is applied to the base of Q73 by a bias circuit 313 consisting of transistors QB3 to Q[i8. And transistor Q
89. A signal taken out from the collector of Q73 is sent to the waveform shaping circuit 32.

The waveform shaping circuit 32 includes a PNP transistor Q92.
．． It is composed of a constant current circuit 321 consisting of Q93 and an RS flip-flop 322 consisting of NPN transistors Q94 to Q97. And flip flop 3
The Q and ζ outputs of 22 are sent to the logic controller 33 as output signals of the waveform shaping circuit 32.

This logic controller 33 includes a current mirror circuit 331. A constant current circuit 332 is made up of PNP type transistors Q84 to Q91, and a logic switching circuit 333 is made up of NPN type transistors Q98 to Q109. The above current mirror circuit 33
1 controls the operation of the constant current circuit 332, and a constant current is supplied to the logic switching circuit 333 via this constant current circuit 332. This logic switching circuit 333 includes transistors Q9g and Q99゜Q101 and Q102,
Q 104 and Q 105, Q 107 and Q 10
8 constitute a NOR circuit, and the signal taken out from the collector constitutes an inverter.
It is input to the base of 0, Q103, QloG, and Q109. And transistor Q100°Q1
The collector output of 03 is the channel switching signal AP during playback.
, BP, and the transistors QIOB, Q
The collector output of 109 is the channel switching signal A during recording.
It is taken out as R and BR. Furthermore, signals from the waveform shaping circuit 32 and the R/P switching circuit 34 are input to each of the NOR circuits. That is, transistor Q98. Q1
The Q side output of the flip-flop 322 is input from the waveform shaping circuit 32 to the base of the transistor QIOI.
, QIO), the Φ side output of the flip-flop 322 is input. And transistor Q99. Q
Base of 102 and transistor Q105, 010g
The R/P switching signal from the R/P switching circuit 34 is input to the base of the R/P switching circuit 34.

The R/P switching circuit 34 includes an NPN transistor Q7.
5 to Q79, and are supplied with the Vcc voltage and the ground potential GND as operating power supplies. Transistor Q 77,
Q78 constitutes a differential amplifier circuit 342, and a transistor Q75.07B is connected to the base of transistor Q77.
A constant voltage of, for example, 1.5V is applied from a bias circuit 341 consisting of. This bias circuit 341 includes transistors Q75. 076 acts as a diode, V
Always 1.5V whether the cc voltage is IOV or 5V
is applied to the base of transistor Q75. Further, the base of the transistor 078 is grounded via a resistor R and connected to the Vcc power supply line via a resistor 4R.

That is, the values of the resistors R and 4R are set to 1;4, and when a VCC voltage of 10V is supplied during recording, the base voltage of the transistor 078 is 2■, and when a VCC voltage of 5V is supplied during playback.
When the voltage c is supplied, the base voltage of the transistor Q78 becomes 1V. This transistor Q
By the base voltage of 78, transistor Q77,
Q78 is controlled to be on/off, and its collector output voltage is sent to the logic switching circuit 333. That is, the collector output of transistor Q77 is connected to transistor Q99 . It is input to the base of transistor Q102, and the collector output of transistor 078 is input to the bases of transistors Q105 and Q108.

Next, the overall operation of the above embodiment will be explained with reference to the timing chart of FIG. When the head switching signal H5W shown in FIG. 6(a) is sent from the CPU to the rotary transformer 12b, the DC component of the signal taken out from the terminal C on the stator side is removed as shown in FIG. 6(b). As a result, the rising and falling portions become differentiated waveforms. When a positive pulse signal is output to terminal C, transistor Q69. Q72 is on, transistor Q70. Q73 is turned off, and a pulse signal as shown in FIG. 6(C) is output to the second comparator 31.
Output from the 2nd side. Furthermore, when a negative pulse signal is output to terminal C, the transistor Q69. Q72 is off, transistor Q
70. Q73 is turned on, and a pulse signal as shown in FIG. 6(d) is output from the first comparator 311 side. As described above, pulse signals are alternately output from the first comparator 311 and the second comparator 312 in synchronization with the head switching signal HSW, and the flip-flop 322 in the waveform shaping circuit 32 is repeatedly set and reset by this pulse signal. It will be done. As a result, the rectangular wave signal whose waveform has been shaped as shown in FIG. 6(e) from the flip-flop 322, that is, the restored head switching signal H8W is taken out and sent to the logic switching circuit 333 in the logic controller 33.

On the other hand, the R/P switching circuit 34 is given different Vcc voltages in the reproduction mode and the recording mode, and the R/P switching circuit 34 changes the R/P switching circuit accordingly.
Generates a switching signal. Now, assuming that playback mode is specified, in this case a Vcc voltage of 5V is applied, so the base potential of transistor Q78 becomes IV,
Transistor Q77 is turned on and transistor 07B is turned off. Therefore, the collector output of transistor Q77 becomes L level and the output of transistor Q7g becomes H level, which are sent to logic switching circuit 333 as an R/P switching signal. When the collector output of the transistor Q77 becomes L level, the transistor Q of the logic switching circuit 333
99. Q102 is held off. As a result,
Transistor Q9B, QIOI is flip-flop 3
22, and L level and H level signals are alternately output from the NOR circuit consisting of transistors 09B and Q99 and the NOR circuit consisting of transistors QIOI and Q102. The output signal of this NOR circuit is inverted by the transistor Q100°Q103 and becomes the channel switching signal AP.

Output as BP. In other words, the head switching signal H3
Channel switching signal AP in synchronization with W.

BP is output alternately. In this case, channel switching signals AP and BP become significant at L level.

Also, at this time, since the collector output of the transistor Q7g provided from the R/P switching circuit 34 to the logic switching circuit 333 is at H level, the transistor Q105
, 0108 are kept on. Therefore, the collector outputs of transistors Q105 and QIOII are at L level regardless of the output of flip-flop 822, and transistors Q10B and Q109 are turned off. Therefore, channel switching signals AR and BR output from transistors Q108 and 109 are held at H level. In the playback mode as described above, AR and BR are held at H level, and AP.

BP is alternately switched between H level and L level in response to head switching signal H8W.

On the other hand, if recording mode is specified, 10V VC
C voltage is applied. In the R/P switching circuit 34, when a vcc voltage of 10.degree. Therefore, the collector output of transistor Q77 is at H level, and transistor 078
The output becomes L level and is sent to the logic switching circuit 333 as an R/P switching signal. When the collector output of transistor Q77 becomes H level, logic switching circuit 33
8 transistor Q99. Q1G2 is held on. As a result, transistor Q99. Q102
The collector output of is at L level regardless of the output of the flip-flop 322, and the collector output of the transistor Q100°Q10
3 is off. Therefore, transistor QIO0°103
Channel switching signal AP taken out from.

BP is held at H level. At this time, since the collector output of the transistor Q78 in the R/P switching circuit 34 is at L level, the transistor Q 105 ,
Q10B is turned off. As a result, transistor Q1
04, Q107 is alternately controlled on/off by the output signal of the flip-flop 322, and the channel switching signal AR is sent from the collector of the transistor 0106°Q109 in the same way as in the above reproduction mode.

BR is output. In recording mode as above,
Channel switching signals AP and BP are held at H level, and AR and BR are held at H level in response to head switching signal H3W.
It is switched alternately between level and L level.

AP, BP, and AR in accordance with the recording/playback mode designation and head switching signal H5W as described above.

One of the BRs is selected and becomes L level.

Then, the third channel switching signal AP, BP, AR, BR outputted from this logic controller 33
Regenerative amplification circuits 36a and 36b in the figure.

Recording amplifier circuits 35a and 35b are selected. That is, in the reproduction mode, the channel switching signal AP.

The reproduction amplification circuits 36a and 36b are alternately selected by the BP, and the reproduction signals from the rotary heads 13a and 13b are amplified and sent to the switching circuit 37. This switching circuit 37 alternately selects the signals amplified by the regenerative amplifier circuits 36a and 38b using channel switching signals AP and BP,
The signal is output to a recording/reproducing circuit (not shown) via the rotary transformer 12a.

Further, when the recording mode is designated, a recording signal sent from a recording/reproducing circuit (not shown) via the rotary transformer 12a is sent to the recording amplifier circuit 35a.

35b. These recording amplification circuits 35a, 35
b operates alternately in response to channel switching signals AR and BR given from the logic controller 33, amplifies the recording signal and supplies it to the rotary heads 13a and 13b to record on the recording medium. Thereafter, recording/reproducing processing is performed in the same manner.

[Effects of the Invention] As detailed above, according to the present invention, the head amplifier is provided on the rotating drum side and connected directly to the head, and also connected to the recording/playback circuit via the rotary transformer. The reproduced signal input to the rotary transformer is amplified to a predetermined level by the head amplifier, so that the influence of noise and signal loss in the rotary transformer section can be reduced. In addition, since a head amplifier is interposed between the head and the rotary transformer, special attention must be paid to the management of transmission system characteristics such as matching between the head and the rotary transformer, as well as the bearing management between the channels of the rotary transformer. No need for extremely simple management to achieve its purpose.

Furthermore, the present invention waveform-shapes the head switching signal sent via the low retransistor, thereby restoring the original signal waveform. There is no need to provide a direct current transmission line such as, and the mechanical configuration can be simplified.

[Brief explanation of the drawing]

1 to 6 show an embodiment of the present invention,
Fig. 1 is a diagram showing the overall schematic configuration of this embodiment, Fig. 2 is a diagram showing the configuration of the rotating head portion, Fig. 3 is a block diagram showing the overall configuration of the head amplifier, and Fig. 4 is a diagram showing the overall configuration of the head amplifier. Figure 5 is a diagram showing details of the recording amplifier circuit and reproduction amplifier circuit part in the head amplifier, Figure 5 is a diagram showing details of the wind comparator, waveform shaping circuit, logic controller, and R/P switching circuit part in the head amplifier. FIG. 7 is a timing chart for explaining the operation, and is a diagram showing the overall general configuration of the conventional device. 11... Head amplifier, 12a, 12b... Rotary transformer, 13a, 13b... Rotating head, 21
... Rotating drum, 22 ... Rotating shaft, 23 ... Fixed drum, 31 ... Wind comparator, 32 ...
Waveform shaping circuit, 33... logic controller, 34
...R/P switching circuit, 35a, 35b...recording amplification circuit, 38a, 36b...reproduction amplification circuit, 37.
...Switching circuit, 311...First comparator, 312
...Second comparator, 313...Bias circuit,
321... Constant current circuit, 322... Flip-flop, 331... Current mirror circuit, 332... Constant current circuit, 333... Logic switching circuit.

Claims (2)

[Claims] (1) A magnetic head attached to the peripheral surface of the rotating drum,
A recording/reproducing circuit comprising: a head amplifier provided on the rotating drum for amplifying recording/reproducing signals for the magnetic head; and a rotary transformer for transferring signals between the head amplifier and an external circuit. . (2) In a recording/reproduction circuit including a magnetic head, a head amplifier, and a rotary transformer, a recording amplification means outputs a differential output voltage to the magnetic head, and a reproduction amplification means operates based on a differential input voltage from the magnetic head. , a matching means for matching the output and input of the recording amplification means and the reproduction amplification means with a rotary transformer, a waveform shaping means for shaping the waveform of a head switching signal sent via the rotary transformer, and a waveform shaping means for shaping the waveform of the head switching signal sent via the rotary transformer; 1. A recording/reproducing circuit comprising: a control means for switching and controlling operations of the recording amplifying means and the reproducing amplifying means according to a signal and an operating power supply voltage value from an external source.