JPH02138920U - - Google Patents

Description

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the configuration of an LPF 6 applied to a frequency synthesizer according to an embodiment of this invention, and FIG. 2 is a diagram for explaining the operation of FIG. 1.
Fig. 3 is a block diagram showing the configuration of a frequency synthesizer according to an embodiment of this invention and a conventional example, Fig. 4 is a circuit diagram showing an example of the structure of a conventional LPF6, and Fig. 5 shows the rate of change in capacitance of a large capacitor. FIG. 6 is a diagram showing an example of the attenuation characteristic of a conventional LPF 6, and FIG. 7 is a diagram showing an example of the spectrum of a local oscillation signal output from a conventional frequency synthesizer. 9...Lag filter, 11...Capacitance addition circuit,
12...Transistor, 13...Correction capacitor, 17...Thermistor.

Claims (1)

[Scope of utility model registration request] In a frequency synthesizer that uses a phase-locked loop and has a lag filter in the loop filter that makes up the phase-locked loop, a capacitance addition circuit that includes a correction capacitor and a switching transistor connected in series is connected in parallel to the capacitor that makes up the lag filter. A frequency synthesizer, wherein a bias voltage applied to a control terminal of the transistor is controlled by a temperature dependent element.