JPH02137510A - Current controlled gain variable amplifier - Google Patents

Current controlled gain variable amplifier

Info

Publication number
JPH02137510A
JPH02137510A JP29273188A JP29273188A JPH02137510A JP H02137510 A JPH02137510 A JP H02137510A JP 29273188 A JP29273188 A JP 29273188A JP 29273188 A JP29273188 A JP 29273188A JP H02137510 A JPH02137510 A JP H02137510A
Authority
JP
Japan
Prior art keywords
transistor
current
pnp
npn
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29273188A
Other languages
Japanese (ja)
Other versions
JPH06103815B2 (en
Inventor
Hiroshi Nakagawa
洋 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP29273188A priority Critical patent/JPH06103815B2/en
Publication of JPH02137510A publication Critical patent/JPH02137510A/en
Publication of JPH06103815B2 publication Critical patent/JPH06103815B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PURPOSE:To attain low distortion factor and to expand an allowable input by devising a variable resistance element such that an NPN transistor(TR) and a PNP TR are connected in parallel, giving a control current to the NPN TR and obtaining the current from the PNP TR. CONSTITUTION:The variable resistive element of current control type in which NPN TRs 12, 13, PNP TRs 14, 15, an operational amplifier 11, a flowing control current source 16, a flowing-out control current source 17 and a fixed resistor 18 are connected as specified and the saturation region of the complementary TRs are utilized, and an inverse amplifier using the operational amplifier are constituted. In the variable resistive element, a control current is supplied to the base of the NPN TR 12 and the same quantity of the control current is obtained from the base of the PNP TR 14, then the input signal current and the control current are separated and the distortion factor due to superimposition is reduced, Moreover, the saturation region of the variable resistive element is spread over a range equal in both polarities by the parallel combination of the TRs of the both types and the permissible input is increased.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、利得可変増幅器に使用される、電流制御型利
得可変増幅器に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a current controlled variable gain amplifier used in a variable gain amplifier.

従来の技術 近年、電流制御型可変増幅器は、カセットデツキのノイ
ズリダクションやハイファイVTRのノイズリダクショ
ンなどに使用されているが歪率の改善と許容入力の拡大
が要望されている。
2. Description of the Related Art In recent years, current-controlled variable amplifiers have been used for noise reduction in cassette decks, high-fidelity VTRs, etc., but improvements in distortion rate and expansion of permissible input are desired.

以下図面を参照しながら上述した従来の電流制御型利得
可変増幅器の一例について説明する。
An example of the conventional current-controlled variable gain amplifier mentioned above will be described below with reference to the drawings.

第3図は、従来の電流制御型利得可変増幅器の回路を示
すものである。第3図において、1は演算増幅器、2,
3はNPN トランジスタ、4は、定電流源で値はl0
15は抵抗で値はRO16は信号源である。
FIG. 3 shows a circuit of a conventional current controlled variable gain amplifier. In FIG. 3, 1 is an operational amplifier, 2,
3 is an NPN transistor, 4 is a constant current source with a value of 10
15 is a resistor whose value is RO16 is a signal source.

以上に構成された電流制御型利得可変増幅器について、
以下にその動作について説明する。まず、2,3のNP
Nトランジスタで可変抵抗素子を構成し、2のNPNト
ランジスタのエミッタと2のNPNトランジスタのコレ
クタと3のNPNトランジスタのエミッタの間が抵抗と
して動作し、4の定電流源の電流値■。により制御され
、Toを変化させることにより利得Avを変えることが
できる。
Regarding the current controlled variable gain amplifier configured above,
The operation will be explained below. First, a few NPs
A variable resistance element is constituted by N transistors, and between the emitter of the NPN transistor 2, the collector of the NPN transistor 2, and the emitter of the NPN transistor 3 operate as a resistance, and the current value of the constant current source 4 is . The gain Av can be changed by changing To.

発明が解決しようとする課題 しかしながら上記のような構成では、可変抵抗素子に信
号電流と制御電流が同時に流れる、また信号源が正の時
、信号電流が2のN P N l−ランジスタのエミッ
タからコレクタへ流れる。この信号電流が大きいと逆方
向の直流増幅率が小さいために出力電圧波形が歪むので
低歪率化、許容入力の拡大化が計れないという問題点を
有していた。
Problems to be Solved by the Invention However, in the above configuration, the signal current and the control current flow simultaneously in the variable resistance element, and when the signal source is positive, the signal current flows from the emitter of the N P N l-transistor of 2. flows to the collector. If this signal current is large, the DC amplification factor in the reverse direction is small and the output voltage waveform is distorted, resulting in the problem that it is impossible to lower the distortion rate or expand the allowable input.

本発明は上記問題点に鑑み、低歪率かつ許容入力の拡大
を計った電流制御型利得可変増幅器を提供するものであ
る。
In view of the above-mentioned problems, the present invention provides a current-controlled variable gain amplifier that has a low distortion rate and an expanded allowable input.

課題を解決するための手段 上記問題点を解決するために本発明の電流制御型利得可
変増幅器は、可変抵抗素子にNPN トランジスタで構
成されたものとPNPトランジスタで構成されたものを
並列にし、制御電流をNPNトランジスタの方へ流し込
み、PNPトランジスタから流し出すことにより低歪率
、大許容入力可変抵抗素子と演算増幅器を使用した反転
増幅器という構成を備えたものである。
Means for Solving the Problems In order to solve the above-mentioned problems, the current control type variable gain amplifier of the present invention has variable resistance elements in which NPN transistors and PNP transistors are connected in parallel, and control is performed. By flowing current into the NPN transistor and flowing it out from the PNP transistor, it has a configuration of an inverting amplifier using a low distortion, large input variable resistance element and an operational amplifier.

作用 本発明の電流制御型利得可変増幅器は、上記構成により
、可変抵抗素子における信号電流と制御電流を分離する
ことにより低歪化を実現したものである。
Operation The current controlled variable gain amplifier of the present invention achieves low distortion by separating the signal current and control current in the variable resistance element with the above configuration.

また、可変抵抗素子にNPNトランジスタとPNP ト
ランジスタを組み合わせることにより信号電流の向に依
らず大許容入力化を実現したものである。
Further, by combining an NPN transistor and a PNP transistor with a variable resistance element, a large input tolerance is realized regardless of the direction of the signal current.

実施例 以下本発明の一実施例の電流制御型利得可変増幅器につ
いて、図面を参照しながら説明する。
Embodiment Hereinafter, a current controlled variable gain amplifier according to an embodiment of the present invention will be described with reference to the drawings.

第1図に示すように、11は演算増幅器、12はNPN
トランジスタ、13はNPNトランジスタ、14はPN
P トランジスタ、15はPNP )ランシスタ、16
は流し込む制御電流源、17は流れ出る制御電流源、1
8は固定抵抗、19は大きさVINの交流信号源、20
は出力である。
As shown in FIG. 1, 11 is an operational amplifier, 12 is an NPN
transistor, 13 is NPN transistor, 14 is PN
P transistor, 15 is PNP) Lancistor, 16
1 is a controlled current source that flows in, 17 is a controlled current source that flows out,
8 is a fixed resistor, 19 is an AC signal source of magnitude VIN, 20
is the output.

第1図及び第2図を用いてその動作を説明する。The operation will be explained using FIGS. 1 and 2.

第2図は、本発明の可変抵抗素子の特性図を示すもので
あり、可変抵抗素子を流れる電流l51gを縦軸、可変
抵抗素子両端の電圧vRを横軸とすると、素子の飽和領
域では、可変抵抗素子の電圧対電流は、はぼ比例関係に
あり、制御電流により、そのかたむき(すなわち抵抗値
)は、変化する。計算によると、制御電流1oの時の可
変抵抗素子の抵抗値Rvは、次のようになる。
FIG. 2 shows a characteristic diagram of the variable resistance element of the present invention. If the vertical axis is the current l51g flowing through the variable resistance element, and the horizontal axis is the voltage vR across the variable resistance element, then in the saturation region of the element, The voltage versus current of the variable resistance element is approximately proportional, and its bias (ie, resistance value) changes depending on the control current. According to the calculation, the resistance value Rv of the variable resistance element when the control current is 1o is as follows.

よって、第1図、固定抵抗18の抵抗値をR。Therefore, in FIG. 1, the resistance value of the fixed resistor 18 is R.

とした時のこの反転増幅器の利得Avは次のようになる
The gain Av of this inverting amplifier is as follows.

したがって制御電流1oを変化させることによって、利
得Avを変化させることができる。
Therefore, by changing the control current 1o, the gain Av can be changed.

この可変抵抗素子は、第1図、NPN トランジスタ1
2のベースから、制御電流を流しこみ、かつ、流しこん
だものと同じ量の制御電流をPNPトランジトスタ14
のベースから流し出しているため、入力信号電流に制御
電流が重なって、歪率を悪(するのを防止している。
This variable resistance element is shown in FIG.
A control current is applied from the base of PNP transistor 14, and the same amount of control current as that applied is applied to the PNP transistor toaster 14.
This prevents the control current from superimposing the input signal current, which would adversely affect the distortion rate.

また、この可変抵抗素子は、従来の可変抵抗素子に比べ
、PNPトランジスタとNP)1ランジスタの並列に組
み合わせたものであるため、信号電流が正負いずれの方
向に流れても、可変抵抗素子の飽和領域が、正負はぼ等
しい範囲に広がり、許容入力が大きくなっている。
In addition, compared to conventional variable resistance elements, this variable resistance element is a combination of a PNP transistor and an NP)1 transistor in parallel, so no matter whether the signal current flows in the positive or negative direction, the variable resistance element will not be saturated. The area expands to approximately the same range of positive and negative values, and the allowable input becomes larger.

以上のように本実施例によれば、NPNトランジスタと
PNP トランジスタの飽和領域を利用した電流制御型
可変抵抗素子と演算増幅器を使用した反転増幅器構成に
することにより、低歪率、大許容入力を特長とする電流
制御型利得可変増幅器とすることができる。
As described above, according to this embodiment, by using an inverting amplifier configuration using an operational amplifier and a current-controlled variable resistance element that utilizes the saturation region of an NPN transistor and a PNP transistor, a low distortion rate and a large input tolerance can be achieved. It can be made into a current controlled variable gain amplifier with the following characteristics.

発明の効果 以上のように本発明の電流制御型利得可変増幅器によれ
ば、信号電流と制御電流を分離することにより、低歪率
を実現し、また、NPN トランジスタとPNPトラン
ジスタを組み合わせることにより、許容入力の拡大を実
現した可変抵抗素子と演算増幅器とで反転増幅器構成し
て、高性能電流制御型利得可変増幅器ができ、実用上き
わめて有用なものである。
Effects of the Invention As described above, the current controlled variable gain amplifier of the present invention achieves low distortion by separating the signal current and control current, and by combining NPN transistors and PNP transistors. By configuring an inverting amplifier with a variable resistance element and an operational amplifier that have expanded the permissible input, a high-performance current-controlled variable gain amplifier can be created, which is extremely useful in practice.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は変発明の一実施例における電流制御型利得可変
増幅器の回路図、 第2図は第1図のなかの可変抵抗素子の特性図、第3図
は従来の電流制御型利得可変増幅器の回路図である。 +VCC・・・・・・正の電源、−VER・・・・・・
負の電源、11・・・・・・演算増幅器、12.13・
・・・・・NPNトランジスタ、14.15・・・・・
・PNP トランジスタ、16.17・・・・・・定電
流源、18・・・・・・固定抵抗、19・・・・・・交
流信号源。
Figure 1 is a circuit diagram of a current controlled variable gain amplifier in an embodiment of the invention, Figure 2 is a characteristic diagram of the variable resistance element in Figure 1, and Figure 3 is a conventional current controlled variable gain amplifier. FIG. +VCC・・・Positive power supply, -VER・・・・・・
Negative power supply, 11... operational amplifier, 12.13.
...NPN transistor, 14.15...
・PNP transistor, 16.17... Constant current source, 18... Fixed resistor, 19... AC signal source.

Claims (1)

【特許請求の範囲】[Claims] 第1のNPNトランジスタのエミッタと第2のPNPト
ランジスタのエミッタとが、互いに接続され、第1のN
PNトランジスタのコレクタと第2のPNPトランジス
タのコレクタとが、互いに接続され、さらに第1のNP
Nトランジスタのベースには第3のNPNトランジスタ
のベースとコレクタが接続され、第1のNPNトランジ
スタと第2のPNPトランジスタのコレクタには第3の
NPNトランジスタのエミッタと第4のPNPトランジ
スタのエミッタが接続され、さらに第2のPNPトラン
ジスタのベースには、第4のPNPトランジスタのベー
スとコレクタが接続されるとともに、第1のNPNトラ
ンジスタのエミッタと第2のPNPトランジスタの接続
点が第1の演算増幅器の反転入力端子に接続され、さら
に、第1のNPNトランジスタのコレクタと第2のPN
Pトランジスタのコレクタと第3のNPNトランジスタ
のエミッタと第4のPNPトランジスタのエミッタの接
続点が第1の演算増幅器の出力に接続され、さらに、第
1の抵抗の一端が第1の演算増幅器の反転入力端子に接
続し、第1の抵抗のもう一方の端子を交流信号の入力と
し、さらに、第1の演算増幅器の非反転入力端子を接地
し、第1のNPNトランジスタのベースと第3のNPN
トランジスタのコレクタとベースに流入する電流と第2
のPNPトランジスタのベースと第4のPNPトランジ
スタのコレクタとベースから流出する電流をほぼ等しく
し、この電流値をほぼ等しく変化させることにより、第
1、第2のトランジスタのコレクタとエミッタの間を可
変抵抗素子として機能する電流制御型利得可変増幅器。
The emitter of the first NPN transistor and the emitter of the second PNP transistor are connected to each other, and the emitter of the first NPN transistor is connected to each other.
The collector of the PN transistor and the collector of the second PNP transistor are connected to each other, and the collector of the first NP transistor is connected to each other.
The base of the N transistor is connected to the base and collector of the third NPN transistor, and the emitter of the third NPN transistor and the emitter of the fourth PNP transistor are connected to the collectors of the first NPN transistor and the second PNP transistor. Furthermore, the base and collector of the fourth PNP transistor are connected to the base of the second PNP transistor, and the connection point between the emitter of the first NPN transistor and the second PNP transistor is connected to the base of the second PNP transistor. connected to the inverting input terminal of the amplifier, and further connected to the collector of the first NPN transistor and the second PN transistor.
A connection point between the collector of the P transistor, the emitter of the third NPN transistor, and the emitter of the fourth PNP transistor is connected to the output of the first operational amplifier, and one end of the first resistor is connected to the output of the first operational amplifier. The other terminal of the first resistor is connected to the inverting input terminal, and the other terminal of the first resistor is used as an input of an AC signal.Furthermore, the non-inverting input terminal of the first operational amplifier is grounded, and the base of the first NPN transistor and the third NPN
The current flowing into the collector and base of the transistor and the second
By making the current flowing out from the base of the PNP transistor and the collector and base of the fourth PNP transistor approximately equal, and changing this current value approximately equally, the distance between the collector and emitter of the first and second transistors can be varied. A current-controlled variable gain amplifier that functions as a resistive element.
JP29273188A 1988-11-18 1988-11-18 Current control type variable gain amplifier Expired - Lifetime JPH06103815B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29273188A JPH06103815B2 (en) 1988-11-18 1988-11-18 Current control type variable gain amplifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29273188A JPH06103815B2 (en) 1988-11-18 1988-11-18 Current control type variable gain amplifier

Publications (2)

Publication Number Publication Date
JPH02137510A true JPH02137510A (en) 1990-05-25
JPH06103815B2 JPH06103815B2 (en) 1994-12-14

Family

ID=17785594

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29273188A Expired - Lifetime JPH06103815B2 (en) 1988-11-18 1988-11-18 Current control type variable gain amplifier

Country Status (1)

Country Link
JP (1) JPH06103815B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1014163A4 (en) * 1997-12-26 2003-06-03 Funai Electric Co CIRCUIT FOR AMPLIFYING A CONTROL SIGNAL.
JP2022119256A (en) * 2021-02-04 2022-08-17 三菱電機株式会社 Power conversion device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE1014163A4 (en) * 1997-12-26 2003-06-03 Funai Electric Co CIRCUIT FOR AMPLIFYING A CONTROL SIGNAL.
JP2022119256A (en) * 2021-02-04 2022-08-17 三菱電機株式会社 Power conversion device

Also Published As

Publication number Publication date
JPH06103815B2 (en) 1994-12-14

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