JPH02129722A - Data managing system - Google Patents

Abstract

PURPOSE:To facilitate the decision of a data type by using all memory areas by using a tag bit for discriminating a data type of a data cell of a processing unit as an address lower bit part for indicating an address under an address boundary of a plural byte unit. CONSTITUTION:A data cell 15a of a processing unit is stored by a plural byte unit of continuous addresses, an address lower bit part 15b for indicating an address under an address boundary of this plural byte unit is a tag bit for discriminating a data type of a data cell of the processing unit, and by this tag bit 15b, the data cell of the processing unit is managed. In such a way, at the time of executing a data processing, all memory spaces can be used as a data area, an area for a tag for the data type is not required, and the utilization efficiency of a memory is improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a data management method, and particularly to a data management method in a data processing device that processes data cells having a data structure in which the data itself has a data type. It is.

[Conventional technology]

Conventionally, data processing apparatuses that process data cells having a data structure in which the data itself has a data type, such as L
In the list processing device that processes the ISP program,
As a method of expressing LISP data, for example, as shown in FIG. 7, there is a method of using the upper bits of a half cell of 32-bit data as a tag indicating the data type.

Another method for expressing LISP data is to set the tag area for indicating the data type in a separate area from the area holding the address of the data cell, as shown in FIG. The data format of FIG. 8 shows an example of one data cell of list configuration data. In FIG. 8, bit information indicating that the data cell is cons type data is set in tag area 1.

The system area 2 is an area in which mark bits and the like used by the system control unit to perform garbage collection processing and the like are set. Next to the area indicating the data type, etc., the original data area of the data cell, CAR section address data area 3, DR section address data area 4, constitutes one processing unit data cell.

Regarding the former method of representing such LISP data, see the paper [5Jholey, S.E., Fahln.
+anrThe Design of an In5t
ruction Set for CommonLis
pJ, 1984 NCM Symposium on Lisp and Functional Programming, 1984, pp. 150-157 [1984A
CM SYMPOSIUM ON LISP AND
FUNCTIONAL PROGRAMMING, 198
4. PP150 to PP157], also,
Regarding the latter, please refer to the paper [Yuasa, Hagiya "Niyoto Co.
"Realization of nn+on Li5p", Information Processing Society of Japan - Symbol Processing Study Group Material 34-1, November 13, 1985].

[Problem to be solved by the invention]

By the way, in accordance with the recent advances in semiconductor technology and the demand for advanced data processing functions, the address space has been expanded.
Hardware of data processing devices having advanced data processing functions has been realized. Using data processing equipment with such advanced data processing functions, LIS
When implementing a P language processing system, LIS
With the conventional data representation method of using the upper few bits of the address as a tag to represent the data of P, it is no longer possible to represent the addresses of all memory spaces.

A problem has arisen in that data processing cannot be performed efficiently by effectively utilizing addresses in the expanded memory space.

In other words, in the data representation method shown in Figure 7,
If a half cell of a data cell in one processing unit is 32-bit data, the upper 5 bits of the 32-bit data half cell are used as a data type tag, so the data expressed by the half cell is used for address expression. 3 of the memory space provided by hardware with a 32-bit address space specification.
There is a problem in that only one-half can be used as a data area.

Furthermore, with the data representation method shown in Figure 8, although it is possible to use all of the memory space specified by the address space provided by the hardware, the original area for holding the tag that indicates the data type is Since one-half of the area required for data expression is used in excess, there is a problem in that memory usage efficiency is reduced.

The present invention has been made to solve the above problems.

An object of the present invention is to store data cells in a data representation that can use all the memory areas that can be specified in the address space provided by hardware and that does not require an extra memory area for data representation. An object of the present invention is to provide a data management method that allows easy type determination.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means to solve the problem]

In order to achieve the above object, in the present invention, in a data processing device that processes data cells having a data structure in which the data itself has a data type, data cells in units of processing are stored in units of multiple bytes of consecutive addresses, The lower bit part of the address indicating the address below the address input boundary in units of multiple bytes is used as a tag bit for determining the data type of the data cell in the unit of processing, and the data cell in the unit of processing is managed using the tag bit.

The processing unit data cell here is an 8-byte unit data cell for list processing, and the lower bit part of the address indicates the address below the address boundary in multiple byte units of the address data of the data cell specified by the half cell. is the lower 3 bits of a 32-bit address, and the lower 3 bits are used as tag bits to determine the data type of a data cell, which is a unit of processing.

[Effect]

According to the above means, in a data processing apparatus that processes a data cell having a data structure in which the data itself has a data type, the data cell as a unit of processing is stored in units of multiple bytes at consecutive addresses. The lower bit part of the address indicating the address below the address boundary in units of multiple bytes is used as a tag bit for determining the data type of the data cell in the unit of processing, and the data cell in the unit of processing is managed by this tag bit.

For example, if the basic data length of a data cell, which is a processing unit secured in a memory space, is 8 bytes, the addresses of all data cells are expressed as a multiple of 8. 3
When data processing is performed in the address space of 2-bit addresses, the address that specifies each data cell is a multiple of 8, so the lower 3 bits of the 32 bits of address bits that specify the address of each data cell are always It becomes 0. Therefore, the actual data cell address is
It can be expressed using 29 bits of the upper address. Therefore, since the address of each data cell can be expressed entirely by the address of the upper 29 bits, the entire memory space provided by the hardware can be expressed and the memory space can be used effectively. Data can be used to tag bits to indicate data type.

This remaining lower 3-bit data is not necessary as address data for specifying each data cell, so it is possible to express all the memory space provided by the hardware and use the memory space effectively. There is no difference. In this way, the lower three bits of the address, which are unnecessary as address data for specifying each data cell, are used as tag bits that indicate the data type, and the tag bits are used to manage the data of each data cell.

That is, 8-byte data cells are stored in correspondence with addresses in the memory space, and a tag indicating the data type of the data in the half cell is set in the lower 3 bits of the half cell that holds the address of the data in the memory space. .

Bits other than the lower three bits are used to express an address.

Therefore, it is possible to represent the entire memory space provided by the hardware that stores data cells, and there is no need to provide a separate area dedicated to tags for data type determination, improving memory usage efficiency. be able to.

In this way, by using the lower three bits that specify the address of a data cell to determine the data type, the entire memory space provided by the hardware can be used as a data area.

Further, by using the lower three bits specifying the address of the data cell to determine the data type of the data cell, no data area other than the data cell is required for data determination.

〔Example〕

Hereinafter, one embodiment of the present invention will be specifically described using the drawings.

FIG. 1 is a block diagram showing the configuration of essential parts of a data processing system according to an embodiment of the present invention.

In FIG. 1, 10 is a data processing device, 11 is an input device, 12 is an output device, and 13 is data to be processed and LIS.
This is a secondary storage device in which the P program is stored.

In addition, 14 is an L which performs each process of the LISP program.
The ISP processing mechanism 15 is a LISP data storage unit.

The data processing device 110 processes the LISP language programs and data input from the input device 11 into LISP language programs and data.
The processing mechanism 14 performs data processing using the LISP data storage section 15 and outputs the processed result data to the output device 12 . The data to be processed and the LISP program are stored in the secondary storage device 13 as necessary, and the processing is executed. The LISP data storage unit 15 shares a real storage device provided by hardware. The data processed by the LISP processing mechanism 15 is input to the input device 11 or 2.
The data is read from the next storage device 13 and a storage area is secured in the LISP data storage section 15. The processing unit data cell 15a is stored in a storage area in the LISP data storage section 15. Each data cell 15a is stored in units of multiple bytes of consecutive addresses, and the lower address pit portion of each data cell 15a indicating an address below the address boundary in units of multiple bytes indicates the data type of the data cell in the unit of processing. A tag bit 15b is used to determine the data cell, and this tag bit 15b manages data cells in units of processing.

FIG. 2 is a diagram illustrating tag bits according to an embodiment of the present invention. In FIG. 2, 20a is a data area of a data cell as a unit of processing, and 20b is a tag bit area indicating the data type. LISP data has data types such as reading type (small integer type, 9 character type, etc.) data, symbol type data, and cons type data. As shown in the figure. This tag bit is a lower bit portion of the address that indicates an address below the address boundary in units of multiple bytes of the data cell.

The tag bit "o o o" indicates immediate type data, the tag bit "'100" indicates symbol type data, the tag bit "010" indicates cons type data, and The tag bit "OO1" indicates another data type. The remaining 29 bits other than the lower three tag bits are used to represent address data in a memory space provided by hardware or immediate value data.

FIG. 3 is a diagram showing the format of one data cell of a processing unit according to an embodiment of the present invention. A data cell 30 in FIG. 3 shows an example of cons type data of one data cell of list structure data. The data cell 30 includes CAR part address data 31a-fusel and CD
It is composed of R part address data 32a and a cell, and tag bits 31b and 32b indicating the data type are added to the data of each half cell.

Next, a state in which a certain list of data is stored in a storage unit in a LISP language processing system to which a data management system according to an embodiment of the present invention is applied will be explained with a specific example. The list data here is list data as shown in FIG. In other words, the data of formula 8 enclosed in parentheses is expressed as - with a blank character,
(1ist l+l (+-1, 2) -”abc
”). If this is expressed in normal internal representation in the storage unit, it will be data with a list structure as shown in FIG. 5, which is connected by each data cell. In the data representation of the list structure, the data type is not specified for each data cell, but when the data of this list is stored in the storage unit by applying the data management method of this embodiment, The state will be as shown in the figure, and the data in each data cell will be stored with a tag bit added to it.In Figures 5 and 6, the numbers outside the blocks indicate addresses. ing.

As described above, according to this embodiment, a tag bit indicating the data type can be added to and stored in the data of each data cell, and a system control program (not shown) can add and store the tag bit in the data of each data cell. The data in the data cell can be appropriately managed using the data in the data cell.

As described above, according to this embodiment, cons-type data can be expressed in two-thirds the area compared to the conventional method shown in FIG.

In this way, the data management method of this embodiment is, for example, L
This data management method is suitable for use when implementing an ISP language processing system in a data processing device with 32-bit address space specification hardware.

The present invention has been specifically described above based on examples, but 1.
It goes without saying that the present invention is not limited to the embodiments described above, and can be modified in various ways without departing from the spirit thereof.

〔Effect of the invention〕

As described above, according to the present invention, the storage address of a data cell can represent all addresses in a memory space provided by hardware, and tag bits can also be represented as data within the data cell. Therefore, in data processing, all memory space can be used as a data area.

It is possible to construct a system that improves memory usage efficiency without requiring an area for tags for data types.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of essential parts of a data processing system according to an embodiment of the present invention, FIG. 2 is a diagram explaining a tag bit according to an embodiment of the present invention, and FIG. , a diagram showing the format of one data cell of a processing unit according to an embodiment of the present invention, FIG. 4 is a diagram showing an example of data in a list of eight expressions expressed in parentheses, and FIG. FIG. 6 is a diagram illustrating a specific representation of list-structured data in the storage unit using data cells with tag bits specified; FIG. 7 is a diagram illustrating the representation of list-structured data in the storage unit FIG. 8 is a diagram illustrating an example of a conventional format of a data cell of LISP data. FIG. 8 is a diagram illustrating another example of a conventional format of a data cell of LISP data. In the figure, 10... data processing device, 11... input device, 12... output device, 13... secondary storage device, 14
. . . LISP processing mechanism, 15 . . . LISP data storage unit.

Claims (3)

[Claims] (1) In a data processing device that processes data cells that have a data structure in which the data itself has a data type, data cells as a unit of processing are stored in multiple byte units of continuous addresses, and addresses below the address boundary of the multiple byte units A data management method characterized in that the lower bit part of an address that designates is used as a tag bit for determining the data type of a data cell in a unit of processing, and the data cell in a unit of processing is managed using the tag bit. (2) In the data management system according to claim 1, the processing unit data cell is an 8-byte unit data cell for list processing, and the address data of the data cell specified by the half cell is a multi-byte unit address. The lower bit part of the address that indicates the address below the boundary is 3.
A data management method characterized in that the lower 3 bits of a 2-bit address are used as tag bits to determine the data type of a data cell that is a unit of processing. (3) In the data management system according to claim 1, the address lower bit portion indicating an address below the address boundary in units of multiple bytes is the lower three bits of the 32-bit address.
A data management method characterized in that the lower three bits are used to determine the data type of a data cell, and no other data area is provided for determining the data type of the data cell.