JPH02125552A - Optical input interruption detecting circuit - Google Patents

Abstract

PURPOSE:To generate an alarm for deciding a cause to occurrence of optical interruption by generating an optical input interruption alarm signal in an electric/optic conversion circuit prior to the generation of the optical output interruption alarm signal in an optic/electric conversion circuit. CONSTITUTION:The 2nd detection circuit 24 generates the 2nd alarm signal. The 1st detection circuit 22 always monitors in which relation an output data signal level VD outputted from a mean value rectifier circuit 201 exists with respect to the 1st reference level VC1 in parallel with the 2nd detection circuit 24, and a high level signal is outputted from the 1st detection circuit 22 when an output data signal level VD is less than the 1st reference level VC1 or below. A high level signal (alarm signal) is outputted from the 1st detection circuit 22 before a cause dropping a timing signal component level appears to a level in which the 2nd detection circuit 24 generates a high level signal (alarm signal) and the result is outputted from an OR circuit 26 as an optical input interruption alarm signal.

Description

[Detailed Description of the Invention] [Summary] Regarding an optical input disconnection detection circuit that also uses an optical-to-electrical conversion output data signal to detect optical input disconnection in an optical repeater, etc., the present invention provides an independent and easy setting of a full-spot detection reference level. A determination circuit that outputs an electrical data signal, and a timing amplification circuit that outputs the frequency component level of a clock signal that is also used in the determination circuit, with the aim of preventing erroneous determination of optical input disconnection under
The frequency component level and the second reference level are compared and the second
a signal level generation circuit that outputs the level of the electrical data signal; and a signal level generating circuit that outputs the level of the electrical data signal; higher by the value given,
and a first detection circuit that outputs a first alarm signal by comparing the discrimination level of the discrimination circuit with a first reference level that has a predetermined relationship, and outputs of the first and second detection circuits. A receiving OR circuit is provided, and the output signal of the OR circuit is output as an optical input disconnection alarm signal.

[Industrial application field]

The present invention relates to an optical input disconnection detection circuit in an optical-to-electrical conversion circuit such as an optical repeater.

Optical repeaters are installed at predetermined intervals on the optical transmission lines that make up the optical communication network, and optical signals transmitted from the transmitting terminal are transferred to the receiving end while compensating for transmission loss and transmission distortion. The optical transmission line is configured to send the signal to the station. Since a fault may occur in each optical repeater after installation, each optical repeater is provided with a fault detection circuit to enable prompt detection of faults.

[Conventional technology]

As a conventional optical repeater, there is one having the configuration shown in FIG. Reference numeral 10 denotes an APD (avalanche photodiode) that receives an optical signal transmitted through a trunk optical fiber and converts it into an electrical signal.

The electrical signal photoelectrically converted by this APDIO is equalized and amplified in the equalization amplifier circuit 12 while controlling the gain for compensating for transmission loss and/or transmission distortion, and then in the discrimination circuit 16 from the timing amplifier circuit 18. The input signal is binarized and determined for each clock signal CLK and output as a digitized signal. Then, the gain control of the equalization amplifier circuit 12 and the APD
The bias voltage of the bias control circuit 13 is the same as that of the gain control circuit 1.
4, and is configured to keep the equalization signal level output from the equalization amplifier circuit 12 constant.

The timing amplifier circuit 18 also generates a peak voltage 7 of the timing signal component. This level A is output from the detection circuit section in the timing amplification circuit 18, which includes a bandpass filter and an amplification circuit. This peak voltage (7) represents the level of the frequency component of the focus clock cycle included in the equalized waveform. When the peak voltage (1) decreases as the input optical signal power decreases and falls below the second reference level VC2, an optical input disconnection alarm is generated from the second detection circuit 24 (see Fig. 5). a)). This alarm is sent to a monitoring device to determine whether there is a failure in the optical-to-electrical conversion circuit 2.

As described above, the equalized waveform-processed electrical data signal and clock signal are applied to the electrical-optical conversion circuit 4 for optical signal relay. The LD drive circuit 30, which responds to the electrical data signal and the clock signal,
A laser diode (LD) 33 in the D module 32 is driven, and a corresponding optical data signal is sent to the forward emitted light of the laser diode 33 to an optical fiber extending to the next optical repeater. The backward emitted light from the laser diode 33 is received by the APD 34 in the LD module 32 . When the APD 34 output signal level ■8 output from the average value rectifier circuit 36 becomes lower than the third base level VC3, a light output cutoff alarm is output from the third detection circuit 38 (FIG. 5(b)). reference). This alarm is also sent to the monitoring device. In addition, 31 is a laser diode 33
40 is an automatic power control circuit, which controls the variation of the light emission level due to temperature; 40 is an automatic power control circuit;
In response to the LD drive level signal and the signal level v of the average value rectifier circuit 36, the control signal is supplied to the LD drive circuit 30 and the bias control circuit 31 to keep the output optical power level constant.

(Problems to be Solved by the Invention) The peak voltage of the timing signal component output from the timing amplifier circuit 18 for the above-mentioned optical input disconnection alarm detection (the peak voltage of the frequency (f,) component of the bit clock cycle) As mentioned above, since the optical power is output from the detection circuit section consisting of the bandpass filter and the amplifier circuit with the center frequency fo as Even if the equalized waveform becomes so low that the equalized waveform that should be output when the waveform discrimination is determined as ``1'' is output as ``0°'', the noise contained in the signal is reduced. The timing signal component level ■T is determined by the same or similar components in the first reference level VCI.
A situation arises in which the

In this state, the electrical data signal train supplied from the optical-to-electrical conversion circuit 2 to the electrical-to-optical conversion circuit 4 includes a 0°' signal, and as a result, the optical-to-electrical conversion side originally caused an optical input disconnection alarm. Although this should occur, a situation occurs in which an optical output cutoff alarm is generated only from the detection circuit 38 on the electro-optical conversion side. Even if this alarm is output and the optical-electrical detection circuit subsequently detects a disconnection of the optical input, the problem is that the first disconnection detection circuit is deemed to have failed (misjudged). The problem is that it cannot be pointed out.

The purpose can also be achieved by setting the second and third reference levels V CI V C3 for both of these reference levels so that such a result does not occur, but the setting of each reference value itself In addition to the critical settings, the desired settings cannot be achieved unless the circuit parameters related to the opto-electric conversion circuit and the electro-optic conversion circuit are also taken into consideration. Therefore, its setting is extremely difficult.

The present invention was created in view of such problems, and it is possible to reduce the optical input at the stage of performing optical-to-electrical conversion to receive optical input that is temporarily or connectively lower than the normal optical input. It is an object of the present invention to provide an optical input disconnection detection circuit for an optical-to-electric conversion circuit that quickly detects a disconnection.

[Means to solve the problem]

FIG. 1 shows a block diagram of the principle of the present invention. As shown in this figure, the present invention provides a discrimination circuit 1 that outputs an electrical data signal from an electrical signal obtained by optical-to-electrical conversion of an optical input signal.
6, a timing amplification circuit 18 which also applies a clock signal to the discrimination circuit 16 and outputs the frequency component level of the clock period; A signal level generation circuit 22 outputs the average level of the electrical data signal to an optical-to-electrical conversion circuit having a second detection circuit 24 that outputs an alarm signal; A first detection that outputs a first alarm signal by comparing a first reference level VCI which is higher than the reference level VC2 by a predetermined value and has a predetermined relationship with the discrimination level of the discrimination circuit 16. a circuit 22;
and an OR circuit 26 that receives the outputs of the second detection circuits 22, 24, and outputs the output signal of the OR circuit 26 as an optical input cutoff signal.

[For production]

The first reference level Vll of the first detection circuit 22 is as described above with respect to the second reference level for generating the second alarm signal in the second detection circuit 24 and the discrimination level of the discrimination circuit 16. Since the setting is set, the first alarm signal is generated from the first detection circuit 22 even when the second detection circuit 24 does not generate the first alarm signal. Because an optical input disconnection alarm signal may be generated in the optical-to-electrical conversion circuit prior to generation of the optical output disconnection alarm signal in the electric-to-optical conversion circuit due to a misjudgment by the discrimination circuit 16, the conventional inconvenience can be avoided. can do. This can be accomplished without requiring the setting of delicate reference levels for alarm generation.

〔Example〕

FIG. 2 shows an embodiment of the invention. In this figure, components that are the same as those shown in FIG. 4 are given the same reference numerals and their explanations will be omitted.

20 is an average value rectifier circuit (corresponding to the signal level generation circuit 20 in FIG. 1), 22 is a first detection circuit, and the average value rectifier circuit 20. When the output signal of VC1 becomes lower than the first reference level VC1, a high level signal is output.

First standard level■. , is a level that is higher than the second reference level VC2 by a predetermined value and has a predetermined relationship with the discrimination level of the discrimination circuit 16.

26 is an OR circuit that receives the outputs of the first and second detection circuits 22 and 24.

The operation of this embodiment will be explained below.

In this embodiment as well, the second detection circuit 24 generates a second alarm signal similar to that explained in FIG.

In parallel with the operation of the second detection circuit 24, the output data signal level (■) output from the average value rectification circuit 201 is the first reference level (■). The first detection circuit 22 constantly monitors the level relationship between the output data signal level V and the output data signal level V. is the I-th reference level vc
When the value falls below 1, the first detection circuit 22 outputs a high level signal.

Since the first reference level V (+ is set as described above for the second reference level VCZ and the judgment level) for generating this high-level signal, even if the second detection circuit 24 The first detection circuit 22
However, a high level signal (alarm signal) is outputted, and the OR circuit 26 outputs it as an optical input disconnection alarm signal. This optical input disconnection alarm signal is generated by supplying an electrical data signal whose level has decreased enough to generate the alarm signal to an electrical-to-optical conversion circuit 4 as shown in FIG. is generated before the is generated. This is useful for determining whether the alarm generation factor detected by the electro-optical conversion circuit 4 is an internal factor or a factor caused by the electrical data signal input thereto. In addition, in order to generate the above-mentioned alarm using the conventional technique, it was necessary to set extremely delicate reference levels, but in the present invention, mutual communication between the optical-to-electric conversion side and the electric-to-optical conversion side is required. Even without taking circuit constants into consideration, it is only necessary to make a setting that allows the above-mentioned occurrence, so the setting becomes easy.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to correctly generate an alarm for determining the cause of full-field occurrence in an optical repeater. It also becomes easy to set a reference level for its occurrence.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention. FIG. 2 is a diagram showing an embodiment of the present invention; Figure 3 is a diagram showing how alarms occur; Figure 4 is a circuit diagram for detecting fullness of a conventional optical repeater. Figure 5 is an explanatory diagram of alarm generation. FIG. 6 is an explanatory diagram of states occurring in the equalized waveform. In Figures 1 and 2, 16 is a discrimination circuit; 18 is a timing amplifier circuit; 20 is a signal level generation circuit (average value rectification circuit 20); 22 is a first detection circuit; 24 is a second detection circuit; 26 is an OR circuit. No. figure

Claims (1)

[Claims] (1) A discriminating circuit (16) that outputs an electrical data signal from an electrical signal obtained by optical-to-electrical conversion of an optical input signal, and also providing a clock signal to the discriminating circuit (16);
a timing amplification circuit (18) that outputs the frequency component level of the clock period; and a second detection circuit (18) that compares the frequency component level with a second reference level (V_c_2) and outputs a second alarm signal. 24) Light having -
The electrical conversion circuit includes: a signal level generation circuit (20) that outputs an average level of the electrical data signal; and a value predetermined from the average level of the electrical data signal and the second reference level (V_c_2). only higher,
and a first detection circuit (22) that compares the discrimination level of the discrimination circuit (16) with a first reference level (V_c_1) having a predetermined relationship and outputs a first alarm signal.
and an OR circuit (26) that receives the outputs of the first and second detection circuits (22, 24), and outputs the output signal of the OR circuit (26) as an optical input disconnection alarm signal. Optical input disconnection detection circuit.