JPH02121544A - Data transmitting device - Google Patents

Abstract

PURPOSE:To reduce the time when a transmission line is occupied by the channel conflict control by transmitting a prescribed timing signal showing the end of transmission to a circuit at the end of transmission and setting a prescribed transmission inhibiting period based on the detected timing signal. CONSTITUTION:When the transmission of data is over and a carrier detecting signal CD is set at a low level, a 2nd D type flip-flop 45 is set. Thus a clock is supplied to a transmission inhibiting period setting timer 51 via an AND circuit 49. The timer 51 starts its counting action at the rise time point t5 of a timing pulse Pt. When the timer 51 has an overflow at a time point t7, the timer 51 outputs an output pulse P24 at the time point t7.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a data transmission device that connects a plurality of transceivers to a bidirectional CATV line in the form of a bus and transmits data via a modem. .

(Prior Art) Recently, a data transmission device has been developed that connects a plurality of transmitters and receivers in a bus-like manner to a bidirectional CATV line and transmits data via a modem. In data transmission devices connected in a bus-like manner as described above, if a transmission factor occurs one after another in a plurality of transmitters and receivers, competitive transmissions occur and a collision occurs. When a collision occurs, an error occurs in the transmitted data, making it necessary to interrupt the transmission and retransmit it. When contention occurs in this way, if no contention control is performed, the above-mentioned operation will occur repeatedly, significantly reducing transmission efficiency.Therefore, conventional methods for controlling such contention have been proposed. Examples include the whole-selefting method and the CSMA/CD method.

The whole-selefting method is a method in which the center polls each sender and receiver at fixed intervals.
In this method, the transmission path is always occupied due to polling, so the transmission efficiency is low.

On the other hand, in the C3MA/CD method, the transmitter/receiver that wants to transmit constantly monitors the carrier on the transmission path, starts transmitting when no carrier is detected, and if a collision occurs, it uses a random number or address, etc. This method waits for the determined time and then retransmits the message. Since this method does not involve the exchange of signals for polling, it has higher transmission efficiency than the hauling selective method.

Furthermore, in order to further improve the transmission efficiency in the CSMA/CD method described above, the following control is also added to the control described above. In other words, when each transceiver finishes transmitting and detects that the carrier on the transmission path has disappeared, it becomes unable to transmit for a while, but the time during which it is unable to transmit is determined by address random numbers etc., which differs for each transceiver. It is determined for each transmitter/receiver. Furthermore, when it detects a carrier transmitted by another transceiver, it stops its own transmission, thereby preventing collisions due to competing transmissions.

(Problems to be Solved by the Invention) In the conventional data transmission device described above, there is a problem in that when the number of transmitters and receivers increases, the transmission unavailable time increases in proportion to the number, and the transmission efficiency decreases.

In addition, as another problem, the increments of the transmission unavailable time are as follows:
In addition to being long enough to distinguish between each transmission and reception, it must also be long enough to absorb the deviation between each transmitter and receiver. However, when transmission ends and the carrier on the transmission path disappears, The problem is that carriers do not disappear immediately, but residual carriers exist in a data transmission device via a modem, and the residual carriers lengthen the above-mentioned deviation. As a result, the above-mentioned non-transmission time becomes long, and transmission efficiency decreases. There is.

More specifically, in a data transmission device that transmits data via a modem, even if the sender stops transmitting carriers, residual carriers remain on the transmission path for a while. The attenuation of this carrier is several db/μ5ec (in the modem of the reference transmission equipment, it is approximately -4 from -20dbll to -606ba+).
db/u sea>. On the other hand, the threshold level for carrier detection on the receiver side is one loss + dbm (-80 dbm for the reference modem), and the threshold level for carrier detection on the receiver side is A time difference occurs in the timing of end detection. The relationship between this time difference and the difference in attenuation of the transmission line is several hundred n5ec/
db (In the reference transmission device, the maximum difference in attenuation of the transmission path was 40 db, and a time difference of about 10 μsec occurred in the timing of the end of transmission). This relationship is the 8th
The figure shows carrier strength versus time td from carrier transmission stop.
It is shown as.

Furthermore, a device that transmits data on a CAT line has a repeater in the center, converts the signal sent from the transmitting side to a different frequency (and may even convert it to a different modulation), and transmits the signal. Since the system is such that the receiving side receives this signal, the time difference between the transmission end detection timings on each receiving side due to the attenuation of the transmission path described above is doubled.

Furthermore, recently, such data transmission equipment has been installed as BBS (BULLET BOARD SYSTEM) in apartment complexes, housing complexes, etc.
There are systems used as packet data transmission devices such as TEM (e.g. electronic circular board system, message transfer system), management system, etc. In this case, the number of transceivers increases from several tens to 1,200,000, so the time that the transmission path is occupied during channel contention becomes extremely long.
Transmission efficiency will be lower. In particular, since such data transmission equipment mainly transmits data in short packets (256 bytes or less), most of the transmission path is used for channel contention, resulting in a decrease in transmission efficiency. There is a problem (using the reference transmission device, if you create a device consisting of 1000 transmitters and receivers, the transfer rate is 64
kbps, 1 packet is 64 bytes, and the time difference from carrier extinction to transmission ready is set to 30 μsec, the transmission efficiency drops to 21%.

The present invention has been made in view of the above, and its purpose is to reduce the timing difference in transmission end detection between each transmitter and receiver, and to reduce the rate at which the transmission path is used for channel contention. An object of the present invention is to provide a data transmission device that improves the transmission efficiency of a transmission line.

[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, the data transmission device of the present invention has the following features:
A data transmission device that connects a plurality of transceivers to a bidirectional CATV line in the form of a bus and transmits data using a CSMA/CD method via a modem, and transmits a predetermined timing signal indicating the end of transmission to the line when the transmission ends. A transmitting means for transmitting a signal, a detecting means for detecting the timing signal from the line, and a setting means for setting a predetermined transmission prohibition period based on the timing signal indicating the end of transmission detected by the detecting means. This is the summary.

(Function) In the data transmission device of the present invention, when transmission ends, a predetermined timing signal indicating the end of transmission is sent to the line, the predetermined timing signal is detected, and a predetermined transmission is prohibited based on the detected timing signal. A period is set.

(Example) Hereinafter, the present invention will be explained in detail using the drawings.

FIG. 1 is a block diagram showing the overall system configuration of a data transmission device according to an embodiment of the present invention. In the data transmission device shown in the figure, a plurality of transceivers 3 are connected to a CATV line 1 in a bus-like manner, and a repeater 5 is connected on the CATV line 1 between these transceivers 3.

Each transmitter/receiver 3 is connected to information equipment, etc. via an interface (not shown), and transmission processing fees! A transmission control processing device 7 having II1 function and the transmission control processing device 7 and CA
The transmission control processing device 7 is connected between the TV line 1 and modulates the transmission signal sent out from the transmission control processing device 7 and transmits it to the CATV line 1, or demodulates the signal received from the CATV line 1. It consists of a modem 9 that supplies power to the network.

The repeater 5 is used to change the frequency of the modulated transmission signal from the modem 9, and in some cases further change the modulation method, and retransmit it to the CATV line 1.

FIG. 2 is a block diagram showing the configuration of each transceiver 3 shown in FIG. 1. The transmitter/receiver 3 includes a parallel input/output device 11 connected to an interface of information equipment, a processing device 13 connected to the parallel input/output device 11 and having a processing function, and a buffer device connected to the processing device 13. 15. Connected between the processing device 13 and the modem 9, converting the parallel signal from the processing device 13 into a serial signal and supplying it to the modem 9, converting the serial signal from the modem 9 into a parallel signal and processing it. It is comprised of a parallel/serial converter 17 for supplying data to the bag M13, a C8MΔ/CD channel conflict processing device 19 having a CSMA/CD channel conflict control processing function, and the modem 9.

FIG. 3 is a block diagram showing the configuration of the CSMA/CD channel contention processing device 19 shown in FIG. 2. This CS
The MA/CD channel conflict processing device 19 is supplied with a setting value from the processing bag @ 13, sets a transmission prohibition period corresponding to the setting value, and outputs a transmission enable/disable signal based on the transmission prohibition period. transmission prohibition period setting timer 21, a transmission enable/disable signal from the transmission prohibition period setting timer 21, and a transmission request signal RTS- from the processing device 13.
an AND circuit 29 that takes the AND of the AND circuit, a timing pulse sending circuit 23 that outputs a predetermined timing pulse indicating the end of transmission based on the output signals of the two AND circuits, an output signal from the timing pulse sending circuit 23, and an output of the AND circuit 29. An OR circuit 31 that takes the OR of the signal, a timing pulse detection circuit 25 that detects a predetermined timing pulse indicating the end of transmission from the carrier detection signal CD from the modem 9, and a transmission prohibition period setting timer that uses the set value, that is, the preset value. The preset value setting pulse generator 27 generates a setting pulse for setting the preset value 21.

FIG. 4 shows the timing pulse sending circuit 2 in the CSMA/CD channel contention processing device ff1lQ shown in FIG.
3 is a block diagram showing the circuit configuration of No. 3. FIG.

The timing pulse sending circuit 23 shown in the figure includes a first monostable multivibrator 33 that is triggered by the output signal of the AND circuit 29 and generates an output pulse P11 of a negative level with a constant pulse width; a second monostable multivibrator 35 that is triggered by the output pulse P11 from the monostable multivibrator 33 and generates the predetermined timing pulse P12 indicating the end of transmission described above; The timing pulse P12 and the output signal of the AND circuit 29 are output from the OR circuit 31 as a transmission request signal RTS. Note that the output pulses P11. of the first and second monostable multivibrators 33.35. The pulse width of P12 is determined by the resistor and capacitor connected to each monostable multivibrator, i.e. R33, C33.
and the time constants of R35 and C35, respectively.

FIG. 5 is a block diagram showing the circuit configuration of the transmission prohibition period setting timer 21, timing pulse detection circuit 25, and preset value setting pulse generator 27 in one C3MΔ/CD channel conflict processing device shown in FIG. It is. The circuit shown in the figure includes a third monostable multivibrator 41 that is triggered by a carrier detection signal CD from the modem 9 and outputs an output pulse P20 having a predetermined pulse width;
The output pulse P20 from 1 is supplied to the clock terminal <CK), and the carrier detection signal CD is supplied to the data input terminal (D).
The first D-type flip-flop 43 latches the carrier detection signal CD at the rising edge of the output pulse P20 and outputs the output pulse P21, and the carrier detection signal CD is supplied to the clock terminal, and the carrier detection signal C is supplied to the clock terminal.
A second D-type flip-flop 45 latches the high level supplied to the data input terminal (D) at the rising edge of D and outputs an output pulse P22, and an output pulse P22 of the second D-type flip-flop 45. is supplied to one input, and triggered by the output pulse P21 of the first D-type flip-flop 43 and four AND circuits that gate the clock supplied to the other input, and the output pulse P
23 and clears the second D-type flip-flop 45 with the output pulse P23, and the set value is set by the output pulse P23 of the fourth monostable multivibrator 47. A transmission prohibition I which is preset and counts clocks from the four AND circuits and outputs an output pulse P24 when an overflow occurs after a predetermined transmission prohibition period has elapsed.
The output pulse P24 of the I1 period setting timer 51 and the transmission prohibition period setting timer 51 is supplied to the clock terminal via the inverter 53, and the carrier detection signal CD is supplied to the data input terminal via the inverter 57. The inverted signal of the carrier detection signal CD is latched by the output pulse P24 from the transmission prohibition period setting timer 51, and a transmission enable/disable signal is output. It has a third D-type flip-flop 55 that is cleared by an OR of CD and a transmission request signal RTS. In addition, the third and fourth monostable multivibrators 41.47
The output pulse P20. The pulse width of P23 is determined by the resistors and capacitors connected to each monostable multivibrator, namely R41, C41 and R47, C4.
7 time constants.

Next, the operation will be explained with reference to the timing charts of FIGS. 6 and 7.

First, the timing pulse sending operation by the timing pulse sending circuit 23 shown in FIG. 4 will be explained with reference to FIG.

First, when the transmission request signal RTS' is at a high level as shown in (C) of FIG. The output pulse P10 ((d) in FIG. 6) of the circuit 29 is sent as the transmission request signal RTS via the OR circuit 31 ((d) in FIG. 6).
The signal is output as shown in b), thereby starting transmission, and the carrier detection signal CD also becomes high level. In this transmission state, the first monostable multivibrator 3
The output pulse P11 of No. 3 is at a high level ((e
)), also the second monostable multivibrator 3
The output pulse P12 of 5 is at a low level ((q
)).

When the transmission is completed in this way, first,
The transmission request signal RTS' changes from high level to low level as shown at time t2 in FIG. 6(C), and as a result, the output pulse P10 from the two AND circuits changes to
), the first monostable multivibrator 33 is triggered to 1 at the rising edge of this output pulse P10, and outputs a negative polarity output pulse P11 with a predetermined pulse width. When the output pulse P11 of the monostable multivibrator 33 rises as shown at time t3 in FIG. 6(e), the second monostable multivibrator 35 is triggered at the rising edge, and this The predetermined timing pulse P12 indicating the end of transmission is sent from the monostable multivibrator 35 at the time [g] in FIG.
Output as shown in 3 to t4. The timing pulse P12 indicating the end of transmission is transmitted through the OR circuit 31 as a transmission request signal RTS, and more specifically, as a predetermined timing pulse pt indicating the end of transmission, which is shown as 4 at time 13~ in FIG. 6(b). This will indicate that the transmission has been completed.

Next, refer to the timing chart shown in FIG.
The operation of detecting the timing pulse that reduces the end of transmission in the circuit shown in the figure will be described.

First, when transmitting, the transmission request signal RTS is sent to the seventh
As shown at time t1 in (h) of the figure, it changes to a high level,
As a result, the carrier detection signal CD also becomes high level as shown in FIG. 7(a).

As a result, the third monostable multi-by-break 41 is triggered by the rise of this carrier detection signal CD, and as shown at time t1 in FIG. 7(b), a negative polarity output pulse P20 of a predetermined pulse width is generated. Output.

This output pulse P20 is applied to the first D-type flip-flop 4.
The first D-type flip-flop 43 latches the level of the carrier detection signal CD at time t2 of the rising edge of the output pulse P20, and
As shown in (C) of the figure, a high level output pulse P21 is output.

On the other hand, the carrier detection signal CD is also supplied to the clock terminal of the second D-type flip-flop 45, thereby causing the flip-flop 45 to output a high level signal at time t1 as shown in FIG. 7(d). Generates output signal P22. This high-level output signal P22 gates a clock pulse through an AND circuit 49, and supplies the gated clock pulse to a transmission prohibition period setting timer 51, and the transmission prohibition period setting timer 51 is gated. Start counting clock pulses. In other words, the transmission prohibition period setting timer 51 starts counting while the output pulse P22 from the second D-type flip-flop is at a high level, that is, when the carrier detection signal CD rises.

Furthermore, as described above, the first D-type flip-flop 4
3 becomes a high level at time t2, the fourth monostable multivibrator 47 is triggered by this high level output signal P21, thereby causing the monostable multivibrator 47 to output a negative level output pulse P.
23 is output between times t2 and t3 as shown in FIG. 7(e). This output pulse P23 is the second D
The type flip 70 knob 45 is cleared, thereby stopping the supply of clock pulses to the transmission inhibition period setting timer 51, and presetting the transmission inhibition period setting timer 51.

That is, although the transmission prohibition period setting timer 51 starts counting from time t1 when the carrier detection signal CD rises, the carrier detection signal CD becomes high at a predetermined time measured by the output pulse from the monostable multivibrator 41. If it is at the level, the transmission is in progress and it is not the predetermined timing pulse indicating the end of the transmission.
The D-type flip-flop 45 is cleared by the output of the fourth monostable multivibrator 47, thereby stopping the counting operation of the transmission inhibit period setting timer 51.

When the transmission is completed, the transmission request signal RTS is transmitted as shown in FIG.
), the level becomes low at time t4, and as a result, the carrier detection signal CD also becomes low level, as shown in FIG. 7(a). At this time, the third D-type flip-flop 55 is cleared via the carrier detection signal CD and the transmission request signal RT S b<OR circuit 59, and the transmission enable/disable signal becomes As shown, the signal is set to a low level at time t4, and a transmission prohibition period, which will be described below, is provided after the end of transmission.

That is, when the transmission ends and the carrier detection signal CD becomes low level, the predetermined timing pulse Pt indicating the end of transmission is generated after the carrier detection signal CD becomes low level as shown in FIG. 7(a) as described above. At time t as shown in
5, this timing pulse Pt is supplied as a carrier detection signal CD to the circuit shown in FIG. The period setting timer 51 is supplied to start counting from the rising time t5 of the timing pulse Pt.
The monostable multivibrator 41 is triggered, and the level of the carrier detection signal CD at the rising time t6 of the output pulse P20 of the monostable multivibrator 41 is latched in the first D-type flip-flop 43. As a result, when the level of the carrier detection signal CD is low as after the timing pulse pt in the case of the end of transmission, the output signal P21 of the D-type flip-flop 43 is 11 (level) like t6, the fourth monostable multivibrator 47 is not triggered and its output pulse P23 is not generated. Therefore, when the timing pulse Pt is generated at the end of transmission, the second D-type Since the flip-flop 45 is not cleared, the transmission prohibition period setting timer 51 continues to count clock pulses.

As a result, the transmission prohibition period setting timer 51 performs a counting operation corresponding to a predetermined transmission prohibition period, and when the transmission prohibition period setting timer 51 overflows at time 7, the transmission prohibition period setting timer 51 performs a counting operation corresponding to a predetermined transmission prohibition period.
The output pulse P24 is output at time t7 as shown in FIG. 7(r).

That is, when a predetermined transmission prohibition period elapses from the timing pulse Pt indicating the end of transmission, the output pulse P24
occurs. This output j pulse is supplied to the clock terminal of the third D-type flip-flop 55 via the inverter 53, so that the inverter-type flip-flop 55 outputs the inverted high-level carrier detection signal CD via the inverter 57. is latched through the data input terminal and sent out as a high-level transmission enable signal between times t7 and t8, as shown by ((+)) in FIG.

Note that the above explanation applies when the own transmitter/receiver stops transmitting from the transmitting state, and when the own key 11
The transmission request signal
The operation in which the carrier detection signal CD is a low level and the carrier detection signal CD is a transmission request signal at the end of transmission is shown at time [8 to tlo in FIG. 7]. Also, if a carrier from another transceiver is detected before transmission becomes possible, the carrier detection signal CD
The procedure is the same as that described above from the start of the process.

[Effects of the Invention] As explained above, according to the present invention, at the end of transmission, a predetermined timing signal indicating the end of transmission is sent to the line, the predetermined timing signal is detected, and the detected timing signal is Since a predetermined transmission prohibition period is set based on this, the transmission prohibition period after the end of transmission can be determined without being affected by residual carriers, for example, 1 μs.
Since it can be set to a very small value equal to or less than ec, the time that the transmission path is occupied by channel contention control can be reduced, and the transmission efficiency can be greatly improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the overall system configuration of a data transmission device according to an embodiment of the present invention, and FIG. , FIG. 3 is a block diagram showing the configuration of the C3MA/CD channel contention processing device used in the transmitter/receiver shown in FIG. 2, and FIG. FIG. 5 is a block diagram showing the configuration of the timing pulse sending circuit shown in FIG. 6 is a timing diagram showing the operation of the timing pulse sending circuit shown in FIG. 4, FIG. 7 is a timing diagram showing the operation of the circuit shown in FIG. 5, and FIG. 8 is a block diagram showing the configuration of the pulse generator. FIG. 7 is a diagram illustrating how the time from when the transmission/reception borrow period ends due to [1 of the residual carrier on the transmission path until the reception signal detects the end of transmission differs depending on the reception line. 1... CATV line 3... Transmitter/receiver 7... Transmission control processing device 9... Modem 19... CSMA/CD channel conflict processing device 21
... Transmission prohibition period setting timer 23 ... Timing pulse sending circuit 25 ... Timing pulse detection circuit 27 ... Preset value setting pulse generator 51 ... Timer for setting transmission prohibition period

Claims (1)

[Claims] A data transmission device that connects a plurality of transceivers to a bidirectional CATV line in the form of a bus and transmits data using a CSMA/CD method via a modem, and transmits a predetermined timing signal indicating the end of transmission to the line when the transmission ends. A transmitting means for transmitting a signal, a detecting means for detecting the timing signal from the line, and a setting means for setting a predetermined transmission prohibition period based on the timing signal indicating the end of transmission detected by the detecting means. Characteristic data transmission device.