JPH02119690U - - Google Patents

Info

Publication number
JPH02119690U
JPH02119690U JP2809189U JP2809189U JPH02119690U JP H02119690 U JPH02119690 U JP H02119690U JP 2809189 U JP2809189 U JP 2809189U JP 2809189 U JP2809189 U JP 2809189U JP H02119690 U JPH02119690 U JP H02119690U
Authority
JP
Japan
Prior art keywords
data
scan
bus
line
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2809189U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP2809189U priority Critical patent/JPH02119690U/ja
Publication of JPH02119690U publication Critical patent/JPH02119690U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Liquid Crystal Display Device Control (AREA)
  • Transforming Electric Information Into Light Information (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案のマトリクス表示装置の原理構
成図、第2図は本考案のマトリクス表示装置の一
実施例の全体構成図、第3図は第2図のメモリ制
御回路の動作波形図、第4図は第2図のラインメ
モリの動作波形図、第5図は第2図のシリアル/
パラレル変換回路の動作を示す波形図、第6図は
第2図の走査制御回路の動作波形図、第7図は従
来のマトリクス表示装置の構成図、第8図は第7
図のデータドライバの構成図、第9図は表示容量
の増大に伴うデータ転送速度の変化を示す説明図
である。 1……ラインデータ記憶手段、2……メモリ制
御手段、3……走査制御手段、20……液晶パネ
ル、21……走査バス、22……データバス、2
5……走査ドライバ、26……データドライバ、
27……ライインメモリ、28……シリアル/パ
ラレル変換回路、29……メモリ制御回路、30
……走査制御回路。
FIG. 1 is a diagram of the principle configuration of the matrix display device of the present invention, FIG. 2 is a diagram of the overall configuration of an embodiment of the matrix display device of the present invention, and FIG. 3 is an operational waveform diagram of the memory control circuit of FIG. 2. Figure 4 is an operating waveform diagram of the line memory in Figure 2, and Figure 5 is the serial/operating waveform diagram in Figure 2.
FIG. 6 is a waveform diagram showing the operation of the parallel conversion circuit, FIG. 6 is an operation waveform diagram of the scan control circuit in FIG.
FIG. 9 is a diagram illustrating the configuration of the data driver shown in FIG. 9, and is an explanatory diagram showing changes in data transfer speed as the display capacity increases. DESCRIPTION OF SYMBOLS 1... Line data storage means, 2... Memory control means, 3... Scanning control means, 20... Liquid crystal panel, 21... Scanning bus, 22... Data bus, 2
5...Scan driver, 26...Data driver,
27... Line-in memory, 28... Serial/parallel conversion circuit, 29... Memory control circuit, 30
...Scan control circuit.

Claims (1)

【実用新案登録請求の範囲】 直交して配置された走査バスとデータバスとを
備え、その交点に表示素子を設けた表示パネルを
有するマトリクス表示装置において、 1ライン分の表示データを記憶するラインデー
タ記憶手段1と、周波数で送られてくる1ライ
ン分の表示データをNライン毎に前記記憶手段1
に記憶させ、これを周波数/Nで読み出してデ
ータバスを駆動するデータドライバに転送するメ
モリ制御手段2と、走査バスを駆動する走査ドラ
イバにNライン毎の飛び越し走査を行わせる走査
制御手段3とを設けたことを特徴とするマトリク
ス表示装置。
[Claims for Utility Model Registration] In a matrix display device having a display panel including a scan bus and a data bus arranged orthogonally and a display element provided at the intersection thereof, a line for storing one line of display data. a data storage means 1, and the storage means 1 stores display data for one line sent at a frequency every N lines;
a memory control means 2 for storing the data in the memory, reading it at a frequency/N and transmitting it to a data driver driving a data bus; and a scan control means 3 for causing a scan driver driving a scan bus to perform interlaced scanning every N lines. A matrix display device characterized by being provided with.
JP2809189U 1989-03-14 1989-03-14 Pending JPH02119690U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2809189U JPH02119690U (en) 1989-03-14 1989-03-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2809189U JPH02119690U (en) 1989-03-14 1989-03-14

Publications (1)

Publication Number Publication Date
JPH02119690U true JPH02119690U (en) 1990-09-26

Family

ID=31251162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2809189U Pending JPH02119690U (en) 1989-03-14 1989-03-14

Country Status (1)

Country Link
JP (1) JPH02119690U (en)

Similar Documents

Publication Publication Date Title
ATE154454T1 (en) DISPLAY SYSTEM
JPH02119690U (en)
JPH0275623U (en)
JPS59161224U (en) Vehicle multi switch
JPS63125897U (en)
JPH0210586U (en)
JPS60150593U (en) Flat panel drive device
JPS6360195U (en)
JPS6170892U (en)
JPS6345587U (en)
JPS6343195U (en)
JPS6353126U (en)
JPS5938424U (en) liquid crystal display device
JPH0236435U (en)
JPH01189695A (en) Led display device
JPH0285482U (en)
JPS629233U (en)
JPH0322472U (en)
JPH01164488U (en)
JPH02130028U (en)
JPS5823382U (en) LCD drive circuit
JPH021783U (en)
JPH03104264U (en)
JPS63165694U (en)
JPH02149439U (en)