JPH02114680A - Field effect josephson transistor - Google Patents

Field effect josephson transistor

Info

Publication number
JPH02114680A
JPH02114680A JP63268519A JP26851988A JPH02114680A JP H02114680 A JPH02114680 A JP H02114680A JP 63268519 A JP63268519 A JP 63268519A JP 26851988 A JP26851988 A JP 26851988A JP H02114680 A JPH02114680 A JP H02114680A
Authority
JP
Japan
Prior art keywords
film
tunnel
field effect
gate electrode
josephson
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63268519A
Other languages
Japanese (ja)
Inventor
Seiichi Iwamatsu
誠一 岩松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP63268519A priority Critical patent/JPH02114680A/en
Priority to FR898913548A priority patent/FR2638569B1/en
Priority to US07/423,969 priority patent/US5071832A/en
Publication of JPH02114680A publication Critical patent/JPH02114680A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a field effect transistor suitable for mass production of integrated circuits, by a method wherein a tunnel gap is provided between a source and a drain electrode on the surface of a gate electrode formed on an insulating substrate and a tunnel film is formed in the tunnel gap. CONSTITUTION:In a field effect Josephson transistor, a gate electrode 2 formed of a ceramic superconductor film is built on the surface of an insulating substrate 1 of glass or ceramic. Next, a dielectric film 3 of SiO3, Si2N4, Al2O3, or the like is formed through a CVD method, then a source electrode 4 of a ceramic superconductor film is formed, and an interlaminar insulating film 5 formed of the same material is deposited on the surface. A tunnel film 6 of CVDSiO2, Si3N4, Al2O3, or the like is formed on the side wall of the source electrode 4 above the gate electrode 2, and then a drain electrode 7 of a ceramic superconductor film is formed, with the tunnel film 6 sandwiched between the source and drain electrodes 4 and 7. In result, a field effect Josephson transistor adapted for an integrated circuit can be formed.

Description

【発明の詳細な説明】 〔産業上の利用分野1 本発明は、電界効果型ジョセフソン・トランジスタの構
造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application 1] The present invention relates to the structure of a field-effect Josephson transistor.

〔従来の技術j 従来、ジョセフソン効果を用いたダイオードは有ったが
、トランジスタはなかった。
[Prior art j] Conventionally, there have been diodes that use the Josephson effect, but there have been no transistors.

〔発明が解決しようとする課題1 しかし、上記従来技術によると集積回路化が困難である
という課題があった。
[Problem to be Solved by the Invention 1] However, the above-mentioned conventional technology has a problem in that it is difficult to integrate the circuit into an integrated circuit.

本発明は、かかる従来技術の課題を解決し、ジョセフソ
ン効果を用いた電界効果型トランジスタ構造を提供する
ことを目的とすると共に、該電界効果型ジョセフソン・
トランジスタを集積回路に用いた場合に量産性ある構造
を提供する事も目的とする。
The present invention aims to solve the problems of the prior art and provide a field effect transistor structure using the Josephson effect, and also to provide a field effect transistor structure using the Josephson effect.
Another purpose is to provide a structure that can be mass-produced when transistors are used in integrated circuits.

【課題を解決するための手段l 上記課題を解決するために本発明は電界効果型ジョセフ
ソン・トランジスタに関し、絶縁基板にゲート電極を形
成し、該ゲート電極表面にソース及びドレイン電極のト
ンネルギャップを設け、該トンネルギャップ内にトンネ
ル膜を形成する手段をとる。
[Means for Solving the Problems] In order to solve the above problems, the present invention relates to a field-effect Josephson transistor, in which a gate electrode is formed on an insulating substrate, and tunnel gaps for source and drain electrodes are formed on the surface of the gate electrode. A means is provided to form a tunnel film within the tunnel gap.

〔実 施 例] 以下、実施例により、本発明を詳述する。〔Example] Hereinafter, the present invention will be explained in detail with reference to Examples.

第1図は本発明の一実施例を示す電界効果型ジョセフソ
ン・トランジスタの断面図である。すなわち、ガラスあ
るいはセラミック等から成る絶縁基板1の表面にY+ 
Bag Cus Ot等のセラミック系超電導体膜から
成るゲート電極2を形成し、次でCVD法により、5i
ns 、Sis N4あるいはAlton等から成る誘
電体1II3を形成し1次でセラミック系超電導体膜か
ら成るソース電極4を形成し、該ソース電極4の表面に
は、CVD  S 10 m 、51 * Naあ4い
は、AlzOlから成る層間絶縁膜5を形成し、前記ソ
ース電極4の前記ゲート電極2上の側壁には、CVD5
ift 、Sis N4あるいは、Alton等から成
る2mm厚さ程度のトンネル膜6を形成し。
FIG. 1 is a sectional view of a field effect type Josephson transistor showing one embodiment of the present invention. That is, Y+ is formed on the surface of the insulating substrate 1 made of glass or ceramic.
A gate electrode 2 made of a ceramic superconductor film such as Bag Cus Ot is formed, and then a 5i film is formed by CVD.
A dielectric material 1II3 made of ns, Sis N4, Alton, etc. is formed, and a source electrode 4 made of a ceramic superconductor film is formed as a primary layer. 4, an interlayer insulating film 5 made of AlzOl is formed, and a side wall of the source electrode 4 on the gate electrode 2 is coated with CVD 5.
A tunnel film 6 made of ift, Sis N4, Alton, etc. and having a thickness of about 2 mm is formed.

次でセラミック系超電導体膜から成るドレイン電極7を
前記トンネル膜6をソース電極4との間にはさむ様な形
で形成して成る。
Next, a drain electrode 7 made of a ceramic superconductor film is formed such that the tunnel film 6 is sandwiched between the source electrode 4 and the drain electrode 7 .

〔発明の効果] 本発明により量産性のある、集積回路に向いた電界効果
型ジョセフソン・トランジスタが形成できる効果がある
[Effects of the Invention] The present invention has the advantage that a field-effect Josephson transistor that can be mass-produced and is suitable for integrated circuits can be formed.

第1図は本発明の一実施例を示す電界効果型ジョセフソ
ン・トランジスタの断面図である8絶縁基板 ゲート電極 誘電体膜 ソース電極 層間絶縁膜 トンネル膜 ドレイン電極 出願人 セイコーエプソン株式会社 代理人 弁理士 上 柳 雅 誉(他1名)
FIG. 1 is a cross-sectional view of a field-effect Josephson transistor showing an embodiment of the present invention.8 Insulating substrate Gate electrode Dielectric film Source electrode Interlayer insulating film Tunnel film Drain electrode Applicant Seiko Epson Corporation Agent Patent attorney Masataka Kamiyanagi (1 other person)

【図面の簡単な説明】[Brief explanation of the drawing]

Claims (1)

【特許請求の範囲】[Claims] 絶縁基板上には、ゲート電極が形成され、該ゲート電極
表面にはソース及びドレイン電極の、トンネルギャップ
が設けられ、該トンネルギャップ内はトンネル膜が形成
されて成る事を特徴とする電界効果型ジョセフソン・ト
ランジスタ。
A field effect type characterized in that a gate electrode is formed on an insulating substrate, a tunnel gap for source and drain electrodes is provided on the surface of the gate electrode, and a tunnel film is formed within the tunnel gap. Josephson transistor.
JP63268519A 1988-10-25 1988-10-25 Field effect josephson transistor Pending JPH02114680A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP63268519A JPH02114680A (en) 1988-10-25 1988-10-25 Field effect josephson transistor
FR898913548A FR2638569B1 (en) 1988-10-25 1989-10-17 JOSEPHSON FIELD-EFFECT TYPE TRANSISTOR AND METHOD FOR MANUFACTURING A JOSEPHSON JUNCTION
US07/423,969 US5071832A (en) 1988-10-25 1989-10-19 Field effect type josephson transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63268519A JPH02114680A (en) 1988-10-25 1988-10-25 Field effect josephson transistor

Publications (1)

Publication Number Publication Date
JPH02114680A true JPH02114680A (en) 1990-04-26

Family

ID=17459645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63268519A Pending JPH02114680A (en) 1988-10-25 1988-10-25 Field effect josephson transistor

Country Status (1)

Country Link
JP (1) JPH02114680A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10506670B2 (en) 2011-04-25 2019-12-10 Graphic Packaging International, Llc Microwave energy interactive pouches

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10506670B2 (en) 2011-04-25 2019-12-10 Graphic Packaging International, Llc Microwave energy interactive pouches

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