JPH021123A - Method of quick nitrizing for forming oxynitride for boundary sealed during insolating oxidization - Google Patents

Abstract

PURPOSE: To minimize bird's beak effect by starting the quick thermal nitridation of a thin silicon dioxide layer on a single-crystal silicon substrate, generating a transient temperature gradient of silicon dioxide in a high- temperature cycle, and generating an oxide-oxynitride compound slope. CONSTITUTION: A short-period thermal nitriding process generates a temperature gradient through a pad oxide 2 and a silicon substrate 1 to generate a slope of a compound of the oxide and oxynitride 6. Further, the quick thermal nitriding transform the pad oxide layer into slanting oxynitride 6 by the silicon substrate 1 without receiving high temperature for an extended period. The nitride layer 6 is transformed from an LPCVD silicon nitride layer 4 and then a pattern of mask photoresist is formed to perform anisotropic etching so that the LPCVD nitride 4, oxynitride layer 6, and silicon substrate 1 are selectively removed. A recessed part 8 is formed in the substrate 1 by etching and the outward appearance of a field oxide 9 which is flat and large and has no bird's beak characteristics is formed. Consequently, the bird's beak suppression is greatly improved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention This invention relates to a method of forming integrated circuit electronic devices, and more particularly to oxidizing a silicon-based substrate to form recessed regions of silicon dioxide dielectric, commonly known as field oxidation regions. Background Art: During the thermal oxidation process in which the field oxide is formed, the active areas of the substrate are conventionally masked with a fairly thick layer of silicon nitride. Field oxide erosion of the layers below the mask nitride layer, commonly referred to as parts beak, proportionally reduces the available active area. Reducing or eliminating this parts beak is a common goal in the industry because of its direct impact on the available active area.

Researchers seeking to eliminate parts beaks have found that the primary contributor to part beak formation is a fairly thin silicon dioxide layer traditionally placed between the masking silicon nitride layer and the silicon substrate. The purpose of this silicon dioxide layer is to avoid tension that would otherwise occur at the bond between the silicon substrate and the silicon nitride layer and cause crystal defects in the active areas of the silicon substrate. Therefore, based on the recognition that the buffer oxide layer is the dominant cause of purge beak formation, many people are moving towards omitting the use of a buffer layer without creating crystal defects. For example, U.S. Patent No. 4.331,71
No. 0 discloses direct thermal nitridation of silicon substrates. U.S. Pat. No. 4,575,921 teaches the use of nitrogen ion milling to implant nitrogen species directly into a substrate surface to convert that surface into a nitride compound mask layer. Recently, thinner layers and masks for the buffer layer have been used to prevent oxygen from penetrating beneath the mask nitride layer, including a variety of somewhat finer sidewall nitride mask techniques. Use with thicker layers of layer dams has been proposed.

The paper “Selective oxidation technology for high-density MO8” (IEEE Electron Dev
iceLetters+ Vol, EDL-2+ 1
(October 981) forms the basis of most of the more recent work directed towards the interface between the mask nitride layer and the silicon substrate. Among the possible buffer layers H
Ut et al. evaluated a thinly grown oxynitride film and an oxynitride film formed by an anti-Sr nitride oxide layer to buffer the strains associated with the mask nitride layer. The most promising buffer layer considered by Hut et al. is a nitride implant mask layer, LPCVD.
These are a nitride mask layer and a plasma nitride mask layer, and these are intended to minimize part beak without causing crystal defects in the substrate. The use of reactor grown or converted oxynitrides as a slow S layer was considered;
It was discarded as having little potential for Parts Beak removal.

Recent work also discloses general and special rapid thermal annealing in oxide nitridation.

Rapid thermal anneal according to current best knowledge is used for nitriding the dirt oxide layer. It can be seen in paper 6, ``Interfacial states and fixed charges in nanometer-range thin nitrided oxides made by rapid thermal annealing'' by Hori et al. (IEEE Electron
Device Letters + December 1986
Month).

[Problems to be solved by this invention] However,
This paper is directed to the exploration of nitridation methods for the formation of reliable dart insulating materials when such dielectrics are used at thicknesses in the 5-12 nanometer range. However, the purpose of this invention is not achieved.

The purpose of this invention is to minimize the parts beak effect.
It is an object of the present invention to provide a method for sealing an interface between a single crystal silicon substrate and a patterned field oxide mask layer of silicon nitride or the like. This method can be implemented in the context of a commonly used silicon field oxide formation local oxidation method or in a shield interface local oxidation method with other methods with minimal manufacturing sequence refinement.

[Means to solve the problem]

Therefore, the present invention solves the above problems as follows.

A preferred embodiment of the invention includes a radiant (or radiation) source rapid thermal anneal operation in an ammonia or nitrogen environment to cause rapid thermal nitridation of a thin silicon dioxide layer disposed on a single crystal silicon substrate. Depending on the duration and height of the high-temperature cycle, a transient temperature gradient of the silicon dioxide is created, which creates an oxide-oxynitride compound gradient for a certain final structure, resulting in a redispersion effect of the substrate dopants. Minimize. Conversion of the thin Noxod silicon dioxide layer to a compound layer buffers the difference in coefficient of thermal expansion between the silicon nitride mask layer and the silicon substrate, while also preventing the diffusion of oxygen species during subsequent field oxide growth operations. This will eliminate most of the road.

Following rapid thermal nitridation, the pad oxynitride layer is treated with low pressure chemical vapor deposition (LPGVD) before being subjected to a mask and i4 turn etch of the top layer on the silicon substrate in preparation for field oxide growth. covered by a nitride layer and other desired layers.

〔Example〕

Next, the present invention will be explained in detail by means of a pair of embodiments. That is, the oxynitride layer formed by rapid thermal nitridation of a thin oxide layer exhibits a compound gradient, thereby retaining the coefficient of thermal expansion buffering properties normally provided by oxidized oxides, while retaining the thermal expansion coefficient buffering properties normally provided by oxidized oxides. Preventing lateral diffusion of undesirable oxygen species. As a result, damage to the silicon substrate surface and formation of parts beaks are prevented. Moreover, this method can be incorporated into LOCOS or 5ILO type field oxide fabrication sequences without temperature/time sensitive substrate dopant redispersion effects and with only one additional fabrication step requiring minimal additional fabrication time. Moreover, the erosion, i.e., the ratio between the part beak length and the field oxide thickness, was evaluated by the aforementioned paper by Hui et al. and compared to that in the discarded type oxynitride-Grad formation. It should be noted that there have been considerable improvements.

A first embodiment is shown in FIGS. 1A-5A, sequence "A" for manufacturing field oxide regions according to the LOGO8 technique. A second embodiment is shown in the B'' sequence, which is a method of forming field oxide according to the 5ILO technique shown in FIGS. 1B-5B.

In the LOCO8 technique, starting from FIG. 1A, a relatively thin silicon dioxide layer 2, preferably 13-15 nanometers thick, is formed on a single crystal silicon substrate 1, preferably by thermal oxidation. The thin oxide layer 2 is a conventional node or buffer layer that isolates the surface 3 of the silicon substrate 1 from stresses that would otherwise be induced from the silicon nitride layer 4 (FIG. 3A). Low pressure chemical vapor deposition (LPGVD) of a silicon nitride layer 4 on the surface 3 of the silicon substrate 1
direct formation of the silicon substrate results in crystalline dislocation lines of sufficient nature to degrade the performance of the active region formed in the silicon substrate. The actual contribution to stress varies with the coefficient of thermal expansion. On the other hand, if the pad oxide 2 is contained between the nitride layer and the substrate layer, the amount of the pad oxide 2 will be 0.3 to 0.
Erosion rates in the range of .4 will cause diffusion of oxygen species along the oxide to the region beneath the masking LPGVD nitride layer of sufficient nature and extent to cause part peak growth.

The next synthesis process shown in Figure 2A is generally called rapid thermal nitridation.
It involves the introduction of a rapid thermal anneal operation in ammonia to convert the pad oxide 2 into an oxynitride layer 6. The short term thermal nitridation process creates a temperature gradient through the pad oxide 2 and silicon substrate 1, resulting in a gradient of the oxide and oxynitride composite.

In the thickness of the oxide 2, the nitrogen density is greatest at the interface where the oxide 2 meets the silicon substrate 1.

Nitrogen is collected at the interface by the bond mismatch strain introduced into oxide 2, and the stress increases the atomic space available for nitrogen. A thicker oxide layer 2 will normally have a higher concentration of nitrogen both at the interface and at the outer surface 5 of its silicon substrate 1. Thin oxide layer 2, e.g. l Q nma or less oxide 10
will be relatively homogeneous after rapid thermal nitridation of the type described in 22.

Rapid thermal nitridation is performed using a tungsten-halogen nitriding system configured to generate a temperature of approximately 1150°C at the surface 5 for 180 seconds.
This is done using a Lang radiant energy source. Thermal cycling takes place in pure ammonia at atmospheric pressure. Such rapid thermal nitridation would convert the nocted oxide layer 2 to a graded oxynitride 6 without subjecting the silicon substrate 1 to higher temperatures for an extended period of time.

Following the rapid thermal nitridation of FIG. 2A, the nitride layer 6 is converted from the LPGVD silicon nitride layer 4 deposited to a nominal 100 nanometer thickness. After that, some LOCO
8. Maintaining the manufacturing method, the structure of FIG. 3A is processed in a photographic manner to form the mask photoresist turns and sequentially deposit the LPGVD nitride 4, oxynitride layer 6 and silicon substrate 1. It is subjected to an anisotropic etch to selectively remove a nominal 30 nanometers. By etching the substrate 1, a recess 8 as shown in FIG. 4A is formed. Preferably, this etching process is performed using modern reactive ion etching equipment;
This ensures the formation of roughly vertical walls of the recess.

For example, the etching can be accomplished by RF driven plasma etching using CHF3102 gas at a pressure of about 25 mTorr.

A field oxide growth operation follows, which is about 45
Preferably, the oxidation is carried out in wet oxidation at a temperature of 950° C. for 1 minute. After that, LPCVD using conventional method
Removal of the nitride 4 and oxynitride 6 layers is performed. It is CHF3102 or 10: I NH4F
: H3PO boiled with HF wet etching agent
4 acid or RIE 7' lasma etchant to form a field oxide 9 profile that is fairly flat and free of large barge beak characteristics, as shown in FIG. 5A. A nominally 700 nanometer thick field oxide was formed and the erosion, ie, barge beak length to field oxide layer ratio, was found to be nominally 0.1 for sequence "A". - The gradient layer separation or buffer ensures the contribution of the oxynitride 6 and the active area surface 11 of the substrate 1, as described above.
High performance active field effect or bipolar devices can now be achieved without dislocations occurring in the emphasized submicron range now required.

It should be particularly noted that significant part beak suppression improvements were obtained by including a single step with distinct conditions in the manufacturing sequence with selected combinations of rapid thermal nitriding conditions.

Another embodiment is shown in the figure as a "B" sequence.
5ILO process is used to form the field oxide. Its manufacture begins in FIG. 1B, where the silicon substrate l has a very thin silicon dioxide layer thereon. The natural oxide layer 21 is nominally 1-3 nanometers thick and, as its name suggests, may be formed by simple oxidation of the silicon substrate or by natural formation. A rapid thermal anneal of nitrogen or ammonia at atmospheric pressure (shown in Figure 2B) transforms the native oxide 21 into a thin oxynitride layer 2.
Convert to 2.

This rapid thermal nitridation is performed while the chamber is flowing approximately 1.4 liters/min of nitrogen or ammonia gas at atmospheric pressure.
Preferably, this is done using a tungsten-halogen lamp operated to apply a temperature of about 1150 DEG C. to the oxide 21 surface for about 40 seconds.

The oxynitride layer 22 remains at its original thickness of 1-3 nanometers.

Following rapid thermal nitridation, this fabrication sequence follows a typical 5ILO process to deposit a nominally 15-18 nanometer thick LPGVD nitrided silinitride layer 93 followed by a nominal 35-40 nanometer thick
Nanometer thick plasma CVD or low temperature oxide (L
Form a LPCVD silicon nitride silicon nitride full layer 26 with a nominal 100 nanometer thickness.

The composite structure of FIG. 3B is preferably photolithographically processed using a photoresist by the methods described above, such as active ion etching, and the entire fourth
The field oxide region of silicon substrate 1 is exposed as shown in Figure B. The silicon substrate 1 is again grooved nominally 30 nanometers below its surface 3. Also, reactive
As is the nature of ion etching, the walls of successive layers 22, 23, 24, 26, like 27 of silicon substrate 1, are generally vertical.

Still following the 5ILO process, the silicon substrate 1 of FIG. 4B is then subjected to oxidation in a wet oxygen atmosphere at a temperature of about 950° C. for about 450 minutes to form a field oxide region 28 (FIG. 5B) nominally about 700 nanometers thick. ) to form. LPCV
The relatively thin multilayer of D-nitrides 23, 26 suppresses lifting of the synthetic mask layer during oxidation and is sufficiently stiff to limit any part beak effects as shown in FIG. 5B. Again, the effective absence of part beaks can essentially contribute to the forced suppression of the diffusion of any oxygen species along the layer 22 of FIG.

FIG. 5B is a cross-sectional view of a typical field oxide region 28, which includes mask layers 22, 23.

24, 261r is shown after the entire surface 29 of the active region of the silicon substrate 1 is exposed by removal using the conventional method.

According to the padding/buffering effect of the thin oxynitride layer 22, damage to the silicon substrate surface 29 is eliminated. The very thin oxynitride layer 22 is the LPCVD nitride layer 2
The thickness is sufficient to absorb the impact caused by the difference in thermal expansion coefficient between the silicon substrate 1 and the silicon substrate 1. Thick LPCVD nitride layer 26 is similarly buffered by oxide layer 24. Field oxide encroachment into the active area is effectively negligible following this processing sequence. but,
When compared, given the relative steepness of field oxide 28 immediately adjacent active area surface 29, field oxide 28 is similar to field oxide 9 (L in FIG. 5A).
It is clear that it is not as flat as the OCOS sequence).

Once again, we should pay attention to the unusual degree of suppression of parts beak.

The temperature and time conditions for performing radiant energy rapid thermal nitridation should not be limited to those used in the above examples. For example, for very thin oxides it is possible to use a furnace temperature of about 1250° C. and a short period of about 10 seconds. At the other extreme, temperatures of approximately 900°C for periods of up to 30 minutes due to the relatively thick z/buffer oxide
A range of surface temperatures can be used. The exact combination of conditions should be selected as follows.

That is, it is believed that a short duration, high intensity radiant energy source directed at the outer surface of the oxide layer 3 or 21 creates a transient temperature gradient with a stress gradient that facilitates nitridation of the exposed oxide.

These conditions are in clear contrast to the time required for furnace nitriding, where the lamp temperature is ramped up and down over a period of 2-3 hours. Additionally, the furnace or convection thermal conditions of the substrate, even with pre-cleaning of the chamber, include considerably long lamp rise times, low temperatures at the onset of oxidation versus nitridation, oxygen species naturally available from water, and pre-absorption into the silicon substrate. Due to the oxygen species present, it undergoes undesirable oxidation.

Rapid thermal nitridation of a thin silicon dioxide grad/buffer layer inhibits lateral diffusion of oxygen species during field oxide formation while maintaining a buffer or gradation effect compared to native silicon dioxide. There is no doubt among those skilled in the art that such techniques are commonly used in a variety of semiconductor manufacturing processes using silicon substrates, including crystalline or amorphous silicon.

[Brief explanation of the drawing]

1A to 5A are simplified cross-sectional views showing the sequence of manufacturing silicon local oxidation (LOCO8) according to the present invention, and FIGS. 1B to 5B are shield interface local oxidation (LOCO8)
FIG. 2 is a simplified cross-sectional view of the present invention showing the front and back relationship of the FF construction sequence. In the figure, 1... silicon substrate, 2... pad oxide,
4, 23-LPGVD nitride, 6, 22-O*cinitride, 21... natural oxide. Application agent Isao Saito FIG, IA FIG, IB FIG, 4A FIG, 4B FIG, 2A FIG, 2B FIG, 5A FIG, 5B FIG, 3A FIG, 3B

Claims (10)

[Claims] (1) A method for forming a pad or buffer layer between silicon nitride and a silicon nitride-based oxide mask layer, the method comprising forming a thin silicon dioxide layer on a silicon substrate, and providing a nitriding environment around the silicon dioxide layer. and applying a radiant energy source to the silicon dioxide of an intensity suitable for nitriding the silicon dioxide to generate a transient thermal gradient through the silicon dioxide layer. Method. (2) The intensity of the radiant energy source is 900 to 1150°C
2. The method of claim 1, wherein the silicon dioxide surface temperature varies from . (3) The period of application to the radiant energy source is 10 to 180
3. The method of claim 2, wherein the time varies from 0 seconds. (4) The method according to claim 2, wherein the nitriding environment is ammonia or nitriding gas. (5) The method according to claim 3, wherein the nitriding environment is ammonia or nitriding gas. (6) Forming a thin silicon dioxide layer on a silicon substrate, providing a nitride environment to the silicon dioxide layer, and applying a radiant energy source of an intensity suitable for nitriding the silicon dioxide to the silicon dioxide; generating a transient thermal gradient through the silicon layer and depositing silicon nitride on the nitrided silicon dioxide layer;
forming a based oxide mask layer, etching the silicon nitride based oxide mask layer and the nitrided silicon dioxide layer to selectively expose regions of the silicon substrate, and etching the exposed silicon substrate in the presence of an overlying layer; A method of forming field oxide regions in a silicon semiconductor substrate including steps of oxidizing. 7. The method of claim 6, wherein the etching operation continues to form a recess in the silicon substrate. (8) The intensity of the radiant energy source is 900 to 1250°C
7. The method of claim 6, wherein the silicon dioxide surface temperature varies from . (9) Forming a very thin first silicon dioxide layer on a silicon substrate, providing a nitriding environment to the first silicon dioxide layer, and providing a nitriding environment suitable for nitriding silicon dioxide to the first silicon dioxide. applying a high intensity radiant energy source to generate a transient thermal gradient through the first silicon dioxide layer, forming a first silicon nitride based oxide mask layer over the nitrided first silicon dioxide layer; forming a second silicon nitride based oxide masking layer over the first silicon nitride oxide masking layer; forming a second silicon nitride based oxide masking layer over the second silicon dioxide layer; silicon·
A method of forming a field oxide on a silicon semiconductor substrate comprising: etching a base and silicon dioxide layer to expose selective areas of the silicon substrate; and oxidizing the exposed silicon substrate in the presence of an overlying layer. 10. The method of claim 9, wherein the etching operation continues to form a recess in the silicon substrate.