JPH02104376U - - Google Patents

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Publication number
JPH02104376U
JPH02104376U JP4895588U JP4895588U JPH02104376U JP H02104376 U JPH02104376 U JP H02104376U JP 4895588 U JP4895588 U JP 4895588U JP 4895588 U JP4895588 U JP 4895588U JP H02104376 U JPH02104376 U JP H02104376U
Authority
JP
Japan
Prior art keywords
electronic circuit
view
terminal receiving
perspective
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4895588U
Other languages
Japanese (ja)
Other versions
JP2580784Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988048955U priority Critical patent/JP2580784Y2/en
Publication of JPH02104376U publication Critical patent/JPH02104376U/ja
Application granted granted Critical
Publication of JP2580784Y2 publication Critical patent/JP2580784Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本考案に於ける電子回路実験装置の
実施例である。第1図aは単位ブロツク1の斜視
図。(図において、端子受けソケツトが9個取り
付けた場合の例を示している。)第1図bは電子
回路実験装置の単位ブロツクを敷きつめた図であ
る。第2図は、単位ブロツク1の端子孔内に収め
る端子受けソケツト3の図であり、第2図aは端
子受けソケツトの斜視図、第2図bは断面図を示
す。第3図は、単位ブロツク1内に収め、単位ブ
ロツク1を構成する端子受けソケツトどうしの導
通を保つための伝導板8の斜視図である。第4図
は、電子回路実験装置に用いる付属品の例で第4
図aは直線状に並んだ複数個の単位ブロツクを同
電位とするためのアースライン9の斜視図である
。第5図は、ソケツト状ヘツド部分を示す斜視図
である。第6図は、従来型の電子回路実験装置の
例で、第6図aは電子部品を収めたキユーブ型ブ
ロツク、第6図bはキユーブ型ブロツク14を用
いた従来型の電子回路実験装置の使用例を示す。 1……単位ブロツク。2……側枠。3……端子
受けソケツト。4a……突起。4b……くぼみ。
5……底板。7……繋ぎ手。8……導電板。9…
…アースライン。10……接続端子。12……ピ
ン状部分。13……ソケツト状ヘツド部分。14
……キユーブ型ブロツク。15……ブロツク上蓋
。17a,17b,17c,17d……端子。3
1……へこみ。
FIG. 1 shows an embodiment of an electronic circuit experimental apparatus according to the present invention. FIG. 1a is a perspective view of the unit block 1. (The figure shows an example in which nine terminal receiving sockets are attached.) FIG. 1b is a diagram showing unit blocks of an electronic circuit experimental apparatus laid out. FIG. 2 is a view of the terminal receiving socket 3 to be accommodated in the terminal hole of the unit block 1, FIG. 2a is a perspective view of the terminal receiving socket, and FIG. 2b is a sectional view. FIG. 3 is a perspective view of a conductive plate 8 which is housed in the unit block 1 and is used to maintain conduction between the terminal receiving sockets constituting the unit block 1. Figure 4 shows an example of accessories used for electronic circuit experiment equipment.
Figure a is a perspective view of a ground line 9 for making a plurality of unit blocks arranged in a straight line have the same potential. FIG. 5 is a perspective view of the socket-shaped head portion. FIG. 6 shows an example of a conventional electronic circuit experimental device, in which FIG. 6a shows a cube-shaped block containing electronic components, and FIG. An example of usage is shown. 1...Unit block. 2...Side frame. 3...Terminal receiving socket. 4a... Protrusion. 4b... hollow.
5...Bottom plate. 7...Connector. 8... Conductive plate. 9...
...Earth line. 10... Connection terminal. 12...Pin-shaped part. 13...Socket-shaped head part. 14
... Cube type block. 15...Block top lid. 17a, 17b, 17c, 17d...terminals. 3
1...dent.

補正 平2.2.21 図面の簡単な説明を次のように補正する。 明細書の第11頁第18行目ないし第19行目
、第12頁第1行目ないし第5行目に、「第3図
は、単位ブロツク1内に収め、単位ブロツク1を
構成する端子受けソケツトどうしの導通を保つた
めの伝導板8の斜視図である。第4図は、電子回
路実験装置に用いる付属品の例で第4図aは直線
状に並んだ複数個の単位ブロツクを同電位とする
ためのアースライン9の斜視図である。」とある
のを削除する。 明細書の第12頁第6行目に、「第5図は、」
とあるのを、「第3図は、」と補正する。 明細書の第12頁第8行目に、「第6図は、」
とあるのを、「第4図は、」と補正する。 明細書の第12頁第9行目に、「第6図aは、
」とあるのを、「第4図aは、」と補正する。 明細書の第12頁第10行目に、「第6図bは
、」とあるのを、「第4図bは、」と補正する。
Amendment 2.2.21. The brief description of the drawing is amended as follows. In the specification, page 11, lines 18 to 19, page 12, lines 1 to 5, it is stated that ``Figure 3 shows the terminals contained in unit block 1 and constituting unit block 1. FIG. 4 is a perspective view of a conductive plate 8 for maintaining conduction between receiving sockets. FIG. 4 is an example of an accessory used in an electronic circuit experimental device, and FIG. This is a perspective view of the ground line 9 for making the potential the same.'' has been deleted. On page 12, line 6 of the specification, "Figure 5 is..."
The statement "Figure 3 is..." is corrected. On page 12, line 8 of the specification, "Figure 6 is..."
The statement "Figure 4 is shown" is corrected. On page 12, line 9 of the specification, it is stated that ``Figure 6 a is
'' should be corrected to ``Figure 4 a is''. In the 10th line of page 12 of the specification, the phrase ``FIG. 6b is'' has been amended to ``FIG. 4b is''.

Claims (1)

【実用新案登録請求の範囲】 1 電気絶縁材料により包まれ複数個の電気的に
接続した端子受けソケツトを持つ相似形の立方体
状ブロツクを縦横に多数個並べて構成したことを
特徴とする電子回路実験装置。 2 端子孔内部にばね構造と繋ぎ手を持つ端子受
けソケツトとしたことを特徴とする請求項1記載
実用新案登録請求の範囲の電子回路実験装置。
[Claims for Utility Model Registration] 1. An electronic circuit experiment characterized in that it is constructed by arranging a large number of cubic blocks of similar shapes, which are wrapped in electrically insulating material and have a plurality of electrically connected terminal receiving sockets, arranged vertically and horizontally. Device. 2. The electronic circuit experiment device as claimed in claim 1, characterized in that the terminal receiving socket has a spring structure and a connector inside the terminal hole.
JP1988048955U 1988-04-11 1988-04-11 Electronic circuit experiment equipment Expired - Lifetime JP2580784Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988048955U JP2580784Y2 (en) 1988-04-11 1988-04-11 Electronic circuit experiment equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988048955U JP2580784Y2 (en) 1988-04-11 1988-04-11 Electronic circuit experiment equipment

Publications (2)

Publication Number Publication Date
JPH02104376U true JPH02104376U (en) 1990-08-20
JP2580784Y2 JP2580784Y2 (en) 1998-09-17

Family

ID=31275079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988048955U Expired - Lifetime JP2580784Y2 (en) 1988-04-11 1988-04-11 Electronic circuit experiment equipment

Country Status (1)

Country Link
JP (1) JP2580784Y2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001097333A1 (en) * 2000-06-14 2001-12-20 Chul Park Connector and substrate for electronic circuit fabrication
KR20030057756A (en) * 2001-12-29 2003-07-07 주식회사 이지서킷 Brick frame for supporting electronic circuits, which having brick-toy connecting means on one side, and brick toy using the same
JP2004317601A (en) * 2003-04-14 2004-11-11 Matsusada Precision Kk Electronic circuit learning device
JP2016051717A (en) * 2014-08-28 2016-04-11 電子ブロック機器製造株式会社 Electronic block, and method of manufacturing circuit board for use in electronic block

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4712117U (en) * 1971-03-15 1972-10-13
JPS4727889U (en) * 1971-04-14 1972-11-29

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4712117U (en) * 1971-03-15 1972-10-13
JPS4727889U (en) * 1971-04-14 1972-11-29

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001097333A1 (en) * 2000-06-14 2001-12-20 Chul Park Connector and substrate for electronic circuit fabrication
KR20030057756A (en) * 2001-12-29 2003-07-07 주식회사 이지서킷 Brick frame for supporting electronic circuits, which having brick-toy connecting means on one side, and brick toy using the same
JP2004317601A (en) * 2003-04-14 2004-11-11 Matsusada Precision Kk Electronic circuit learning device
JP2016051717A (en) * 2014-08-28 2016-04-11 電子ブロック機器製造株式会社 Electronic block, and method of manufacturing circuit board for use in electronic block

Also Published As

Publication number Publication date
JP2580784Y2 (en) 1998-09-17

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