JPH0198231A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0198231A JPH0198231A JP62256102A JP25610287A JPH0198231A JP H0198231 A JPH0198231 A JP H0198231A JP 62256102 A JP62256102 A JP 62256102A JP 25610287 A JP25610287 A JP 25610287A JP H0198231 A JPH0198231 A JP H0198231A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- silicon nitride
- nitride film
- molding resin
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 14
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 16
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 16
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 8
- 239000007864 aqueous solution Substances 0.000 claims abstract description 4
- 238000005530 etching Methods 0.000 claims abstract description 4
- 238000002161 passivation Methods 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 4
- 238000007740 vapor deposition Methods 0.000 claims description 2
- NLXLAEXVIDQMFP-UHFFFAOYSA-N Ammonia chloride Chemical compound [NH4+].[Cl-] NLXLAEXVIDQMFP-UHFFFAOYSA-N 0.000 claims 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 claims 1
- 235000019270 ammonium chloride Nutrition 0.000 claims 1
- 239000000243 solution Substances 0.000 claims 1
- 239000011347 resin Substances 0.000 abstract description 15
- 229920005989 resin Polymers 0.000 abstract description 15
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 abstract description 8
- 238000000465 moulding Methods 0.000 abstract description 8
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 abstract description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract description 3
- 229910021529 ammonia Inorganic materials 0.000 abstract description 2
- 230000006866 deterioration Effects 0.000 abstract description 2
- 239000007789 gas Substances 0.000 abstract description 2
- 229910000069 nitrogen hydride Inorganic materials 0.000 abstract description 2
- 239000002994 raw material Substances 0.000 abstract description 2
- 229910052710 silicon Inorganic materials 0.000 abstract description 2
- 239000010703 silicon Substances 0.000 abstract description 2
- 229910020776 SixNy Inorganic materials 0.000 abstract 1
- 230000001070 adhesive effect Effects 0.000 abstract 1
- 239000007788 liquid Substances 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 239000000203 mixture Substances 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
Landscapes
- Weting (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体チップ表面を保護するためのパ、7シベ
ーシヨンについて改良した半導体装Wに関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device W improved in terms of protection for protecting the surface of a semiconductor chip.
(従来の技術〕
従来、半導体装置のチップは最外面保護のために例えば
プラズマ窒化シリコンによるパッシベーション膜が施さ
れている。(Prior Art) Conventionally, a passivation film made of plasma silicon nitride, for example, is applied to a chip of a semiconductor device to protect the outermost surface.
ところが、従来のプラズマ窒化シリコン膜は、モールド
樹脂との密着性が良く、また、樹脂に発生する応力をチ
ップに伝達し易い硬度を有しているため、チップがモー
ルド樹脂を介して外乱の影響を受は易く、その特性が変
動したり劣化する等の虞れがあっり。また、その膜は硬
度的に弱く、樹脂モールドアセンブリ後にクラック等が
発生し易かった。さらに、膜に含有されている多量の水
素がチップに対しその界面において種々作用してチップ
の特性を変動させる問題もあった。よって、従来のプラ
ズマ窒化シリコン膜では充分にチップを保護することが
困難であった。However, the conventional plasma silicon nitride film has good adhesion with the mold resin and has a hardness that easily transmits the stress generated in the resin to the chip, so the chip is easily affected by external disturbances through the mold resin. There is a risk that its characteristics may change or deteriorate. In addition, the film was weak in hardness, and cracks were likely to occur after resin mold assembly. Furthermore, there is also the problem that a large amount of hydrogen contained in the film acts on the chip in various ways at its interface, causing variations in the characteristics of the chip. Therefore, it has been difficult to sufficiently protect the chip with the conventional plasma silicon nitride film.
本発明はこのような事情に鑑みてなされたもので、上記
の問題を解消したプラズマ窒化シリコン膜でチップを保
護した半導体装置を提供することである。The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a semiconductor device in which a chip is protected by a plasma silicon nitride film that solves the above-mentioned problems.
このために本発明は、プラズマ気相成長法により半導体
チップにパッシベーション膜としての窒化シリコン膜を
施して成る半導体装置において、上記窒化シリコン膜を
、屈折率が2.05以上で、且つ1.45wt%のフッ
化アンモニウム水溶液と39、2 W 1%のフッ化水
素酸を35対1の割合で混合した液による27°Cでの
エツチングレートが30Å/min以下の条件を満足す
る材質とした。For this purpose, the present invention provides a semiconductor device in which a silicon nitride film is applied as a passivation film to a semiconductor chip by plasma vapor deposition, in which the silicon nitride film has a refractive index of 2.05 or more and a weight of 1.45 wt. The material was made of a material that satisfies the condition that the etching rate at 27°C by a mixture of 39.2% ammonium fluoride aqueous solution and 1% hydrofluoric acid at a ratio of 35:1 is 30 Å/min or less.
以下、本発明の実施例の半導体装置について説明する。 A semiconductor device according to an embodiment of the present invention will be described below.
本実施例では、プラズマ気相成長法により千ノブに窒化
シリコン膜を成長させる際、原料ガスであるモノシラン
(SiHa)とアンモニア(NH3)の流量比を選択し
て、形成された窒化シリコン膜の性質が次の(a) (
bl (clを満たすようにする。In this example, when growing a silicon nitride film to a thousand knobs by plasma vapor phase epitaxy, the flow rate ratio of the raw material gases monosilane (SiHa) and ammonia (NH3) was selected to increase the thickness of the formed silicon nitride film. The properties are as follows (a) (
bl (satisfy cl.
(a)、シリコンを多量に含むこと。つまり、5iXN
。(a) Contains a large amount of silicon. In other words, 5iXN
.
のx、yがx/y≧3/4であること。なお、通常の窒
化シリコンは5ilN、で表される。x and y are x/y≧3/4. Note that ordinary silicon nitride is expressed as 5ilN.
(b)、屈折率が2.05以上(通常は2.0〜2.0
5)であること。(b), the refractive index is 2.05 or more (usually 2.0 to 2.0
5).
(C1,1,45w 1%のフッ化アンモニウム水溶液
と39.2のwt%のフッ化水素酸を35対1の割合で
混合した液の27℃でのエツチングレートが30Å/m
in以下(通常は100人/m1n)であること。(C1,1,45w The etching rate at 27°C of a mixture of 1% ammonium fluoride aqueous solution and 39.2 wt% hydrofluoric acid at a ratio of 35:1 is 30 Å/m
(usually 100 people/m1n).
このような条件を満足する窒化シリコンのパッシベーシ
ョン膜が施された半導体チップを樹脂モールドしてなる
半導体装置では、膜とモールド樹脂との密着性が低下し
、モールド樹脂に発生する応力のチップへの伝達がほと
んどな(なる。また、この窒化シリコン膜は硬度的に強
固となり樹脂モールド後においてもクラックが発生する
ことがほとんどない。さらに、膜中の水素含有量が少な
いためチップ界面での水素による特性変動がない。In a semiconductor device made by resin molding a semiconductor chip coated with a silicon nitride passivation film that satisfies these conditions, the adhesion between the film and the molding resin decreases, and stress generated in the molding resin is transferred to the chip. In addition, this silicon nitride film is strong in terms of hardness and almost no cracks will occur even after resin molding.Furthermore, since the hydrogen content in the film is low, hydrogen at the chip interface will There is no change in characteristics.
以上は実験的に実証されている。The above has been experimentally proven.
以上から本発明によれば、モールド樹脂の応力のチップ
への伝達性を遮断するようにしたので、外乱要素がモー
ルド樹脂を介してチップへ影響することがなく、チップ
の特性の変動・劣化が防止される。また、パッシベーシ
ョン膜におけるクランクの発生の低減化及びチップ界面
での水素による特性変動の解消等も可能となり、これら
と前記の効果とが奏合され半導体装置の性能が向上する
。From the above, according to the present invention, since the transmission of stress in the mold resin to the chip is blocked, disturbance elements do not affect the chip via the mold resin, and fluctuations and deterioration of the characteristics of the chip are prevented. Prevented. Furthermore, it is possible to reduce the occurrence of cranks in the passivation film and eliminate characteristic fluctuations due to hydrogen at the chip interface, and these and the above-mentioned effects work together to improve the performance of the semiconductor device.
Claims (1)
シベーション膜としての窒化シリコン膜を施して成る半
導体装置において、 上記窒化シリコン膜を、屈折率が2.05以上で、且つ
1.45wt%のフッ化アンモニウム水溶液と39.2
wt%のフッ化水素酸を35対1の割合で混合した液に
よる27℃でのエッチングレートが30Å/min以下
の条件を満足する材質としたことを特徴とする半導体装
置。(1) In a semiconductor device in which a silicon nitride film is applied as a passivation film to a semiconductor chip by plasma vapor deposition, the silicon nitride film has a refractive index of 2.05 or more and a fluoride film of 1.45 wt%. Ammonium chloride aqueous solution and 39.2
A semiconductor device characterized in that the material is made of a material that satisfies the condition that the etching rate at 27° C. with a solution containing wt% hydrofluoric acid mixed at a ratio of 35:1 is 30 Å/min or less.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25610287A JPH07120652B2 (en) | 1987-10-09 | 1987-10-09 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25610287A JPH07120652B2 (en) | 1987-10-09 | 1987-10-09 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH0198231A true JPH0198231A (en) | 1989-04-17 |
JPH07120652B2 JPH07120652B2 (en) | 1995-12-20 |
Family
ID=17287917
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25610287A Expired - Lifetime JPH07120652B2 (en) | 1987-10-09 | 1987-10-09 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH07120652B2 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0623805A1 (en) * | 1992-01-21 | 1994-11-09 | KRYNICKI, Witold | Method of manufacturing reference samples for calibrating amount of measured displacement and reference sample, and measuring instrument and calibration method |
JP2005026712A (en) * | 2004-09-17 | 2005-01-27 | Semiconductor Energy Lab Co Ltd | Thin film integrated circuit and active type liquid crystal display device |
JP2005045278A (en) * | 2004-09-17 | 2005-02-17 | Semiconductor Energy Lab Co Ltd | Thin film integrated circuit and method for manufacturing thin film integrated circuit |
-
1987
- 1987-10-09 JP JP25610287A patent/JPH07120652B2/en not_active Expired - Lifetime
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0623805A1 (en) * | 1992-01-21 | 1994-11-09 | KRYNICKI, Witold | Method of manufacturing reference samples for calibrating amount of measured displacement and reference sample, and measuring instrument and calibration method |
EP0623805A4 (en) * | 1992-01-21 | 1997-01-29 | Witold Krynicki | Method of manufacturing reference samples for calibrating amount of measured displacement and reference sample, and measuring instrument and calibration method. |
JP2005026712A (en) * | 2004-09-17 | 2005-01-27 | Semiconductor Energy Lab Co Ltd | Thin film integrated circuit and active type liquid crystal display device |
JP2005045278A (en) * | 2004-09-17 | 2005-02-17 | Semiconductor Energy Lab Co Ltd | Thin film integrated circuit and method for manufacturing thin film integrated circuit |
JP4485303B2 (en) * | 2004-09-17 | 2010-06-23 | 株式会社半導体エネルギー研究所 | Method for manufacturing transmissive display device |
JP4485302B2 (en) * | 2004-09-17 | 2010-06-23 | 株式会社半導体エネルギー研究所 | Method for manufacturing transmissive display device |
Also Published As
Publication number | Publication date |
---|---|
JPH07120652B2 (en) | 1995-12-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4592792A (en) | Method for forming uniformly thick selective epitaxial silicon | |
JPH02302027A (en) | Selective growth method for amorphous or polycrystalline silicon | |
US4349408A (en) | Method of depositing a refractory metal on a semiconductor substrate | |
US6093956A (en) | Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers | |
GB1233908A (en) | ||
JPH0198231A (en) | Semiconductor device | |
US6107168A (en) | Process for passivating a silicon carbide surface against oxygen | |
JPH05335345A (en) | Surface protection film of semiconductor element | |
KR102307189B1 (en) | Etching solution with high selectivity for semiconductor | |
Kaneko et al. | Epitaxial growth of A1N film by low-pressure MOCVD in gas-beam-flow reactor | |
JPH03139836A (en) | Method for piling silicon nitride layer on glass substrate | |
JPH05129230A (en) | Method for forming tungsten film | |
JPH02239195A (en) | Compound semiconductor single crystal | |
JP3575618B2 (en) | Crystal growth method of gallium nitride based compound semiconductor film | |
JPH01241827A (en) | Growth of silicon nitride film | |
Hoerner et al. | Chemically vapor-deposited silicon carbide films for surface protection | |
JPH03135026A (en) | Insulating substrate for semiconductor formation | |
JPS6262529A (en) | Forming method for silicon nitride film | |
JPS55130841A (en) | Increasing method of adhesive strength between photoresist film and glass | |
JP2959580B2 (en) | Semiconductor crystal growth method | |
JPH0284721A (en) | Dry etching | |
JPH04174516A (en) | Manufacture of semiconductor device | |
JPH01215026A (en) | Vapor growth method | |
JP2818665B2 (en) | Gas phase etching method | |
JP3324221B2 (en) | Method of manufacturing III-V compound semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
EXPY | Cancellation because of completion of term |