JPH0197522A - Electric discharge pattern detecting device for electric discharge machine - Google Patents

Abstract

PURPOSE:To facilitate selection of an optimum machining condition, by a method wherein an electric discharge pattern is displayed on a CRT display device, and in electric discharge the given number of times during on-time, a ratio between various electric discharge patterns is detected. CONSTITUTION:A gap voltage between a work and an electrode is detected by a detecting means (s), and a digital output signal therefrom is sampled at a given sampling period. An electric discharge waveform data is stored in a discrete manner in a sampling memory means (b), and an electric discharge waveform pattern is displayed on a CRT display device (d) by means of a control means (c). A plurality of sampling data during on-time are stored in the memory means (b), the data are discriminated and classified into electric discharge patterns by means of a discriminating means (e), a generation ratio between the electric discharge patterns is determined by a ratio calculating means (f), and the result is displayed on the CRT display device (d). This constitution enables facilitation of selection and setting of an optimum machining condition.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a detection device for each discharge pattern in an electric discharge machine such as a die-sinking electric discharge machine or a wire electric discharge machine.

Conventional technology In order to know the electrical discharge machining status in an electrical discharge machine, conventionally, a short circuit between the workpiece and the electrode is detected using a short detection means, or an average voltage between the workpiece and the electrode is detected, and the average voltage is determined from the average voltage. It was detecting whether it was load discharge or arc discharge.

Problems to be Solved by the Invention It is not possible to accurately detect the discharge state by simply detecting a short between the workpiece and the electrode using a short-circuit detection means, or detecting no-load discharge or arc discharge using the average voltage between the workpiece and the electrode. . In particular, even in normal discharge that is neither short-circuited nor no-load discharge nor arc discharge, there is an optimum discharge condition, ie, discharge pattern, for improving the discharge machining efficiency. However, conventional methods have the disadvantage that individual discharge patterns cannot be detected.

Furthermore, when determining machining conditions, the rate at which short discharge, arc discharge, and no-load discharge occur is an important determining factor. determined by experience.

SUMMARY OF THE INVENTION Accordingly, it is an object of the first invention to provide a discharge pattern detection device capable of displaying a discharge pattern during each discharge.

A second object of the invention is to provide a discharge pattern detection device that classifies discharge patterns into a plurality of patterns and detects the rate of occurrence of each type of discharge pattern.

Means for Solving the Problems Figure 1 is a block diagram of the means adopted by the first invention to solve the problems of the prior art. The gap voltage detection means a outputs a digital signal, and the sampling memory means stores the output voltage data from the gap voltage detection means a at a predetermined sampling period.
and control means C for reading out the data stored in the sampling memory means and displaying the data as a graph on the CRT display device d, and controlling the discharge waveform pattern by CR.
The above problem was solved by displaying the T display device.

Moreover, FIG. 2 is a block diagram of the means adopted by the second invention to solve the problems of the prior art.The second invention detects the voltage between the workpiece and the electrode and outputs it as a digital signal. and a sampling memory that stores output voltage data from the gap voltage detection means a for a plurality of on-times during which a voltage is applied between the workpiece and the electrode at a predetermined sampling period. a discriminating means e for discriminating the discharge pattern of each on-time based on the sampling data of each on-time stored in the sampling memory means and various parameter setting values for discriminating the discharge pattern; The above problem was solved by providing a ratio calculation means f for determining the ratio of patterns.

Operation In the first invention, the cap voltage between the workpiece and the electrode is detected by the gap voltage detection means a, converted into a digital signal, and output. The output signal of the gap voltage detection means a is sampled at a predetermined sampling period and stored in the sampling memory means. the result,
Data of the discharge waveform between the workpiece and the electrode is discretely stored in the sampling memory means. Therefore, if the control means C reads the data of the discharge waveform and displays the data of each sampling period in a graph corresponding to the sampling period on the CRT display device d, the CRT
The discharge waveform pattern will be displayed on the display device d.

On the other hand, in the second invention, sampling data of a plurality of on-times are stored in the sampling memory means, and the discharge waveform pattern for each on-time is discriminated into several types of discharge patterns by the discriminating means e. The ratio calculation means f calculates the occurrence rate of each discharge pattern based on the number of various discharge patterns with respect to the total number of classified and discriminated discharge patterns.
By determining this, the discharge state during a certain predetermined period can be determined based on the proportion of the type of discharge pattern.

Example FIG. 1 is a block diagram of essential parts of an embodiment of the present invention.

In the figure, 1 is a stabilized power supply, and the output of the stabilized power supply 1 is a shut resistor 3, transistors Tri to Tr3 as switching elements, current limiting resistors R1 to R3, and the polarity of the voltage applied to the electrode 4 and workpiece 5. Selector switch S
The voltage is applied to the electrode 4 and the workpiece 5 via W. In addition,
2 is a capacitor for power supply voltage smoothing. On the other hand, electrode 4
Gap voltage between and workpiece 5■. is the voltage dividing resistor R4゜R
5 and input to the A/D converter 6.
The digital signal is input from the /D converter 6 to the sampling memory means 7 as a gap voltage of the digital signal. The sampling memory means 7 is bus-coupled to a central processing unit (hereinafter referred to as CPU) 8 that performs discharge pattern detection control, and the CPU 8 further controls the electric discharge machine via a bus arbiter controller (hereinafter referred to as BAC) 9. Numerical control device (hereinafter referred to as NC/device) 10 C
It is bus-coupled to PU11. Furthermore, BAC9 includes a working memory WM, which will be described later, and an average memory memory A.
CPU 11 of the NG device having M, data memory DM, etc.
and a shared RAM 12 that can be accessed from both the CPU 8 and the CPU 8.
A manual data input device with a CRT display (hereinafter referred to as CRT/MDI) 14 is also connected via an operator panel controller 13 .

The CPU 8 has an output circuit 15. C via inverter 16
A read signal output when the PU 8 reads data from the sampling memory means 7 is output to the AND circuit 17, and the output of the clock circuit 18 which generates a clock pulse to the AND circuit 17 and the transistor Tri An on-output signal from an on-off circuit 19 composed of two one-shot multivibrators and the like for turning on and off Tr3 is input.

The output of the AND circuit 17 is inputted to a counter 20 that specifies an address for the sampling memory means 7 to store the output of the A/D converter 6, and to a self-instruction input terminal of the sampling memory means 7. It has become. Further, the on-output signal of the on-off circuit 19 outputs a pulse at the rising edge of the signal, and is inputted to the sampling memory means 7, to which is connected a one-shot multivibrator 21 that notifies the start of on-time.

Note that the memory 22 composed of a ROM connected to the CPU 8 via a bus is a program memory in which the CPU stores a discharge pattern detection program to be described later.

Next, the configurations of the sampling memory SM of the numbering memory means 7, the working memory WM provided in the shared RAM 12, and the average storage memory AM will be explained.

FIG. 4 is an explanatory diagram illustrating the configuration of the sampling memory SM. The memory SM has a read pointer RP and a write pointer WP, and a data section SMD in which data is stored in a ring buffer shape; In the first bit of
On-time start flag SF is set when the signal from the one-shot multivibrator 21 is input, that is, when writing the first data at the start of the on-output of the on-off circuit 19 (at the start of on-time) is provided. Then, if the number of samplings carried out by the numbering memory means 7 during the on-time period is n, (if the on-time period is TO and the sampling period is the king, then To/T=
n), the sampling memory SM has a capacity fn(C[X
n or more).

FIG. 5 is an explanatory diagram of the structure of the working memory WM, which has a working memory pointer MP,
The capacity gi (CE
, n >.

FIG. 6 is an explanatory diagram of the configuration of the average storage memory AM, which includes an average memory pointer AP and a data section AMC having a capacity n for storing sampling data of one on-pulse (during on-time). have.

Next, determine the discharge pattern during each on-time,
Various parameters serving as standards for classification will be explained with reference to FIGS. 7 to 10.

Figure 7 shows the waveform of gap voltage v6 in a normal discharge pattern, Figure 8 shows discharge patterns during no-load discharge, Figure 9 shows discharge patterns during arc discharge, and Figure 10 shows discharge patterns during short-circuit. indicates the output voltage of the stabilized power supply 1, and A indicates the output voltage of the workpiece 5.
When the power supply voltage is applied between the workpiece 5 and the electrode 4 with the insulation restored between the workpiece 5 and the electrode 4, the workpiece 5 and the electrode 4
It is assumed that the insulation between the workpiece 5 and the electrode 4 has been restored if there is a voltage equal to or higher than VO-A (which indicates the width of the gap voltage generated between the two electrodes). In addition, B and C indicate the normal time width in which the gap voltage falls due to discharge after the on-time, and if W is the time width from voltage application to the start of discharge, then
If B≦W≦C, it is determined that the discharge is normal. Also, E.

D indicates the width of the gap voltage (6) when the discharge Ti current is flowing in normal discharge, and if it is between D≦v6≦E, it is determined that the discharge is normal.

Figure 8 shows that the gap voltage is (Vo-A) during on-time.
When the above conditions exist, that is, when no discharge occurs, this is considered to be a no-load discharge.

FIG. 9 shows arc discharge, and in this embodiment, the gap voltage V at the start of on-time.

, the voltage increases only for one hour, that is, K≦V6≦, and then the maximum F in one sampling period.

The case where a voltage drop of minimum G occurs is defined as arc discharge.

FIG. 10 is a diagram showing a short discharge, and in this embodiment, a short discharge occurs when the gap voltage v6 is less than the voltage H during on-time.

In addition, in FIGS. 7 to 10, TO to Tn-1 indicate the sampling time, and TO is at the numbering period T.
It is designed to detect n pieces of sampling data from ~Tn-1.

Next, the operation of this embodiment will be explained.

First, each of the aforementioned parameters Vo, A, B, and C.

D, E, F, G, and H are input from the CRT/MD I 14 to operate the erosion discharge machine stored in the data memory of the shared RAM, operate the on/off circuit 19, and turn on the transistors Tr1 to Tr3. When a voltage is applied between the workpiece 5 and the electrode 4 via the gap voltage 6 to start electric discharge machining, the gap voltage 6 divided by the resistors R4 and R5 is converted into a digital signal by the A/D converter 6. On the other hand, when the CPU 8 does not read data from the sampling memory means 8, the output circuit 1
5, no read signal is output to the AND circuit 17, so an H level signal is input to the AND circuit 17 via the inverter 16, and a clock signal is input from the clock circuit 18, so the ON/OFF circuit 19 When an on-pulse output is output from the AND circuit 17, a clock pulse is output during the on-pulse period, and is input to the ring-shaped counter 20 and the write command terminal of the sampling memory means. Therefore, the counter 20 counts the clock pulses and updates the write pointer WP that specifies the write address. On the other hand, an output pulse is output from the one-shot multivibrator 21 due to the rise of the on-pulse, and is input to the sampling memory means 7, and this signal sets the on-time start flag SF. As a result, the sampling memory means 7 stores the digital information of the gap voltage ■G'' from the A/D converter 6 at a period set by the clock circuit 18, that is, at a sampling period T.
Then, it is written to the data section SMD of the memory. At this time, due to the pulse of the one-shot multivibrator 21 output at the rising edge of the on-pulse output,
The on-time start flag SF is set in the flag bit of the first data write address after on-time, and then,
Data is sequentially written to the address positions specified by the counter 20 and the write pointer WP.

Then, when the on-off circuit 19 no longer outputs the on-pulse, the AND circuit 17 closes and the clock circuit no longer outputs the clock pulse, so the sampling memory means 7 stops writing data. Then, when an on-pulse is output from the on-off circuit 19 again,
As described above, the on-time start flag SF of the address for the first data write is set, and data is sequentially written.

This is because the sampling memory means 7 writes gap voltage data only during the on-time period, that is, the period when the voltage is applied between the workpiece 5 and the electrode 4, and as described above, the on-time period is TXn Then, if sampling is performed at the sampling period T, n pieces of data will be obtained.

As shown in Fig. 4, one on-time data is from the address where the on-time start flag SF is set to the next address before the on-time start flag SF is set, and during this period, n pieces of data are stored. data will be stored.

In this way, the sampling memory SM of the sampling memory means 7 stores only the gap voltage during the on-time when the voltage is applied between the workpiece 5 and the electrode 4 while being sequentially circulated like a ring buffer.

Therefore, next, the discharge pattern detection operation will be explained with reference to the operation process 70-charts of the CPIJ8 shown in FIGS. 7 to 9.

First, as shown in FIG. 7, this discharge pattern detection process is roughly divided into a processing step S1 in which sampling data of each on-time is retrieved from the sampling memory SM and displaying a discharge pattern and an average pattern, and a process step S1 in which discharge pattern classification is performed. and a processing step S2 for displaying.

First, the process of step S1 for determining the discharge pattern is performed in the eighth step.
This will be explained with reference to the flowcharts in FIGS. (a) and (b).

When the operator operates the CRT/MD I 14 to set it to the discharge pattern display mode and inputs a discharge pattern display command, the CPUA transfers data to the shared RAM 12 via the BAC 9.
Clears the average storage memory AM in the memory, sets the working memory pointer MP to 10'' (8101), and outputs a read signal (8102). When the read signal is output, the output circuit 15. Since the AND circuit 17 is inputted via the inverter 16, the output from the AND circuit 17 is stopped, and therefore, writing of data from the A/D converter 6 of the sampling memory means 7 is stopped.

The cpus searches for an address before the address (EExn) corresponding to the on-time number C to be read from the current write pointer WP value of the sampling memory SM, and the on-time start flag SF is set to "1". Search for an address, read the address of 5F=1, and set that address in the read pointer RP. That is, the address where the sampling data at the start of the on-time CE times before the current on-time is written is set in the read pointer RP (S103). Next, it is determined whether the on-time start flag SF of the address set by the read pointer RP is "1" (8104), and since it is initially "1", the average memory pointer AP is set to "1" in step 5105. 0", and stores the data of the sampling memory SM (RP) at the address in the address WM (MP) indicated by the working memory WM pointer (initially set to "0" in step 5101), and further , data SM (R
P) is added and stored in the address ΔM(AP) (8
106). Next, using the value of the average memory pointer AP as a reference (horizontal axis), address R of the sampling memory is
The value of P is displayed on the CR1 screen as a dot and a broken line (S107
). In this case, sampling data immediately after the start of the first on-time is displayed as a point on the CR1 screen. Next, each pointer MP.

RP and AP are incremented by 1 (8108), and working memory pointer MP is set to working memory WM.
Whether or not all the addresses of CE X n have reached the value of
The data for the number of on-times to be read is in the working memory W.
5109), and if the value of the pointer MP has not reached the value of CExn, the process returns to step 81.
04 Perform the following processing. In the next step 5104, since the on-time start flag SF is not "1", the process moves from step 5104 to step 8106, writes the sampling data to the next address of the working memory WM, and writes the sampling data to the next address of the average storage memory AM. Add the sampling data and display the data value as a dot on the CRT,
Connect it with the previously displayed point with a line. Furthermore, each pointer is incremented by "1", and the same process is repeated sequentially. Then, when the address of the sampling memory SM where the on-time start flag SF becomes "1" is read again, the average memory pointer AP is set to "0".
05), the same processing is repeated thereafter, and when the working memory pointer MP reaches a value Cr x n indicating that sampling data for the on-time number C4 to be read has been stored, the processing of steps 8104 to 5109 is finished.

As a result, the working memory WM stores n pieces of sampling data at each on-time, the number of on-times C5 to be read, and the average storage memory AM stores data at each sampling time from the start of the on-time. is added to each sampling time angle and stored, and the value of the sampling data at each on-time is displayed as a broken line on the CR1 screen. That is, the discharge waveform patterns of each on-time are displayed in the same phase.

In this way, after CE discharge patterns are displayed on the CRT, the CPU 8 stops outputting the read signal (8110
), so that the sampling memory means 7 again
The operation of taking in the output data of the converter every sampling period and writing it into the memory SM is started. On the other hand, the CPU 8 sets the average memory pointer AP to "0", and calculates the total sum of the C4 on-times in the sampling period stored at the address "0" of the average memory memory AM by CE. 8112), calculate the average value for the current sampling period, and store it at the address (8112), and display the stored average value on the CR1 screen with reference to the average memory pointer AP (width).
and displays a point (S113), increments the average memory pointer AP by "1" (8114), and performs steps 8112 to S115 until the average memory pointer AP reaches the number of samples n in one on-time. , the average discharge pattern is displayed as a broken line connecting the points displayed on the CRT display in sequence.

In particular, the average discharge pattern is displayed in a different color from the display of the discharge pattern that is generated at each on-time.

In this way, one discharge pattern C for each on-time and the average discharge pattern of these are displayed on the CRT screen,
This discharge pattern display process (Sl) ends.

When this discharge pattern display process is finished, the CPU 8
The discharge pattern classification process shown in FIG. 13 is started. First, the working memory pointer MP, the no-load counter C2 that counts no-load discharges, the normal counter CN that counts normal discharges, the arc counter CA that counts arc discharges, the short counter C8 that counts short-circuits, and the above-mentioned no-load, normal , a counter C1 that counts discharges other than arc and short discharges, and a total number of discharges (
5201), read the data at the address indicated by the working memory pointer MP in the working memory WM, and make sure that the value of the data is greater than the value of (Vo-A). It is determined whether it is large (S202). That is, the value of the first pointer MP is f'
In OJ, the sampling data at the start of the first on-time stored in the working memory WM is read out first, so if this value is larger than (VO - A), the 7th
As shown in Figures 9 and 8, this is the end of normal discharge or no-load discharge, and when it is small, it is arc discharge or short discharge as shown in Figures 9 and 10, and in this case, Figure 13 (b
).

Therefore, if Vo-A≦WM(MP) and in the case of normal or no-load discharge, the working memory pointer MP
8203), reads the data at the next address (next sampling data) from the working memory WM, and judges whether the data WM (MP) is larger than VO-A (5204). If it is, the pointer is MP as “
1'' is incremented, and the value of the pointer MP is the number of on-times G that has already been considered.
It is determined whether the value obtained by adding the number of samples Cxn for the current 1 on-time to the number of samples Cxn (set to "0") has been reached 8206>, and if not, the processing of steps 8204 to 8206 is performed. Repeat. That is, the gap voltage V. is Vo-A due to voltage application.
Steps 8204 to 8206 indicate when the gap voltage V6 rises above VO-A, discharge is started, and the gap voltage V6 becomes VO-A or less.
As shown in diagram M8, the value of the working memory pointer MP becomes (C, xn+n) and the value WM (MP) of the gap voltage vo is greater than (Vo-A) during the on-time period. Since this is a no-load discharge that does not cause such discharge, the no-load counter C7 is counted up (S
207). On the other hand, while repeating the processing of steps 8204 to 5206, the value of WM (MP) (value of gap voltage V.)
When the voltage becomes less than Vo -A, discharge has occurred, and in this case, the process shifts to the process shown in FIG. 13(C) for determining normal discharge.

It is a no-load discharge, and after counting up the S load counter C2 (8207), the CPU 8 returns to step 8224.
(See FIG. 13(d)), counts up the counter C, 4, and increments the counter CI! It is necessary to judge whether the value of I has reached the number of on-times CE to be read (8225),
If not, the working memory pointer MP is set to indicate the address of the working memory WM where the sampling data at the rising edge of the next on-time is stored.
is set to Cu X n (8226), and the processing from step 8202 onwards is performed again.

In addition, step 3206.5207.8224゜522
When performing the process in step 5 and then the process in step 8226,
Although the working memory pointer MP has already been set to the value Cu X n in step 5205, the working memory pointer MP is set to Cl4xn in step 8226 in case another discharge is detected, which will be described later.

On the other hand, in step 5202, the gap voltage immediately after the start of A time is determined by the working memory W at the address MP, which will be described later.
If the stored value of M has not reached Vo -A, that is, as shown in FIGS. 9 and 10, when the gap voltage v6 does not reach VO-8 at the start of the on-time,
starts the short circuit/arc discharge detection process shown in FIG. 13(b).

First, the voltage K to which the sampling data WM (MP) at the start of the on-time of the address is set.

If it is between L 8208), the working memory pointer MP is incremented by "1" 5209), and the sampling data WM (MP) is read from the address not indicated by the pointer MP. Sampling data WM (MP-1) with the previous value
is larger than the value obtained by subtracting the set maximum voltage drop ff1F from , and the previous sampling data WM (
It is determined whether the voltage is smaller than the value obtained by subtracting the set minimum voltage drop ff1G from MP-1) (8210). If YES, increment pointer MP by "1" 5211)
, a value C,xn indicating the address where the pointer MP stores the first sampling data after the start of the next on-time.
+n has not been reached (8212), and the processes of steps 8210 to 5212 are repeated until the address value for storing the last sampling data of the on-time is reached. That is, it is determined whether each sampling data at the on-time has dropped by a value greater than the set maximum voltage drop F and smaller than the minimum voltage drop G. If NO in step 82.10, that is, if the voltage drop rate is not between the set ranges F and G, the process proceeds to step 8223 (see Fig. 13(d)) as other discharge rather than arc discharge. do.

Further, when it is determined that the voltage drop rate is between the set ranges F and G for all sampling data of the on-time, the process moves to step 5213, the arc counter CA is incremented by rIJ as arc discharge, and step 8224 (See FIG. 13(d)).

In addition, if the first sampling data WM (MP) of the on-time is not within the set voltage or L in step 8208, the CPLJ8 is set so that the data WM (MP) is next set to detect a short circuit. It is determined whether the voltage is below H (8214), and if it is below voltage H, the working memory pointer MP is incremented by "1" (821).
5) Determine whether all the sampling data of the on-time has been read, that is, whether the pointer MP has reached the value of C, l
8216 is repeated, and if all the sampling data WM (MP) during the on-time period are below the voltage H, the short counter C8 that counts short circuits is set to "
1'' is added and the process moves to step 5224. Furthermore, if even one sampled data WM (MP) exceeds the voltage H during the on-time, this case is also treated as another discharge and the process moves to step 5223.

Returning again to FIG. 13(a), the first sampling data of each on-time is the gap voltage VG (V
o - A ) fr (S202), and whether or not the subsequent sampling data exceeds the (Vo-A) is determined by sequentially repeating steps 8204 to 8206. -A) (8204), that is, when a discharge occurs and the gap voltage decreases, the CPU 8 proceeds to step 8218 and determines whether or not the time when the discharge occurs is within the set times B and C. In other words, the value obtained by subtracting the value of the pointer MP at the start of the on-time from the current working memory pointer MP (this value indicates how many samples have been sampled since the start of the on-time) is set at time B. , C divided by the sampling period (the number of samplings from the start of the on-time corresponding to the set times B and C) (8218), and if it is between these values, it is set as a normal discharge pattern. This means that discharge is occurring within the range.
Move to step 5219 and step 8219 to 522
In the process of 1, it is determined whether the value of the subsequent sampling data WM (MP) is between the set value and the gap voltage G while the discharge current is flowing, and all data are equal to the set value. If the voltage between E and V is 6, the normal counters C and 4 for counting normal discharges are incremented by 1 increment, and the process moves to step 5224. Further, in step 8218, the fall of the voltage at the t7 point due to discharge occurs for a set time B.

If the gap voltage ■G when the discharge current is flowing is within the set range and sampling data WM (MP) which is not within E is detected in step 5219, the step is performed as another discharge. Move to $223. In step 5223, a counter C[ for counting the discharge of the cell is counted up, and in step 522
Move to 4. In step 5224, as described above,
Count up the read on-time counter C14 by "1" until the value of the counter C,4 reaches the number of on-times to be read C [(the total number of on-times stored in the work memory). In step 8226, the working memory pointer MP is set to the address where sampling data immediately after the start of the next on-time is stored;
That is, the value of CW×n is set in the pointer MP.

In addition, the no-load counter C7, arc counter C, short counter C, and normal counter CN8S were counted up (8207.5213°3217
．． 5222), all sampling data at the on-time are read and the working memory pointer MP is set to these counters c , c , cS,
At the point A when cN is counted up, the value of the address CI4xn where the ripple data immediately after the start of the next on-time is stored is reached, and in step 8226, the pointer MP is again set to Cl4xn.
However, in the case of other discharges, when even one of the numbering data during the on-time period does not satisfy the set condition, the counter C4 is counted up and the steps 5224, 8225, . In order to proceed to step 8226, the working memory pointer MP is set at the address Cxn where sampling data immediately after the start of the next on-time is stored.

Thus, when the value of the counter C that counts the read on-times reaches the set number C5 of on-times to be read (8225), the CPU 8 calculates the ratio of the discharge pattern (8227).

That is, the total on-time number CE is the normal counter C, the no-load counter C7, and the arc counter CA.

The short counter C8 and the counter C1 for counting other discharges are divided and multiplied by 100 to display the percentage of each discharge pattern on the CRT screen.

In addition, these data are used to automatically change the electrical discharge machining conditions based on the proportions of normal, no-load, arc, and short-circuit discharges determined in step 5227, and to automatically control the discharge machining conditions to the optimum values. But that's fine.

Effects of the Invention In the first invention, since the discharge pattern is displayed on the CRT screen, the operator can easily determine whether the current discharge is optimal or not, which is useful for changing the settings of machining conditions.

In addition, in the second invention, since the ratio of various discharge patterns is detected in the discharge during the predetermined on-time, this ratio can be used as a determining factor for selecting machining conditions, and the optimum machining conditions can be selected. It becomes easier.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the means adopted by the first invention to solve the problems of the prior art, and FIG. 2 is a block diagram of the means adopted by the second invention to solve the problems of the prior art. 3 is a block diagram of a main part of an embodiment of the present invention, FIG. 4 is an explanatory diagram of the configuration of the sampling memory of the embodiment, FIG. 5 is an explanatory diagram of the configuration of the working memory of the embodiment,
FIG. 6 is an explanatory diagram of the configuration of the average storage memory of the same embodiment; FIGS. 7 to 10 are diagrams showing examples of discharge patterns for explaining parameters for specifying discharge patterns;
FIG. 1 is a diagram showing an outline of a process flowchart for detecting a discharge pattern performed in the same embodiment, FIGS. 12(a) and (b) are a flowchart for discharge pattern display processing in the same embodiment, and FIG. -(d) are flowcharts of discharge pattern classification processing in the same example m. 4... Electrode, 5... Work, 6... A/D converter, 7... Sampling memory means, 8... Medium heat processing display unit (CPU), 9... Bus arbiter controller , 10... Numerical control device, 12... Shared RAM
, 14...Manual data input device with CRT display device, 1
9...On/off circuit, WM...working memory, AM...average storage memory, RP...read pointer, WP...write pointer, MP...working memory pointer, AP: Pointer for average memory. M 1 Mouth Figure 7 Figure 80 Figure 11 Figure 12 (b)! Figure 13 (al

Claims (7)

[Claims] (1) Gap voltage detection means for detecting the voltage between the workpiece and the electrode and outputting it as a digital signal; sampling memory means for storing output voltage data from the gap voltage detection means at a predetermined sampling period; and a CRT display device. , a control means for reading data stored in the sampling memory means and displaying the data in a graph on the CRT display, and displaying a discharge waveform pattern on the CRT display. Device. (2) The sampling memory means has a storage capacity for storing sampling data for a plurality of on-times when a voltage is applied between the workpiece and the electrode, and the control means displays a plurality of discharge waveforms on the CRT display device. An electric discharge pattern detection device for an electric discharge machine according to claim 1, wherein the patterns are displayed at the same time in phase with each other. (3) The electric discharge pattern detection device for an electric discharge machine according to claim 2, wherein the sampling memory means is configured in a ring buffer shape, and stores a predetermined amount of voltage data of each on-time in circulation. (4) The control means calculates an average value of a plurality of on-time sampling data every sampling period from the start of on-time, displays the average value in a graph on a CRT display device, and displays an average discharge waveform pattern. A discharge pattern detection device for an electrical discharge machine according to claim 2 or 3. (5) A gap voltage detection means that detects the voltage between the workpiece and the electrode and outputs it as a digital signal, and an on-time in which the output voltage data from the gap voltage detection means is applied at a predetermined sampling period between the workpiece and the electrode. A discharge pattern for each on-time is determined based on a sampling memory means for storing a plurality of on-times, and sampling data for each on-time stored in the sampling memory means and various parameter setting values for determining the discharge pattern. A discharge pattern detection device for an electric discharge machine, comprising a discrimination means and a ratio calculation means for calculating the ratio of each discharge pattern to the total number of discharge patterns to be discriminated. (6) The discharge pattern in the electric discharge machine according to claim 5, wherein the types of discharge patterns to be determined are five types: normal discharge, no-load discharge, arc discharge, short discharge, and other discharges. Detection device. (7) The above-mentioned discriminating means determines that the normal discharge is a voltage that is equal to or higher than a set predetermined voltage close to the power supply voltage from the start of the on-time, continues for a predetermined time, and then the voltage decreases and continues within the set predetermined voltage range until the end of the on-time. No-load discharge is determined by the persistence of a voltage equal to or higher than a predetermined voltage close to the power supply voltage during the on-time period, and arc discharge is determined by the fact that the voltage at the start of the on-time is set for arc detection. It is determined that the voltage drop is within a predetermined voltage width and then within a predetermined range set in one sampling period angle, and a short discharge is determined by detecting a voltage that is less than a predetermined voltage set for short detection during the on-time period. 7. The discharge pattern detection device for an electrical discharge machine according to claim 6, wherein discharges other than normal, no-load, arc, and short are distinguished from other discharges.