JPH0195695A - Digital exchange - Google Patents

Digital exchange

Info

Publication number
JPH0195695A
JPH0195695A JP25434987A JP25434987A JPH0195695A JP H0195695 A JPH0195695 A JP H0195695A JP 25434987 A JP25434987 A JP 25434987A JP 25434987 A JP25434987 A JP 25434987A JP H0195695 A JPH0195695 A JP H0195695A
Authority
JP
Japan
Prior art keywords
circuit
subscriber
constant
balanced
pcm
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25434987A
Other languages
Japanese (ja)
Inventor
Ikuhiro Takahashi
高橋 幾洋
Isao Nakatsubo
中坪 功
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25434987A priority Critical patent/JPH0195695A/en
Publication of JPH0195695A publication Critical patent/JPH0195695A/en
Pending legal-status Critical Current

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Landscapes

  • Monitoring And Testing Of Exchanges (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Interface Circuits In Exchanges (AREA)

Abstract

PURPOSE:To easily set the constant of an optimum balance connection network conforming to respective subscriber lines by automatically selecting the constant of the balance connection network based on the detected value of a hybrid return loss. CONSTITUTION:A subscriber circuit 2 has the plural constants of balance connection networks 3. The return loss of the subscriber line is measured by using a PCM digital pattern generating circuit 8 for test signal generation and a PCM level detecting circuit 9, and the optimum constant of the balance connection network 3 of the subscriber lines is determined from the measured value. Thus, the optimum constant of the balance connection network 3 conforming to the setting condition of the subscriber line can be set, and it can be easily reset.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、二線四線変換回路を有するデジタル交換機の
平衡結線網の最適設定手段に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to means for optimally setting a balanced connection network of a digital exchange having a two-wire/four-wire conversion circuit.

〔概要〕〔overview〕

本発明は、二線四線変換回路を有するデジタル交換機の
平衡結線網を最適に設定する手段において、 加入者回線の反射を測定し、この測定値で平衡結線網の
定数を自動設定することにより、平衡結線網の定数設定
を容易に行うことができるようにしたものである。
The present invention is a means for optimally setting a balanced network for a digital exchange having a two-wire/four-wire conversion circuit, by measuring the reflection of subscriber lines and automatically setting constants for the balanced network based on the measured values. , it is possible to easily set the constants of the balanced wiring network.

〔従来の技術〕[Conventional technology]

従来のデジタル交換機では、加入者線は二線式であり、
デジタルスイッチ回線網は四線式であるので、二線−四
線変換を行うハイブリット回路が必要になる。このハイ
ブリット回路で送信側の信号は受信側の回路を通過して
送信側に戻る。したがってこの信号をキャンセルする平
衡回路である平衡結線網が必要になる。従来は、複数個
の平衡結線網の定数を線路側インピーダンスに応じてマ
ニュアルで切り換えて設定していた。
In traditional digital exchanges, the subscriber line is two-wire;
Since the digital switch network is a four-wire system, a hybrid circuit that performs two-wire to four-wire conversion is required. In this hybrid circuit, a signal on the transmitting side passes through a circuit on the receiving side and returns to the transmitting side. Therefore, a balanced wiring network, which is a balanced circuit that cancels this signal, is required. Conventionally, the constants of a plurality of balanced wiring networks were manually switched and set according to the line-side impedance.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

このように、従来の平衡結線網の定数設定では、例えば
通話試験を行い聴感によってマニュアルに切り換えて定
数設定を行っていたので、各加入者回線に最適である平
衡結線網の定数設定は困難であり、かつ、定数の変更は
かなり煩雑である欠点があった。
In this way, in the conventional constant setting for a balanced wiring network, for example, the constants were set by conducting a call test and switching to manual settings based on hearing sensation, which made it difficult to set the constants for a balanced wiring network that was optimal for each subscriber's line. However, there was a drawback that changing the constants was quite complicated.

本発明はこのような欠点を除去するもので、定数設定を
自動的に行う手段を有するデジタル交換機を提供するこ
とを目的とする。
The present invention aims to eliminate such drawbacks, and aims to provide a digital exchange having means for automatically setting constants.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、時分割スイッチ回路に収容され、試験信号を
発生するPCMデジタルパターン発生回路と、上記時分
割スイッチ回路に収容され、上記試験信号のレベルに対
応して加入者回線からの反射を測定するPCM、レベル
検出回路と、この測定された反射に基づき平衡結線網の
定数を自動的に設定する制御手段とを備えたことを特徴
とする。
The present invention includes a PCM digital pattern generation circuit that is housed in a time division switch circuit and generates a test signal, and a PCM digital pattern generation circuit that is housed in the time division switch circuit and measures reflection from a subscriber line in accordance with the level of the test signal. The present invention is characterized by comprising a PCM, a level detection circuit, and a control means for automatically setting the constant of the balanced wiring network based on the measured reflection.

〔作用〕 加入者回路には複数個の平衡結線網の定数をもたせてあ
り、試験信号発生用のPCMデジタルパターン発生回路
とPCMレベル検出回路とを用いて加入者回線のリター
ンロスを測定し、この測定値から加入者回線の最適な平
衡結線網の定数を決定する。これにより、加入者回線の
設置条件に合わせた平衡結線網の定数を最適に設定でき
、また再設定も容易に行える。
[Operation] The subscriber circuit is provided with constants of a plurality of balanced wiring networks, and the return loss of the subscriber line is measured using a PCM digital pattern generation circuit for test signal generation and a PCM level detection circuit. From this measured value, the constants of the optimal balanced network of subscriber lines are determined. This makes it possible to optimally set the constants of the balanced network in accordance with the installation conditions of the subscriber lines, and also to easily re-set them.

〔実施例〕〔Example〕

以下、本発明の一実施例を図面に基づき説明する。第1
図は、本発明の一実施例の構成を示すブロック構成図で
ある。第2図は、第1図の加入者回路の構成を示すブロ
ック構成図である。第3図は、複数個の平衡結線網に対
応する線路抵抗とリターンロスの関係を示す図であり、
広く線路抵抗の変化に対応した平衡結線網の定数回路が
複数個設定しである。
Hereinafter, one embodiment of the present invention will be described based on the drawings. 1st
The figure is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of the subscriber circuit shown in FIG. 1. FIG. 3 is a diagram showing the relationship between line resistance and return loss corresponding to a plurality of balanced wiring networks,
A plurality of constant circuits of a balanced wiring network are set to correspond to a wide range of changes in line resistance.

まず、この実施例の構成を第1図に基づき説明する。こ
の実施例は、定数が調整できる平衡結線網3が接続され
たハイブリッド回路2−1を有するアナログ加入者回路
である加入者回路2と、この加入者回路2を収容する時
分割スイッチ回路5と、時分割スイッチ回路5に収容さ
れ、試験信号を発生するPCMデジタルパターン発生回
路8と、時分割スイッチ回路5に収容され、試験信号の
レベル値に基づきこの信号が送出された加入者回線のハ
イブリットリターンロス値を測定するPCMレベル検出
回路9と、この測定されたハイブリットリターンロス値
に基づき上記平衡結線網の定数を設定する制御手段であ
るCPU6および制御回路4とを備える。
First, the configuration of this embodiment will be explained based on FIG. This embodiment includes a subscriber circuit 2 which is an analog subscriber circuit having a hybrid circuit 2-1 to which a balanced connection network 3 whose constants can be adjusted is connected, and a time division switch circuit 5 that accommodates this subscriber circuit 2. , a hybrid of a PCM digital pattern generation circuit 8 which is housed in the time division switch circuit 5 and generates a test signal, and a subscriber line which is housed in the time division switch circuit 5 and from which this signal is sent out based on the level value of the test signal. It includes a PCM level detection circuit 9 that measures a return loss value, and a CPU 6 and a control circuit 4 that are control means that set constants of the balanced wiring network based on the measured hybrid return loss value.

ここで、特番「00」を試験信号発生用のPCMデジタ
ルパターン発生回路8とPCMレベルを検出するPCM
レベル検出回路9を有するハイブリットリターンロス検
出回路7と加入者回路2とを接続する信号であるとする
。アナログ電話機1から特番「00」を発信させると、
CPU6は特番「00」を検出し、時分割スイッチ回路
5によりデジタル通話路11および12とハイブリット
リターンロス検出回路7とを接続する。CPU6はハイ
ブリットリターンロス検出回路7に測定開始の命令を制
御線16を経由して送る。ハイブリットリターンロス検
出回路7はデジタル通話路13、デジタル通話路12お
よびアナログ通話路lOを経由してアナログ電話機1に
対し測定開始音を出すことで加入者へ測定開始の確認を
促す。PCMデジタルパターン発生回路8から試験信号
を出し、PCMレベル検出回路9でアナログ端末からの
逆流信号のレベルを検出する。結果は、制御線17を経
由してCPU6で判断され、平衡結線網3のセレクトス
イッチ回路3−1により平衡結線網の定数回路3−2に
ある複数の平衡結線網の定数を選択しながらハイブリッ
トリターンロスの検出を行い、最適な平衡結線網の定数
が設定される。設定が終了すると、ハイブリットリター
ンロス検出回路7はデジタル通話路13、デジタル通話
路12およびアナログ通話路10を経由してアナログ電
話機1に対し平衡結線網の定数設定終了音を出し加入者
の確認を促す。以上のようにして最適な平衡結線網の定
数を設定することができる。
Here, the special number "00" is assigned to the PCM digital pattern generation circuit 8 for generating test signals and the PCM digital pattern generation circuit 8 for detecting the PCM level.
It is assumed that the signal connects the hybrid return loss detection circuit 7 having the level detection circuit 9 and the subscriber circuit 2. When you dial special number "00" from analog telephone 1,
The CPU 6 detects the special number "00" and connects the digital communication paths 11 and 12 and the hybrid return loss detection circuit 7 via the time division switch circuit 5. The CPU 6 sends a command to start measurement to the hybrid return loss detection circuit 7 via the control line 16. The hybrid return loss detection circuit 7 prompts the subscriber to confirm the start of measurement by emitting a measurement start sound to the analog telephone 1 via the digital communication path 13, the digital communication path 12, and the analog communication path IO. A test signal is output from a PCM digital pattern generation circuit 8, and a PCM level detection circuit 9 detects the level of a backflow signal from an analog terminal. The result is judged by the CPU 6 via the control line 17, and the select switch circuit 3-1 of the balanced wiring network 3 selects constants of a plurality of balanced wiring networks in the constant circuit 3-2 of the balanced wiring network. The return loss is detected and the constants of the optimal balanced wiring network are set. When the setting is completed, the hybrid return loss detection circuit 7 outputs a constant setting completion sound for the balanced connection network to the analog telephone 1 via the digital communication path 13, digital communication path 12, and analog communication path 10, and confirms the subscriber's confirmation. prompt. In the manner described above, constants for an optimal balanced wiring network can be set.

〔発明の効果〕〔Effect of the invention〕

本発明は以上説明したように、ハイブリットリターンロ
スの検出値に基づき平衡結線網の定数を自動選択するの
で、各々の加入者回線に合わせた最適な平衡結線網の定
数を容易に設定することができる効果がある。
As explained above, the present invention automatically selects the constants of the balanced connection network based on the detected value of the hybrid return loss, so it is possible to easily set the constants of the balanced connection network that are optimal for each subscriber line. There is an effect that can be done.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明実施例の構成を示すブロック構成図。 第2図は、第1図の加入者回路の構成を示すブロック構
成図。 第3図は、各平衡結線網に対応する線路抵抗とハイブリ
ッ) IJターンロスの関係を示す図。 1・・・アナログ電話機、2・・・加入者回路、3・・
・平衡結線網、4・・・制御回路、5・・・時分割スイ
ッチ回路、6・・・CPU、7・・・ハイブリットリタ
ーンロス検出回路、8・・・PCMデジタルパターン発
生回路、9・・・PCMレベル検出回路、10・・・ア
ナログ通話路、11.12.13.14・・・デジタル
通話路、15.16.17.18・・・制御線、2−1
・・・ハイブリット回路(HYB)、3−1・・・セレ
クトスイッチ回路、3−2・・・定数回路。 特許出願人 日本電気株式会社、。 代理人  弁理士 井 出 直 孝 実施例の構成 第1図 加入者回路の構成 第2図
FIG. 1 is a block configuration diagram showing the configuration of an embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of the subscriber circuit shown in FIG. 1. FIG. 3 is a diagram showing the relationship between line resistance and hybrid IJ turn loss corresponding to each balanced wiring network. 1...Analog telephone set, 2...Subscriber circuit, 3...
- Balanced wiring network, 4... Control circuit, 5... Time division switch circuit, 6... CPU, 7... Hybrid return loss detection circuit, 8... PCM digital pattern generation circuit, 9...・PCM level detection circuit, 10...Analog communication path, 11.12.13.14...Digital communication path, 15.16.17.18...Control line, 2-1
...Hybrid circuit (HYB), 3-1...Select switch circuit, 3-2...Constant circuit. Patent applicant NEC Corporation,. Agent: Patent Attorney Nao Takashi IdeExample configuration Figure 1 Subscriber circuit configuration Figure 2

Claims (1)

【特許請求の範囲】[Claims] (1)定数が調整できる平衡結線網が接続された二線四
線変換回路を有するアナログ加入者回路と、このアナロ
グ加入者回路を収容する時分割スイッチ回路と を備えたデジタル交換機において、 上記時分割スイッチ回路に収容され、試験信号を発生す
るPCMデジタルパターン発生回路と、上記時分割スイ
ッチ回路に収容され、上記試験信号のレベルに対応して
加入者回線からの反射を測定するPCMレベル検出回路
と、 この測定された反射に基づき上記平衡結線網の定数を自
動的に設定する制御手段と を備えたことを特徴とするデジタル交換機。
(1) In a digital exchange equipped with an analog subscriber circuit having a two-wire/four-wire conversion circuit connected to a balanced connection network whose constants can be adjusted, and a time division switch circuit accommodating this analog subscriber circuit, A PCM digital pattern generation circuit housed in the division switch circuit and generating a test signal; and a PCM level detection circuit housed in the time division switch circuit and measuring reflection from the subscriber line in accordance with the level of the test signal. and control means for automatically setting the constant of the balanced wiring network based on the measured reflection.
JP25434987A 1987-10-08 1987-10-08 Digital exchange Pending JPH0195695A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25434987A JPH0195695A (en) 1987-10-08 1987-10-08 Digital exchange

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25434987A JPH0195695A (en) 1987-10-08 1987-10-08 Digital exchange

Publications (1)

Publication Number Publication Date
JPH0195695A true JPH0195695A (en) 1989-04-13

Family

ID=17263758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25434987A Pending JPH0195695A (en) 1987-10-08 1987-10-08 Digital exchange

Country Status (1)

Country Link
JP (1) JPH0195695A (en)

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