JPH019155Y2 - - Google Patents

Description

[Detailed description of the invention] This invention relates to a gate lead-out structure for an element in a semiconductor device configured as a press-contact type structure, and its purpose is to improve the reliability of the gate line portion,
It is an object of the present invention to provide a gate lead-out structure for an element in a semiconductor device, which is improved in structure and has improved characteristics, simplification and miniaturization of structure, and cost reduction.

Conventionally, a gate lead-out structure of an element in a semiconductor device has been as shown in FIG. 1 in the diagram
is a cathode electrode, 2 is a ceramic case, 3 is a gate extraction pipe, 4 is a relay terminal fixing jig, 5
is a gate crimp terminal, 6 is an aluminum gate line, 7 is a semiconductor element, 8 is an anode electrode,
It is characterized by the crimping structure of the gate wire 6 and the ultrasonic welding of the gate wire lead-out.

That is, the gate extraction from the semiconductor element 7 is
A gate terminal is drawn out by ultrasonic welding of the gate wire 6, connected to a gate crimp terminal 5, and then connected to a gate draw-out pipe 3.

However, the ultrasonic welding of the gate line 6 is not completely reliable, which is a problem.

In addition, when drawing a large current from the gate line 6 or drawing a current uniformly from the entire gate part, it is necessary to make the gate line thicker or
On the other hand, as the number of gate lines 6 increases, the crimping method and structure of the connection between the gate wires 6 and the gate crimp terminals 5 becomes more complicated, and reliability becomes a problem. There is also the problem of residual flux in the soldered parts.

This invention was made to solve the above-mentioned drawbacks and problems of the prior art.

Next, this invention will be explained with reference to an embodiment shown in FIG. Most of its configuration is the same as that of the conventional example shown in FIG. 1, and is indicated by the same reference numerals. That is,
A semiconductor element 7 is connected to a cathode electrode 1 and an anode electrode 8.
This is a semiconductor device which is held under clamping pressure by 5 in the figure.
4 is an elastic O-ring fitted and attached so as to abut on the stepped portion 1a of the cathode electrode 1; 4 is an elastic O-ring that is brought into contact with the O-ring 5 at the upper corner of the inner corner to be sufficiently isolated and insulated from the cathode electrode 1; And the semiconductor element 7
This is a relay ring that uniformly contacts and connects the entire gate section of the gate. This relay ring 4 is fitted inside the ceramic case 2. A gate extraction pipe 3 penetrates the ceramic case 2 in the radial direction...
is connected to the relay ring by a gate wire 6 such as a copper wire or a silver wire. The cathode electrode 1 and the anode electrode 8 are constructed by fixing a ceramic case 2 to a flange 9 on the outer periphery of the anode electrode 8, and combining a flange 10 that projects above the ceramic case 2 with a flange 11 provided on the outer periphery of the cathode electrode 1. By doing this, they are assembled in a pressed state with appropriate pressure.

Next, to explain the operation of the semiconductor device having the above configuration, a relay ring 4 is provided which contacts the O-ring 5, and the cathode electrode 1 and the semiconductor element 7 are insulated by the O-ring 5.
positioning. Most of the pressure when pressurizing the cathode electrode 1 and the anode electrode 8 is absorbed by the elasticity of the O-ring 5, so that no large force is directly applied to the semiconductor element 7. On the other hand, the gate line 6... is also performed to bring about the characteristics of the pressure welding structure. Therefore, no ultrasonic welding or soldering is necessary. Furthermore, since the relay ring 4 is provided, a large and uniform current can be drawn from the entire gate of the semiconductor element 7. Since a copper wire or a silver wire is used as the gate wire 6, when the gate lead-out pipe 3 is crushed, there is no risk of the wire breaking unlike the conventional aluminum wire.

Next, the effects of this idea will be explained.

Since the gate lead-out structure of the element in the semiconductor device of this invention has the above configuration, there is no need for any ultrasonic welding for gate line lead-out, which is a crimping structure for gate lines. will improve. Further, a large current can be drawn out uniformly from the entire gate portion of the semiconductor device, resulting in a significant improvement in characteristics. Furthermore, since the O-ring is used to press the relay ring, insulate the gate and cathode electrodes, and position the relay ring, it is possible to simplify the structure, reduce costs, and downsize the insulating case (ceramic case). Can be done. Furthermore, it is possible to prevent disconnection of the gate line when pressurizing the cathode electrode and the anode electrode.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a semiconductor device to which a conventional gate lead-out structure is applied, and FIG. 2 is a cross-sectional view of a semiconductor device to which the gate lead-out structure of this invention is implemented. 7... Semiconductor element, 1... Cathode electrode, 8...
...Anode electrode, 5...O ring, 4...Relay ring, 2...Ceramic case (insulation case),
3...Gate extraction pipe, 6...Gate line.

Claims (1)

[Scope of Claim for Utility Model Registration] In a semiconductor device in which a semiconductor element is held between a cathode electrode and an anode electrode, (a) an elastic O-ring is attached to the cathode electrode, and (b) the entire gate portion of the semiconductor element is attached. (c) the O-ring and the relay ring are brought into contact with each other to separate the cathode electrode and the relay ring, and (d) the gate lead-out pipe passing through the insulating case and the relay ring are connected to the gate line. A gate lead-out structure of an element in a semiconductor device characterized by the following configuration: