JPH0184148U - - Google Patents
Info
- Publication number
- JPH0184148U JPH0184148U JP1987179697U JP17969787U JPH0184148U JP H0184148 U JPH0184148 U JP H0184148U JP 1987179697 U JP1987179697 U JP 1987179697U JP 17969787 U JP17969787 U JP 17969787U JP H0184148 U JPH0184148 U JP H0184148U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- microcomputer
- outputs
- predetermined value
- counting means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図は本考案の暴走検出回路の一実施例を示
したブロツク図、第２図は第１図に示したマイク
ロコンピユータの動作フローチヤート、第３図は
、第１図に示した回路の動作タイムチヤート、第
４図は従来の暴走検出回路の一例を示したブロツ
ク図、第５図は第４図に示した回路の動作タイム
チヤートである。
１１……マイクロコンピユータ、１２，１３…
…カウンタ、１４……ラツチ回路、１５……警報
回路。
Fig. 1 is a block diagram showing an embodiment of the runaway detection circuit of the present invention, Fig. 2 is an operation flowchart of the microcomputer shown in Fig. 1, and Fig. 3 is a block diagram of the circuit shown in Fig. 1. 4 is a block diagram showing an example of a conventional runaway detection circuit, and FIG. 5 is an operation time chart of the circuit shown in FIG. 4. 11... Microcomputer, 12, 13...
...Counter, 14...Latch circuit, 15...Alarm circuit.
Claims (1)
ると共に、リセツトされるとリセツト期間中第２
の信号を出力し、且つ、自己を再起動するルーチ
ンを起動するマイクロコンピユータの暴走検出回
路において、前記第１の信号の周期が所定値以上
になつたことを検出して前記マイクロコンピユー
タをリセツトする第１のカウント手段と、前記第
２の信号の周期が所定値以上になつたことを検出
して前記マイクロコンピユータを待機状態とする
第２のカウント手段と、前記第２のカウント手段
によつて前記第２の信号の周期が所定値以上にな
つたことが検出されるとこれを報知する報知手段
とを具備したことを特徴とする暴走検出回路。 It outputs the first signal every time the main routine is processed, and when it is reset, it outputs the second signal during the reset period.
In a runaway detection circuit of a microcomputer that outputs a signal and starts a self-restarting routine, detects that the cycle of the first signal exceeds a predetermined value and resets the microcomputer. a first counting means; a second counting means for detecting that the cycle of the second signal has exceeded a predetermined value and placing the microcomputer in a standby state; and the second counting means. A runaway detection circuit comprising: a notification means for notifying when it is detected that the period of the second signal has exceeded a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987179697U JPH0184148U (en) | 1987-11-27 | 1987-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987179697U JPH0184148U (en) | 1987-11-27 | 1987-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0184148U true JPH0184148U (en) | 1989-06-05 |
Family
ID=31471243
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987179697U Pending JPH0184148U (en) | 1987-11-27 | 1987-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0184148U (en) |
-
1987
- 1987-11-27 JP JP1987179697U patent/JPH0184148U/ja active Pending