JPH0182557U - - Google Patents
Info
- Publication number
- JPH0182557U JPH0182557U JP1987178451U JP17845187U JPH0182557U JP H0182557 U JPH0182557 U JP H0182557U JP 1987178451 U JP1987178451 U JP 1987178451U JP 17845187 U JP17845187 U JP 17845187U JP H0182557 U JPH0182557 U JP H0182557U
- Authority
- JP
- Japan
- Prior art keywords
- solid
- image sensor
- state image
- imaging device
- additionally machined
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003384 imaging method Methods 0.000 claims description 4
- 238000003754 machining Methods 0.000 claims 1
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Solid State Image Pick-Up Elements (AREA)
- Transforming Light Signals Into Electric Signals (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987178451U JPH0182557U (US07534539-20090519-C00280.png) | 1987-11-24 | 1987-11-24 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1987178451U JPH0182557U (US07534539-20090519-C00280.png) | 1987-11-24 | 1987-11-24 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0182557U true JPH0182557U (US07534539-20090519-C00280.png) | 1989-06-01 |
Family
ID=31470067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1987178451U Pending JPH0182557U (US07534539-20090519-C00280.png) | 1987-11-24 | 1987-11-24 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0182557U (US07534539-20090519-C00280.png) |
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1987
- 1987-11-24 JP JP1987178451U patent/JPH0182557U/ja active Pending