JPH0168524U - - Google Patents
Info
- Publication number
- JPH0168524U JPH0168524U JP1987165025U JP16502587U JPH0168524U JP H0168524 U JPH0168524 U JP H0168524U JP 1987165025 U JP1987165025 U JP 1987165025U JP 16502587 U JP16502587 U JP 16502587U JP H0168524 U JPH0168524 U JP H0168524U
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- processing unit
- information processing
- processing device
- frequency conversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 2
- 230000010365 information processing Effects 0.000 claims 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Description
図はこの考案の一実施例が適用されたＰＯＳ端
末装置の電気的構成を示す概略ブロツク図である
。
図において、１はＣＰＵ、２は周波数切換部、
３は発振回路、４はスイツチ、２１はフリツプフ
ロツプ、２２および２３はアンドゲート、２４は
オアゲート、４１ないし４３はスイツチの端子を
示す。
The figure is a schematic block diagram showing the electrical configuration of a POS terminal device to which an embodiment of this invention is applied. In the figure, 1 is a CPU, 2 is a frequency switching unit,
3 is an oscillation circuit, 4 is a switch, 21 is a flip-flop, 22 and 23 are AND gates, 24 is an OR gate, and 41 to 43 are switch terminals.
Claims (1)
と、 クロツク信号に基づいて動作する中央処理装置
とを含む情報処理装置において、 前記クロツク信号発生手段からのクロツク信号
を予め定める周波数のクロツク信号に変換する周
波数変換手段と、 前記中央処理装置へのクロツク信号の供給源を
、前記クロツク信号発生手段または前記周波数変
換手段にオペレータが択一的に切換えるための切
換手段とを備えた情報処理装置。[Claims for Utility Model Registration] In an information processing device including a clock signal generating means for generating a clock signal and a central processing unit operating based on the clock signal, the clock signal from the clock signal generating means has a predetermined frequency. a frequency conversion means for converting the clock signal into a clock signal; and a switching means for an operator to selectively switch the supply source of the clock signal to the central processing unit to the clock signal generation means or the frequency conversion means. Information processing device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987165025U JPH0168524U (en) | 1987-10-28 | 1987-10-28 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987165025U JPH0168524U (en) | 1987-10-28 | 1987-10-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0168524U true JPH0168524U (en) | 1989-05-02 |
Family
ID=31451137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987165025U Pending JPH0168524U (en) | 1987-10-28 | 1987-10-28 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0168524U (en) |
-
1987
- 1987-10-28 JP JP1987165025U patent/JPH0168524U/ja active Pending
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