JPH0167823U - - Google Patents
Info
- Publication number
- JPH0167823U JPH0167823U JP1987164300U JP16430087U JPH0167823U JP H0167823 U JPH0167823 U JP H0167823U JP 1987164300 U JP1987164300 U JP 1987164300U JP 16430087 U JP16430087 U JP 16430087U JP H0167823 U JPH0167823 U JP H0167823U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- direct current
- series
- inductor
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000903 blocking effect Effects 0.000 claims 1
- 239000003990 capacitor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Filters And Equalizers (AREA)
Description
第１図は本考案によるインダクタの一実施例を
示す回路図、第２図および第３図は該実施例の具
体例を示す回路図、第４図は従来のインダクタの
構造を示す平面図である。
FIG. 1 is a circuit diagram showing an embodiment of an inductor according to the present invention, FIGS. 2 and 3 are circuit diagrams showing specific examples of the embodiment, and FIG. 4 is a plan view showing the structure of a conventional inductor. be.
Claims (1)
デンサとを直列に接続し、該直列回路に並列に、
直流に対して低インピーダンスを有し、かつ交流
に対して高インピーダンスを有する直流バイパス
回路を接続したことを特徴とする直流重畳回路用
インダクタ。 ２ 前記直流バイパス回路が、前記直列回路に並
列に接続されたトランジスタと、該トランジスタ
のベースあるいはゲートと前記直列回路との間に
設けられた交流遮断用バイアス回路とからなるこ
とを特徴とする直流重畳回路用インダクタ。[Claims for Utility Model Registration] 1. An inductance element with a magnetic core and a DC interrupting capacitor are connected in series, and in parallel to the series circuit,
An inductor for a direct current superimposition circuit, characterized in that a direct current bypass circuit having low impedance to direct current and high impedance to alternating current is connected. 2. A direct current characterized in that the direct current bypass circuit comprises a transistor connected in parallel to the series circuit, and an alternating current blocking bias circuit provided between the base or gate of the transistor and the series circuit. Inductor for superimposed circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987164300U JPH0167823U (en) | 1987-10-27 | 1987-10-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987164300U JPH0167823U (en) | 1987-10-27 | 1987-10-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0167823U true JPH0167823U (en) | 1989-05-01 |
Family
ID=31449787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987164300U Pending JPH0167823U (en) | 1987-10-27 | 1987-10-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0167823U (en) |
-
1987
- 1987-10-27 JP JP1987164300U patent/JPH0167823U/ja active Pending
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