JPH0164078U - - Google Patents

Info

Publication number
JPH0164078U
JPH0164078U JP1987159653U JP15965387U JPH0164078U JP H0164078 U JPH0164078 U JP H0164078U JP 1987159653 U JP1987159653 U JP 1987159653U JP 15965387 U JP15965387 U JP 15965387U JP H0164078 U JPH0164078 U JP H0164078U
Authority
JP
Japan
Prior art keywords
memory
display
data
converter
observation device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1987159653U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987159653U priority Critical patent/JPH0164078U/ja
Publication of JPH0164078U publication Critical patent/JPH0164078U/ja
Pending legal-status Critical Current

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  • Test And Diagnosis Of Digital Computers (AREA)
  • Recording Measured Values (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案による波形観測装置のブロツ
ク線図、第2図は第1図に示されているメモリコ
ントローラのブロツク線図、第3図はメモリコン
トローラの変形例にかかるブロツク線図、第4図
は従来例を示したブロツク線図である。 図中、1はA/D変換器、2a,2bはメモリ
、3はメモリコントローラ、3aはアドレスカウ
ンタ、3bは出力ポート、4はCPU、5はデイ
スプレイメモリ、6はデイスプレイコントローラ
、7はデイスプレイである。
FIG. 1 is a block diagram of the waveform observation device according to this invention, FIG. 2 is a block diagram of the memory controller shown in FIG. 1, and FIG. 3 is a block diagram of a modified example of the memory controller. FIG. 4 is a block diagram showing a conventional example. In the figure, 1 is an A/D converter, 2a and 2b are memories, 3 is a memory controller, 3a is an address counter, 3b is an output port, 4 is a CPU, 5 is a display memory, 6 is a display controller, and 7 is a display. be.

Claims (1)

【実用新案登録請求の範囲】 (1) アナログ入力信号をデジタル信号に変換す
るA/D変換器と、該A/D変換器からのデータ
を格納するメモリおよび同メモリの書込みアドレ
ス等を指定するメモリコントローラと、上記メモ
リに格納されたデータを順次読出し表示用データ
に変換してデイスプレイメモリに転送するデイス
プレイコントローラを含む中央処理手段(CPU
)と、上記デイスプレイメモリから読み出される
データを表示するデイスプレイ手段とを備えてな
る波形観測装置において、 上記A/D変換器からのデータを格納する少な
くとも2つのメモリを備えていて、所定のデータ
をそのいずれかのメモリに保存し得るようにした
ことを特徴とする波形観測装置。 (2) 上記メモリは一つのメモリ装置内を分割し
てなる実用新案登録請求の範囲第1項記載の波形
観測装置。
[Claims for Utility Model Registration] (1) Specifying an A/D converter that converts an analog input signal into a digital signal, a memory that stores data from the A/D converter, and the write address of the memory, etc. A central processing means (CPU) including a memory controller and a display controller that sequentially reads and converts the data stored in the memory into data for display and transfers the data to the display memory.
) and display means for displaying data read from the display memory, the waveform observation device comprising at least two memories for storing data from the A/D converter, and display means for displaying data read from the display memory, the waveform observation device comprising at least two memories storing data from the A/D converter, A waveform observation device characterized in that it can be stored in any of the memories. (2) The waveform observation device according to claim 1, wherein the memory is formed by dividing a single memory device.
JP1987159653U 1987-10-19 1987-10-19 Pending JPH0164078U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987159653U JPH0164078U (en) 1987-10-19 1987-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987159653U JPH0164078U (en) 1987-10-19 1987-10-19

Publications (1)

Publication Number Publication Date
JPH0164078U true JPH0164078U (en) 1989-04-25

Family

ID=31441037

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987159653U Pending JPH0164078U (en) 1987-10-19 1987-10-19

Country Status (1)

Country Link
JP (1) JPH0164078U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06317608A (en) * 1993-04-05 1994-11-15 Sony Tektronix Corp Wave form display method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06317608A (en) * 1993-04-05 1994-11-15 Sony Tektronix Corp Wave form display method

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