JPH0159892U - - Google Patents
Info
- Publication number
- JPH0159892U JPH0159892U JP15448087U JP15448087U JPH0159892U JP H0159892 U JPH0159892 U JP H0159892U JP 15448087 U JP15448087 U JP 15448087U JP 15448087 U JP15448087 U JP 15448087U JP H0159892 U JPH0159892 U JP H0159892U
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- circuit
- voltage dividing
- display tube
- fluorescent display
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Electric Clocks (AREA)
Description
第1図は、本考案の実施例に係る時計の輝度調
整回路の回路図。第2図は、第1図のタイムチヤ
ート。
2……時計回路、4……螢光表示管、6,8…
…抵抗、10……第1のトランジスタ、16……
ライトスイツチ、18……第2のトランジスタ、
28……パルス発生回路。
FIG. 1 is a circuit diagram of a brightness adjustment circuit for a watch according to an embodiment of the present invention. Figure 2 is the time chart of Figure 1. 2... Clock circuit, 4... Fluorescent display tube, 6, 8...
...Resistor, 10...First transistor, 16...
Light switch, 18... second transistor,
28...Pulse generation circuit.
Claims (1)
時出力を表示する螢光表示管と、外部操作に応じ
てデユーテイ比の異なるパルス列を発生するパル
ス発生回路と、ライトスイツチと、前記螢光表示
管のグリツド端子に分圧出力端子が接続された分
圧抵抗と、コレクタ端子に前記分圧抵抗を介して
電源が接続されるとともにベース端子に前記ライ
トスイツチが接続された第1のトランジスタと、 コレクタ端子に前記螢光表示管のグリツド端子
が接続されるとともにベース端子に前記パルス発
生回路の出力端子が接続された第2のトランジス
タを有することを特徴とする時計の輝度調整回路
。[Scope of Claim for Utility Model Registration] A clock circuit that measures time, a fluorescent display tube that displays the clock output of this clock circuit, a pulse generation circuit that generates pulse trains with different duty ratios in response to external operations, and a light. a switch, a voltage dividing resistor having a voltage dividing output terminal connected to the grid terminal of the fluorescent display tube, a power supply connected to the collector terminal via the voltage dividing resistor, and a base terminal connected to the light switch. and a second transistor, the collector terminal of which is connected to the grid terminal of the fluorescent display tube, and the base terminal of which is connected to the output terminal of the pulse generating circuit. Brightness adjustment circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15448087U JPH0159892U (en) | 1987-10-08 | 1987-10-08 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15448087U JPH0159892U (en) | 1987-10-08 | 1987-10-08 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0159892U true JPH0159892U (en) | 1989-04-14 |
Family
ID=31431247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15448087U Pending JPH0159892U (en) | 1987-10-08 | 1987-10-08 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0159892U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS533273A (en) * | 1976-06-29 | 1978-01-12 | Toyota Motor Co Ltd | Digital clock for automobile |
JPS5616089B2 (en) * | 1977-03-18 | 1981-04-14 |
-
1987
- 1987-10-08 JP JP15448087U patent/JPH0159892U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS533273A (en) * | 1976-06-29 | 1978-01-12 | Toyota Motor Co Ltd | Digital clock for automobile |
JPS5616089B2 (en) * | 1977-03-18 | 1981-04-14 |
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