JPH0158900B2 - - Google Patents

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention connects a plurality of information processing devices to a common information transmission bus, and provides each information processing device with a function to acquire control over the information transmission bus. Regarding the improvement of an information transmission method in which information is transmitted under the control of an information processing device that has acquired control, and more specifically, in the above-mentioned method, it is possible to transmit information from any information processing device to multiple information processing devices. The present invention relates to an information transmission method that can improve transmission efficiency when transmitting the same data.

[Conventional technology and problems]

When transmitting and receiving information between multiple information processing devices, connecting each information processing device using a separate transmission line has the disadvantage of increasing the cost of the transmission line, and also requires multiple pieces of information to be connected to each information processing device. Since a transmission device must be provided, the device has the disadvantage of being expensive.

In order to improve such shortcomings, conventionally, as shown in _{FIG .}
The information processing devices 1 to _N consisting of A ₁ to A N are connected to a common information transmission bus (hereinafter referred to as bus) CL, and the communication control units TR ₁ to TR _N are provided with a function to acquire control over the bus CL. A system has been proposed in which information is transmitted and received under the control of an information processing device that has acquired control over the information processing device. That is, the information processing device that has acquired control of the bus line issues an information transmission command to other information processing devices at the request of information processing section A, actively transmitting and receiving information from information processing section A, and at other times. operates to passively transmit and receive information from the information processing section A in accordance with instructions from another information processing device that has acquired bus control. Each information processing device is assigned a unique machine number (address) 1 to N, and the communication control unit TR controls the bus line CL.
When sending information to the bus line CL, add the address of the destination information processing device to this information and send it.
When receiving information from a mobile device, it has a function of selectively receiving information with an address that matches the address assigned to itself.

The information transmission procedure in the conventional example is as shown in FIGS. 2a to 2c. That is, the communication control unit of the information processing device 1 given machine number 1 now
If the bus control right is set to TR ₁ , in order to establish the bus control right, TR 1 transmits a control right establishment signal ELS ₁ to the bus CL as shown in FIG. 2a.
The communication control unit TR of other information processing equipment uses this signal.
Upon receiving ELS ₁ , it performs a reset operation on its own control right setting means to prevent bus line control from being established redundantly in a plurality of communication control units. Next, if the information processing unit A ₁ of the information processing device 1 has data DT ₂ to be transmitted to the information processing device 2, the communication control unit TR ₁ sends an information transmission request with the machine number 2 of the information processing device 2 added. Signal SEQ ₂ is emitted. The communication control unit TR ₂ of the information processing device 2 that received this signal SEQ ₂ agrees with its own machine number, so if it is in a receiving ready state, it sends the reception ready signal ACK ₂ .
Send. When the communication control unit TR ₁ receives the signal ACK ₂ from the communication control unit TR ₂ , it reads the transmission data DT ₂ from the information processing unit A ₁ to the information processing device 2 and transmits it to the bus line CL. The communication control unit TR ₂ receives the data DT ₂ from the bus CL, performs an error check, and if the data is confirmed to be correct,
This data is written to the information processing section _A2 and a reception completion signal _RAK2 is sent to the bus line CL. The communication control unit TR ₁ ends the series of information transmission by receiving this reception completion signal RAK ₂ . After completing the information transmission, the communication control unit TR ₂ sends a bus control right setting signal SEL ₂ to the next information processing device 2 according to a predetermined order or arbitrarily, for example, to transfer the bus control right. At this time, the communication control unit
The control rights setting means of TR ₁ is reset.

The communication control unit TR ₂ of the information processing device 2, which has received the bus control right setting signal SEL ₂ , sets the control right setting means and sends the control right establishment signal ELS ₂ via the bus CL as shown in FIG. 2b. and sends it to other communication control units. This allows the communication control unit TR ₂ to
Although CL control is established, assuming that there is no information transmission request to the information processing device 2, the communication control unit
As shown in Figure b, TR ₂ sends a bus control right setting signal SEL ₃ to the communication control unit TR ₃ of the information processing device 3.
Transfer control of the busbar.

When the bus control right is set in the communication control unit TR ₃ in this way, the communication control unit TR ₃ sends out a control right establishment signal ELS ₃ , as shown in FIG. 2c. Here, assuming that the information processing device 3 has a request to read data from the information processing device N, in response to this request, the communication control unit TR ₃ sends a reception request to the communication control unit TR _N of the information processing device N. Send signal REQ _N. The communication control unit TR _N receives this request signal REQ _N and, if it is in a transmittable state, immediately reads and transmits the data D _N held by the information processing unit _AN . Communication control section
TR ₃ receives this data D _N and performs an error check. If there is an error, it issues a retransmission request signal ARQ _N and instructs the communication control unit T _N to retransmit. In response to this command, the communication control unit TR _N retransmits the data D _N , and if this data is correctly received by the communication control unit TR ₃ , the communication control unit
The received data is transferred from TR ₃ to information processing section A ₃ . This completes a series of information transmissions, and the communication control unit TR ₃ resets its own control right setting means and sends a bus control right setting signal SEL ₄ to the next information processing device 4 to transfer control of the bus line. do.

Thereafter, similar operations are performed to transmit and receive information between a plurality of information processing devices via the bus CL.

As mentioned above, each information processing device 1 to N has a bus line.
By providing a function to acquire control of the CL and transmitting and receiving information under the control of the information processing device that has acquired control, an economical configuration (each information processing device is connected by a single bus) is possible. Although it is possible to transmit and receive information between a plurality of information processing apparatuses by providing only one communication control unit in each information processing apparatus, it has the following disadvantages.

That is, in the conventional method described above, when transmitting data from an information processing device that has established dominance to another information processing device, an information transmission request signal is sent with the machine number of the destination information processing device added; Because only the information processing device corresponding to the machine number received the data, the transmission efficiency was extremely low when sending the same data from any information processing device to multiple information processing devices. It was hot. For example, when transmitting the same data DX from the information processing device 1 to the information processing devices 2 to N, the data DX is first transmitted to the information processing device 2 as shown in FIG. Data DX is sent to the information processing device 3 by receiving the reception completion signal RAK ₂ .
and send the data DX to the following information processing devices 4 to N.
The same data DX is sent sequentially.
has to be transmitted (N-1) times, resulting in a disadvantage that the transmission efficiency is extremely poor.

[Purpose of the invention]

The present invention has improved the above-mentioned drawbacks, and its purpose is to improve the transmission efficiency when transmitting the same data from an arbitrary information processing device to a plurality of information processing devices. Examples will be described in detail below.

[Embodiments of the invention]

FIG. 4 is a block diagram showing the basic configuration of an embodiment of the present invention, where 1' to N' are information processing devices;
TR ₁ ′ to TR _N ′ are communication control units, A ₁ ′ to _{A N} ′ are information processing units, and CL′ is a bus bar. Further, FIG. 5 is an operation mode diagram showing an example of an information transmission procedure in the system of the present invention.

Now, suppose that the communication control unit TR ₁ ′ of the information processing device 1′ is set to have bus control authority.
TR ₁ ' is the dominance establishment signal as shown in Figure 5a.
Send ELS ₁ to bus CL'. Next, if the information processing unit A ₁ ' of the information processing apparatus 1' has data DT ₂ to be transmitted to the information processing apparatus 2' and the same data (hereinafter referred to as broadcast data) to be transmitted to a plurality of information processing apparatuses, , an information transmission request signal to which the machine number of the information processing device 2' is added from the communication control unit TR ₁ '.
SEQ ₂ is sent, and by receiving the information transmission request signal SEQ ₂ , the communication control unit TR ₂ ′ sends out a reception ready signal ACK ₂ , and by receiving the signal ACK ₂ , the communication control unit TR ₁ ′ The data DT ₂ from the information processing unit A ₁ ′ is sent to the bus CL ₁ ′. Communication control section
When TR ₂ ' receives the data DT ₂ , it performs an error check, and if it is confirmed that the data is correct, it writes the data DT ₂ to the information processing section A ₂ ' and sends the reception completion signal RAK ₂ to the bus line CL. ’.
When the communication control unit TR ₁ ' receives the reception completion signal RAK ₂ , it generates a bus control right setting signal having the frame structure shown in FIG. 6 with broadcast data added.
SEL ₂ (in this case, it is assumed that control of the bus is transferred to the information processing device 2') is sent to the bus CL', and its own control setting means is reset. In the figure, DA is the destination device number display section that displays the device number of the destination information processing device, CX is the type display section that shows the type of signal, and SA is the device number of the source information processing device. Sender machine number display section that displays the number;
DL is the data length display section that displays the data length of the broadcast data to be transmitted, DX is the data presence display section that displays the presence or absence of broadcast data, BDN is the data number display section that displays the broadcast data number, and BRD is the broadcast The data section that accommodates cast data and the FCS are frame check sections.

This bus control right setting signal SEL ₂ is received by the communication control units TR ₂ ′ to TR N ′ of all other information processing devices 2 ′ to N′, and each communication control unit TR ₂ ′ to _{TR N ′} It is determined whether the control right setting signal SEL ₂ is addressed to the device itself based on the contents of the destination machine number display section DA.
Then, the communication control unit that has determined that the address is for itself (in this case, it is communication control unit TR ₂ ') sets its own control right setting means and sends the message to other communication control units.
_TR3 ' to _TRN ' perform a reset operation of the control right setting means. Then, the communication control unit TR ₂ ′, which has set the control right setting means, transfers the broadcast data stored in the data unit BRD to the information processing unit A based on the contents of the source machine number display unit SA and the data number display unit BDN. Determine whether to store it in ₂ ′. and,
When it is determined that the broadcast data is to be stored in the information processing unit A ₂ ', after the broadcast data is stored, the control establishment signal ELS ₂ is sent to the bus line CL' as shown in FIG. 5b. If it is determined that the broadcast data is not to be stored, a predetermined period of time after receiving the bus control right setting signal SEL ₂ (time proportional to the data length of the broadcast data stored in the data section BRD). After the lapse of time, as shown in FIG. 3B, the control right establishment signal ELS ₂ is sent to the bus line CL'. Also,
Other communication control units TR ₃ ′ to TR _N ′ that performed the reset operation of the control right setting means are accommodated in the data unit BRD based on the contents of the source machine number display unit SA and the data number display unit BDN. It is determined whether the broadcast data is to be stored in the information processing units A ₃ ′ to A _N ′. If it is determined that the broadcast data should be stored, the device enters the reception state after performing the storage process, and if it is determined not to store the data, the device immediately enters the reception state. If the communication control unit TR ₂ ' that has set the control right setting means decides not to store the broadcast data, the control right will be set after a predetermined period of time has elapsed since receiving the bus control right setting signal SEL ₂ . The reason why the establishment signal ELS ₂ is sent out is to prevent the dominance establishment signal ELS ₂ from being sent out while another communication control unit is storing broadcast data.

As described above, the bus control right is set to the information processing device 2', but if there is no data to be transmitted to the information processing section A ₂ ', the communication control section TR ₂ ' immediately transfers the control to the next information processing device. 3' communication control unit TR ₃ ' has the fifth
As shown in FIG. b, the bus control right setting signal SEL ₃ is sent to transfer the bus control right. In this case, the frame structure of the bus control right setting signal _SEL3 is the same as the frame shown in FIG. 6 except that the data section BRD and frame check section FCS are removed.

When the bus mastership is acquired by receiving the bus mastership setting signal SEL ₃ , the communication control unit
TR ₃ ' is the dominance establishment signal as shown in Figure 5c.
Send ELS ₃ . Here, assuming that the information processing device 3' has a request to read data from the information processing device N', in response to this request, the communication control unit TR ₃ '
A reception request signal REQ _N is sent to the communication control unit TR _N ' of the information processing device N. The communication control unit TR _N ′ receives this request signal REQ _N and, if it is in a transmittable state, immediately reads and transmits the data D _N held by the information processing unit A _N ′. The communication control unit TR ₃ ' uses this data.
Upon receiving _DTN , an error check is performed, and if there is an error, a retransmission request signal _ARQN is transmitted to instruct the communication control unit _TRN ' to retransmit. In response to this command, the communication control unit TR _N ′ executes retransmission of the data DT _N , and if this data is correctly received by the communication control unit TR ₃ ′, the received data is sent as information from the communication control unit TR ₃ ′. Transferred to processing unit _A3 . This completes a series of information transmission, and the communication control unit
_TR3 ' resets its own control right setting means and sends a bus line control right setting signal _SEL4 to the next information processing device 4', thereby delegating the bus line control right.

Thereafter, similar operations are performed to transmit and receive information between a plurality of information processing devices via bus line CL'.

As described above, in this embodiment, when transmitting the same data (broadcast data) from any information processing device to multiple information processing devices, the broadcast data is added to the bus control right setting signal. Since the broadcast data is stored simultaneously in a plurality of information processing apparatuses, transmission efficiency can be improved compared to the conventional example in which the same data had to be transmitted multiple times.

FIG. 7 is a block diagram showing the configuration of the communication control unit TR according to the embodiment of the present invention, where CL is a bus line, A is an information processing unit, RED is a receiver, SED is a transmitter,
SET is a bus control right setting device, CPU is a processing device consisting of a microprocessor, etc., M1 is a memory that stores the machine number assigned to the information processing device that includes the communication control unit TR, and M2 is the next bus control unit. A memory in which the machine number of the information processing device to which control is to be transferred is stored, M3 is a memory in which the sender machine number and broadcast data number of the broadcast data to be received are stored, and _RD1 is a serial-to-parallel converter. RD ₂ is a receive data buffer register, SD ₁ is a transmit register consisting of a shift register that performs parallel-to-serial conversion, and SD ₂ is a transmission register that stores data to be transmitted to a specific information processing device. The data buffer register, _SD3 , is a transmit data buffer register in which broadcast data is stored. Also, the 8th
The figure is a flowchart showing the processing contents of the processing device CPU, and the operation of FIG. 7 will be explained below with reference to FIG. 8.

Now, when the bus control right setting signal SEL for delegating the bus control right to the bus CL is sent from the communication control unit of the information processing device that has the bus control right,
Communication control unit of all information processing devices connected to
A receiver RED installed in the TR receives this,
Add to receive register RD ₁ . Then, when the signal of the specified number of bits is taken into the reception register RD ₁ , the reception register RD ₁ sets its output signal a to "1",
As a result, processing by the processing device CPU is started.

The processing unit CPU reads out the information stored in the reception register RD ₁ in parallel, and the received signal based on the contents of the type display section CX becomes the bus control right setting signal SEL.
If it is determined that
Compare the machine number of the destination information processing device stored in the transmission machine number display section DA of SEL with the own machine number stored in the memory M1, and determine whether the bus control right setting signal SEL is addressed to the self. Determine whether or not.

If the comparison results match and it is determined that the bus control right setting signal SEL is addressed to itself, the processing unit CPU sets its output signal b to "1", thereby setting the bus control right setting device SEL. , its output signal c is set to "1". Then the processing unit CPU
determines whether broadcast data is added to the bus control right setting signal SEL based on the contents of the data presence/absence display section DX. If it is determined that broadcast data has been added, the processing unit CPU displays the contents of the source machine number display area DA and data number display area BDN, the broadcast data number stored in memory 3, and the transmission data number. The information processing unit A transmits the broadcast data stored in the data unit BRD based on the original machine number.
Determine whether to store it in If it is determined that broadcast data is to be stored, the data section
The broadcast data stored in the BRD is transferred to the information processing section A via the reception data buffer register _RD2 , and the broadcast data is stored in the information processing section A. After all the broadcast data is stored in the information processing unit A, the processing unit CPU stores the transmission register SD ₁ and the transmitter
A control establishment signal ELS is sent via the SED.
If it is determined that the broadcast data is not to be stored, the processing unit CPU sends a control right establishment signal after a time period T proportional to the number of words of the broadcast data stored in the data section BRD has elapsed.
Send ELS. Also, if it is determined that the data section BRD does not contain broadcast data based on the contents of the data presence/absence display section DX,
The processing unit CPU immediately sends out the dominance establishment signal ELS.

When the control establishment signal ELS is sent, the processing device
The CPU checks whether the output signal d of the transmission data buffer register _SD2 is "1" or "0".
When there is data to be transmitted to a specific other information processing device, the data and the machine number of the destination information processing device are transferred and stored in the transmission data buffer register SD ₂ from the information processing unit A. If data etc. are stored, the output signal d is set to “1”, and if data is not stored, the output signal d is set to “1”.
is set to "0". When the signal d is "1", the processing unit CPU reads the destination machine number stored in the transmission data buffer register SD ₂ , adds it to the transmission request signal SEQ, and sends it to the transmission register SD ₁ . Sends to bus CL via machine SED. Then, when receiving the reception ready signal ACK from the destination information processing device via the bus CL, receiver RED, and reception register RD ₁ , the processing device CPU
sends the data stored in the transmit data buffer register SD ₂ to the bus CL.

Then, upon receiving the reception completion signal RAK from the destination information processing device, the processing device CPU checks whether the output signal e of the transmission data buffer register SD ₃ is “1” or “0”. Also, when the output signal d of the transmit data buffer register SD ₂ is “0”, the transmit data buffer register SD ₃
Check whether the output signal e of is "1". In the transmission data buffer register SD ₃ , when there is broadcast data to be transmitted to multiple other information processing devices, the broadcast data and the broadcast data number data length are transferred from the information processing unit A and stored therein. If broadcast data or the like is stored, the output signal e is set to "1", and if not stored, the output signal e is set to "0". When the signal e is "1", the data processing is performed based on the contents stored in the transmission data buffer register _SD3 and the machine number of the information processing device to which bus control is to be transferred next, which is stored in the memory M2. A bus control right setting signal SEL ₁ having the frame structure shown in FIG. 6 is created and sent to the bus CL. Also, if the signal e is “0”, the memory M2
Bus control right setting signal with no broadcast data created based on the memory contents of
Send SEL ₁ to bus CL.

If the received bus control right setting signal SEL is addressed to itself, the above-mentioned processing is performed, but if it is not addressed to itself, the following processing is performed.

That is, if it is determined that the received bus control right setting signal SEL is not addressed to itself, the processing device CPU sets its output signal f to "1", thereby resetting the bus control right setting device SET, and changing its output signal c.
is set to “0”. Next, the processing unit CPU displays the data presence/absence display section of the received bus control right setting signal SEL.
Based on the contents of the DX, it is determined whether broadcast data is added. If it is determined that broadcast data has been added, the processing unit CPU uses the data stored in the memory M3 based on the contents of the source machine number display section SA and data number display section BDN and the contents stored in the memory M3, as described above. It is determined whether the broadcast data added to the bus control right setting signal SEL is to be stored in the information processing section A. If it is determined that the broadcast data is to be stored, the processing unit CPU transfers the received broadcast data to the information processing unit A via the reception data buffer register _RD2 ,
Store it. Then, once all the broadcast data is stored in the information processing section A, the processing device
The CPU enters the receiving state. Also, when it is determined that the broadcast data is not stored or when it is determined that the broadcast data is not added, the processing device CPU enters the receiving state as described above.

In the embodiment, a case has been described in which a plurality of information processing devices are connected in parallel to a bus, but it goes without saying that the present invention can also be applied to a case in which a plurality of information processing devices are connected vertically to a bus.

〔Effect of the invention〕

As explained above, the present invention provides an additional means (comprised of a processing device CPU, etc. in the embodiment) for adding broadcast data to a bus control right setting signal.
is provided in each information processing device, and when broadcast data exists, sends a bus control right setting signal to which broadcast data is added to the bus,
Since the data is received by other information processing devices at the same time, it is possible to send the same data to multiple information processing devices, compared to the conventional example in which the data had to be sent to each information processing device. There is an advantage that transmission efficiency can be improved when transmitting to.

[Brief explanation of drawings]

Figure 1 is a block diagram of the conventional example, Figures 2 and 3.
4 is a block diagram of the embodiment of the present invention, FIG. 5 is a diagram of the information transmission operation mode of the present invention, and FIG. 6 is a diagram of the bus control right setting signal. FIG. 7 is a block diagram showing the structure of the communication control section, and FIG. 8 is a flowchart showing the processing operation. CL and CL' are bus lines, 1 to N, 1' to N' are information processing devices, TR ₁ to TR _N , TR ₁ ' to TR _N ' are communication control units,
A ₁ to _{A N} , A ₁ ′ to _{A N} ′ are information processing units, RED is a receiver, SED is a transmitter, SET is a bus mastership setter,
CPU is a processing unit, M ₁ to _{M 3} are memories, RD ₁ is a reception register, RD ₂ is a reception data buffer register,
SD ₁ is a transmission register, and SD ₂ and SD ₃ are transmission data buffer registers.

Claims (1)

[Claims] 1. An information processing device that has acquired control of the information transmission bus by connecting a plurality of information processing devices to a common information transmission bus, and providing each of the information processing devices with a function of acquiring control of the information transmission bus. When the transmission and reception of information is completed, a bus control right setting signal is sent to transfer control of the information transmission bus to another information processing device, and information is transmitted to the other information processing device. In an information transmission method in which control of a transmission bus is sequentially transferred, each of the information processing devices is provided with an additional means for adding broadcast data to be sent to a plurality of information processing devices to the bus setting signal, If the broadcast data exists, the information processing device that has acquired the control right sends a bus control right setting signal to which the broadcast data is added by the adding means, and all other information processing devices transmit the bus control right setting signal to which the broadcast data is added. An information transmission method characterized by simultaneously receiving a bus control right setting signal to which is added.