JPH0152705B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates generally to optical encoders used in operator positionable variable range mark circuits for radar displays. Such range marks are used by the operator to determine the distance from the radar zero position to the selected target on which the range mark is placed. Conventional radar systems using variable range rings operated primarily using analog signal processing in PPI mode. Received radar signals were displayed on substantially the same frequency as they were received. Such radar devices have operated reasonably well over long ranges where the writing speed on the cathode ray tube screen of the device's display is slow enough to produce acceptable high brightness levels.
Also, the distance to the target could be determined with a substantially sufficient amount of accuracy during the time normally associated at long ranges. However, for short distance ranges, the writing speed of the cathode ray tube beam has become unacceptably high, thereby reducing the brightness level to an unacceptably low level. Furthermore,
As the distance range decreased, it became increasingly difficult to accurately measure the distance to a target because the time involved became shorter. In devices using analog signal processing, the range mark signal was generated as the output of a timer. The position of the distance mark on the screen of the cathode ray tube is connected to the timer R- which is used to set the time between timer activation and pulse output.
determined by the time constant of the C circuit. Most often, the potentiometer used for the resistance was an operator control device used to move the distance mark. According to this device, a given angle of rotation of the potentiometer moved the distance mark on the screen by different amounts depending on the setting of the distance scale. For short distance ranges the distance mark will move a relatively large distance for a small rotation of the potentiometer, whereas for a long distance range the distance mark will move an almost imperceptible amount. Don't let it happen. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to optically generate a signal representing the display position of a variable distance mark on a display device of a radar, and to digitally control the signal to determine the distance mark relative to rotation of an encoder wheel-shaped member. An object of the present invention is to provide an optical encoder device capable of moving a variable distance mark while keeping the amount of movement constant. These and other objects of the present invention are accomplished by providing an optical encoder device having an encoder wheel with a plurality of generally parallel slots in its cylindrical periphery. An end cap closes one end of this cylinder,
A rotating shaft is attached to this end cap. A light emitting device, such as a light emitting diode, is provided near the outer surface of the periphery of the encoder wheel.
The light emitting element is oriented such that the light emitted from it passes through the slot and toward the central axis of the encoder wheel. A light-receiving element (for example, a phototransistor) that generates an electric signal is provided inside the encoder wheel-like member and faces the light-emitting element. As the encoder wheel-shaped member rotates, the optical path between the light source of the light emitting element and the light receiving element, that is, the detection element is alternately closed and opened. In this way, an output signal is generated from the photodetecting element as the encoder wheel-like member rotates. One pulse is generated from each sensing element each time it passes through each slot. These detection elements are arranged with respect to the slot so that their output signals are out of phase with each other. In the embodiment, the output signals from the two detection elements are arranged such that they have a phase difference of 90° (1/4 cycle) from each other. A circuit is provided for processing the output signal of the sensing element to produce a digital number representative of the amount of rotation of the encoder wheel. An amplifier connected to the output of the sensing element amplifies the output signal to a level sufficient to operate the digital circuit. The rotation direction is detected from the amplified output signal of the detection element by a circuit including a plurality of exclusive OR gates. The counter (a reversible binary counter can be used) is arranged to increase for one direction of rotation and decrease for the opposite direction of rotation. The output count value of the counter is proportional to the amount of rotation of the encoder wheel member. FIG. 1 shows a system constructed according to the teachings of the present invention.
A basic block diagram of a PPI radar device is shown. The radar system consists of three basic units: an indicator unit 140, a modulator/receiver (MODULATOR);
The antenna unit 101 consists of a TRANSMITTER-RECEIVER (hereinafter referred to as "MTR") unit 102 and an antenna unit 101. Display unit 140, which provides a display of radar information and includes a plurality of operating controls for the radar system, is typically mounted on the bridge of a ship for convenient navigational use and ease of operation. In practice, the antenna unit 10 is mounted as high as possible with an unobstructed antenna beam path to maximize the distance range of the unit. MTR unit 10
2 is a high power transmission pulse coupled to the antenna unit 101 and a high power transmission pulse from the antenna unit 101.
In practice, it is mounted as close as possible to the antenna unit 101 in a location that is protected from the elements so as to minimize loss in the low level received signal coupled to the MTR unit 102. Display unit 140 and MTR unit 1
02 each have separate power modules 17
4 and 122. Both are AC 60 cycles 1
10 volts or any other normally available primary input power source suitable for receiving electrical energy from the ship's power source and using it to operate the various electronic circuits and electromechanical devices located within these two units. Convert to DC voltage. Kauruni MTR
The power supply module 122 is the antenna unit 101
The antenna is rotated by supplying operating power to an electric motor contained therein. By providing a separate power module for each of these two remotely located primary operating units, losses in the cables between these units that occur in conventional units are avoided. Furthermore, in the device according to the invention, on/off control of the MTR power module 122 is performed from the indicator unit 140 simply by using low signal level control voltages. Therefore,
Full control is maintained at the display unit without significant power consumption or losses in long cables running between units. Each radar pulse cycle is indicated by indicator unit 1.
It begins with the generation of an MTR trigger pulse at 40, which trigger pulse is coupled to the MTR unit 102. When I receive this pulse
MTR unit 102 generates high power transmit pulses. This transmission pulse is sent to the antenna unit 101.
The antenna unit 101 radiates its signal outwardly in the form of a narrow beam. Each echo signal from the target is received by the antenna unit 101 and relayed to the receiving section of the MTR unit 102. The receiving section of the MTR unit 102 amplifies and detects this received echo signal and sends it to the display unit 1.
40. The beginning of this video signal is marked by an "accept pulse" generated within MTR unit 102. Display unit 140 follows this video signal to produce a visual display of the signal reflected from targets in the path of the radar beam. The azimuthal position of the radar antenna is relayed directly from antenna unit 101 to display unit 140 to indicate the angle on the display screen at which the radar echo signal is to be displayed. Referring now to FIG. 2, a detailed block diagram of the radar system 100 shown in FIG. 1 is shown. Antenna unit 101 is a rotatable antenna 10 capable of emitting and receiving signals within the frequency range of radar pulses.
It has 4. Antenna 104 is a section of waveguide 1
05 to a set of gears 108. Electric motor 106 is mechanically coupled to antenna 104 via gear 108 and connects antenna 1
04 is rotated at a substantially constant and predetermined speed. Antenna resolver 112 is also coupled to gear 108 and antenna 104 via its input rotation axis. Its input shaft is preferably rotated at the same speed as antenna 104. transmitted to antenna 104 or transmitted to antenna 104
The signals coming from the antenna unit 101 are coupled to a duplexer 114 via a rotary connection 110 and a waveguide section 115 in the antenna unit 101. The received signal is routed through duplexer 114 and through passive limiter 116 to the input of receiver 120 . Transmission/reception switch 11
4 isolates the transmitted pulses generated by the transmitter/modulator 118 from the receiver 120 and connects the waveguide 11 to
These received signals directly from 5 are coupled to the input of receiver 120 with substantially no loss. Passive limiter 116 provides an absolute amplitude limit to the input signal to prevent the input circuitry of receiver 120 from becoming overloaded with signals picked up from nearby radar transmitters. The transmitter/modulator 118 is a display unit 140
A radar pulse is generated in response to an input trigger signal from a timing generator 144 within the controller. The pulse repetition frequency of the transmitted radar pulses is generated entirely by timing generator 144.
Determined by the repetition frequency of the MTR trigger signal. In prior radar systems where the pulse repetition frequency was a function of the radar range setting, rotating signals representative of the various possible range settings were coupled to the transmitter and modulator. Here, the decoding circuit has determined the pulse repetition frequency that is compatible with the selected distance range. However, with the device according to the invention, only one trigger signal needs to be provided. The width of the transmitted pulse may also be a function of the radar range scale setting. For example, it may be desirable to use narrow pulses at short distance ranges to obtain higher resolution than would be possible using the long pulses necessary to achieve an acceptable signal-to-noise ratio at long distance ranges. However, it has been found that it is not necessary to provide a different pulse width for each possible distance range setting. For example, ten different distance range settings between 0.25 nautical miles and 64 nautical miles are provided in the apparatus of this preferred embodiment of the invention. In practice it is about 60, 500 and 1000 nanoseconds.
It has been found that only two different pulse widths are required. At this time, the timing generator 14 is used to select among these three pulse widths.
4 and the transmitter and modulator 118.
It is only necessary to combine bit-type digital signals. Because fewer types of pulse widths are required than the number of selectable distance scale values, fewer types of lines and signals can be combined with the timing generator 144 and the transmitter and modulator than were required in conventional devices. It is sufficient to pass it between the container 118 and the container 118. In conventional devices, trigger pulses were generated within the MTR unit and coupled to both the modulator and indicator circuits, respectively. Due to certain characteristics of most commonly used modulators, the delay time between the application of the trigger pulse and the actual occurrence of the trigger pulse can vary. This is especially true between distance range comrades. Because of this unpredictable delay difference, targets in previously known radar systems have imprecise sawtooth edges caused by sweeps starting too early or too late. It was often displayed while In a device constructed in accordance with the present invention, this problem has been eliminated. Transmitter and modulator 118 generates an "MTR acknowledge" pulse at the beginning of each transmit pulse. this
The MTR acknowledge pulse is coupled to timing generator 144 to mark the beginning of the start of the radar sweep for each of the video signal processing circuits within display unit 140. Because this MTR approval pulse is precisely aligned with the beginning of each radar pulse, alignment between adjacent sweep lines on separate screens is maintained with high precision. In this way, the actual shape of the target object is accurately represented without creating jagged edges due to inaccurate synchronization of the start of the display sweep with the actual transmitted pulse. Transmitter and modulator 188 also generates a SENSITIVITY TIME CONTROL (hereinafter abbreviated as "STC") signal to control the gain within receiver 120. As is well known in the art, this STC signal is used to vary the gain of receiver 120 during each radar pulse. The gain is reduced for received signals from nearby targets. In this way, the amplifier circuitry within the receiver 120 is protected from being overloaded by strong signals and locally generated interference from nearby targets, producing a display with substantially constant brightness. It is closed. The analog video signal produced at the output of receiver 120 is converted to a serial digital data stream by an analog-to-digital converter 148 within display unit 140. The frequency at which samples of the analog video signal are taken for digitization and the length of time from the beginning of the radar pulse during which the analog video signal is digitized depends on the radar range scale setting. For short distance ranges, high sampling frequencies and short times are used. The digitized video signal is read into storage 150 for storing digital video data under the control of clock pulses from timing generator 144. Digital video data storage storage 150 stores the digitized video signal from the entire radar pulse time. The range in which this signal is stored depends, of course, on the distance scale setting. The digitized video signal is read from the digital video data storage device 150 for display on the cathode ray tube 172 during a second time period, which is also determined by the frequency of the clock pulses coming from the timing generator 144. This second time period can be greater than, less than, or the same as the first time period at which the video signal was read into storage device 150 for storing digital video data. Preferably, the reading is performed immediately after the first time and before the next successive radar time. In a preferred embodiment, this second
is substantially constant and independent of the first time. In this way, with a constant readout time, the writing or deflection frequency of the cathode ray tube 172 beam is also constant, and the resulting display is of constant brightness regardless of the radar range scale setting. For short distance ranges, the digital signal is transferred to a storage device 15 for storing digital video data.
The second time read from zero and displayed is substantially greater than the time the signal is read. Because of this increase in time, the writing frequency of the cathode ray tube 172 beam is reduced from what would be required if the video signals were each displayed at the same frequency as they were received. The brightness of the display at short distance ranges is therefore greatly increased over that of previously known devices. This preferred video signal digitization, storage and readout method is
No. 612,882, filed September 12, 1975 and assigned to the same assignee as the present application. An interference cancellation circuit 152 is provided to eliminate interference caused by nearby radar transmitters operating within the same frequency band. This type of interference, caused by the reception of transmitted pulses from nearby radars, appears in the form of multiple helical arms radiating outward from the center of the radar display. The interference cancellation circuit 152 operates to substantially eliminate this type of interference from the radar display without substantially affecting the display of the desired target. A switch is located on the control pulse 146 to enable the operator to turn the interference cancellation circuit 152 on and off as desired. The details of the configuration of this interference removal circuit 152 are as follows.
U.S. Patent Application No. filed August 13, 1976
It is described in the specification of No. 714171. The final video output signal generated at the output of interference cancellation circuit 152 is passed through video signal adder 160 to video amplifier 1.
66. A variable distance marker circuit 154 is also provided. The variable range marker circuit 154 generates an output video signal in the form of short pulses to display a circular range mark at a distance from the center of the radar display determined by the settings of the range marker adjuster 156. Display device 158 provides the operator with a digital readout of the distance from the radar antenna to the target on which the variable range mark is located. The variable distance mark video signal output from variable distance marker circuit 154 is coupled to video amplifier 166 via video signal adder 160. Indicator unit 14 such as timing generator 144
provides clocks and other timing signals used for various circuits within 0.0. An internal oscillator within timing generator 144 generates clock pulses at a predetermined period. The heading flash from antenna resolver 112 produced each time the antenna beam passes forward of the ship is retimed by a clock pulse produced by an oscillator in timing generator 144, and the video pulse is coupled through a video signal adder 160 to a video amplifier 166 to produce a mark on the screen indicating to the operator when the antenna beam has so passed in the bow direction. Timing generator 144 also generates pulses and MTR trigger signals at predetermined fixed time intervals determined according to the radar range scale settings relayed from control pulses 146.
The MTR acknowledge signal from the transmitter and modulator 118 is used by the timing generator 144 to generate a sweep gate signal that is kept at a high level or active state during the time that the video signal is being received. It is a logical signal to take. This sweep gate signal is set to a high state as soon as the MTR acknowledge signal is received and is set to a low state at the end of the time depending on the distance range setting selected. Mounted on the control panel 146 are various controls operable by an operator to regulate and determine the operation of various circuits within the radar system. A range control device is provided that determines the maximum range within which the target should be displayed. This distance corresponds to the distance of the edge of the screen of a cathode ray tube. An on/off switch is provided and used to operate the MTR power module 122, the motor 106 of the antenna 101 via the MTR power module 122, the interference rejection circuit 152, the variable distance marker circuit 154, and the indicator power module 174. It will be done. A switch is provided at the upper end of the display of the display device to select between the bow direction (the direction the ship is pointing) and the north direction. The northing stabilization circuit 142 converts the signal received from the antenna resolver 112 to the display position resolver 16 in order to generate a display in which the north direction is displayed at the top of the display screen rather than the current bow of the ship.
Modify before joining to 2. Otherwise, the signal from antenna resolver 112 is coupled directly to display position resolver 162 to provide a display in which the heading of the ship is displayed at the top of the screen. Indication position resolver 162 receives an output signal from either antenna resolver 112 or northerly stabilizer circuit 142 in the form of a modulated sine or cosine waveform, and from which it receives a direct current for each radar sweep representing an X and Y sweep increment. Generates voltage. Sweep waveform generator 164 generates X and Y ramp waveforms whose maximum amplitude is determined by the DC voltage from display position resolver 162. The generation of these two ramp waveforms begins at the time marked by the beginning of the delayed sweep gate signal from the interference cancellation circuit 152. This delayed sweep gate signal is generated by delaying the sweep gate signal from timing generator 144 by one or more clock periods to allow interference cancellation circuit 152 to perform its operations. It is. These X and Y gradient waveforms are coupled to X and Y deflection amplifiers 168, respectively, where they are amplified and coupled to the X and Y deflection coils of the cathode ray tube 168.
72 beams are deflected in a manner well known in the art. The output of video amplifier 166 is coupled to the cathode 176 of cathode ray tube 172 to modulate its beam intensity. All other operations for the various circuits within the display unit 140, including the high voltage applied to the accelerating anode of the cathode ray tube 172 and voltages to bias and operate all logic circuitry contained within the display unit 140. Voltage is provided by indicator power module 174. The display power module 174, like the MTR power module 122, is preferably a switching power supply capable of generating multiple voltages with the necessary current supply capability for its output. Display power module 174
and the switching frequency of the MTR power module 122 are selected to be intermediate between the pulse repetition frequency determined by the timing generator 144 according to the distance range setting and the digitization frequency of the analog video signal by the analog-to-digital converter 148. . Interference from the power supply is eliminated by operating these power supply modules at a switching frequency intermediate between the pulse repetition frequency and the digitization frequency. Next, the block diagram in Figure 3 and Figure 4 a.
The operation of the variable distance marker circuit 154 will be described with reference to the circuit diagrams of FIGS. Variable range marker circuit 154 generates a variable range mark video signal having a width of one range cell at range positions selected by variable range marker range adjustment control 156. In this preferred embodiment, the corresponding value of the distance in one of three alternatively selectable distance units (nautical miles, yards and meters) is set at the control panel 14.
A 3- or 6-digit type cathode ray tube 172 on a 3- or 6-digit
It is read on an LED (light emitting diode type) display 158. A three digit display is used for nautical miles and a six digit display is used for yards or meters. The distance mark position of the variable distance mark is determined by the 16-bit distance register 304 (registers 402 and 40).
4) determined by the value stored within. 15 of these 16 bits represent the distance to the distance mark position. The 16th bit gives the "variable distance mark off" instruction. register 402
and 404 are parallel input registers with serial shift capability. For most of the operating time of this circuit, the last bit position of distance register 304 is coupled to the first bit position of distance register 304 via exclusive OR gate 444 in distance range update circuit 302; The bits corresponding to the nine cells in one range of the selected distance range are controlled to be placed in the least significant bit (LSB) position of the distance register 304. The lower nine bits of distance register 304 are used to control variable range mark (VRM) pulse counter 310 (binary counters 431-433). During each sweep gate signal, VRM pulse counter 310 is first preset to the complement of the lower nine bits of distance register 304. When a distance measurement period is initiated by the sweep gate signal, the VRM pulse counter 310 is activated by a cathode ray tube (CRT) clock pulse provided as the distance clock via the range cell clock selector 308.
One count is incremented for each range cell displayed at 172. A VRM video pulse is generated in which the counter 310 counts 511, and a distance mark is displayed. For example, the distance mark is a 15-bit binary word.
Assume that you are at a position represented by 000000000110100 (B ₁₄ to _{B 0} ), and the distance scale at that time is 1.5 miles. The current 9-bit binary word (B ₈ to _{B 0} )
is (000110100) ₂ = (52) ₁₀ . Therefore, the complement is (111001011) ₂ = (511-52) ₁₀ = (459) ₁₀ .
This complement is loaded into counter 310 and generated after 52 counts, ie, (52/511) x 1.5 miles≈0.15 miles. Here, for example, the distance scale is
When changing from 1.5 miles to 3.0 miles, the count value of counter 310 changes from 52 to (c/511) x 3≒
Just change it to “C” which is 0.15 miles. That is,
If you change the distance scale and set C=26, you can keep the distance mark at the same distance position. To reduce the count by half (from 52 to 26), the 15-bit word _B14 - _B0 can be shifted by one bit. Therefore, here, the lower 9 bits of the register 304 are shifted by 1 bit, and _B9 to _B1 , that is, (000011010) ₂ = (26) ₁₀ , are loaded into the counter 310 instead of BH _{to B0} . Bye. In this manner, the bit corresponding to one range cell of the selected distance range is shifted to the least significant bit position of the distance register. If a value greater than (511) ₁₀ occurs in the distance register 304, an overflow is caused by the 10th bit position of the distance register 304.
status is displayed and no VRM video pulses are generated. The value originally stored in the distance register 304 to set the position of the distance mark is modified by two variable distance mark control signals "LEAD" and "LAG". These two signals are generated by the optical resolver device shown in FIGS. 5 and 6. A cylindrical resolver encoder wheel is coupled via a shaft 202 to an operator rotatable knob 208 on a control pulse 206 . The shaft 202 is held in position by a bushing 234. Retaining rings 235 and 236 prevent movement of shaft 202 within bushing 234. Shaft 202 and encoder wheel 203 can be formed from a single piece of plastic for economy. A plurality of longitudinally extending slots cut into the outer surface of the encoder wheel 203 along the periphery of the encoder wheel 203 (preferably the width of the slots and the spacing between the slots are equal) are arranged. be done. In the illustrated embodiment, 50
slots are provided. Brackets 230-233 as shown in FIG. 6 are provided as mechanical support for the light emitting diodes and corresponding phototransistors. Printed circuit board 23 incorporating the circuit shown in FIG.
8 is attached to the support plate 237.
Brackets 230-233 are attached to printed circuit board 237. A line terminal 239 is provided for connection to the outside. The placement of the phototransistor within the encoder wheel 203 is such that stray light within the display cabinet does not cause undesirable operation. Next, referring to the diagram in FIG.
4,245 causes the light emitting diodes 214 and 216 to continuously emit light which is transmitted to a Darlington pair of phototransistors 210 and 2 disposed within the encoder wheel 203.
Send to 12th. Brackets 232 and 233 for light emitting diodes 214 and 216 are located outside encoder wheel 203 at 45 degrees to axis 202, as shown in FIG. The "LEAD" and "LAG" signals are generated at the collector of each phototransistor 210,212. Phototransistor 210, 212
The signals on the collectors of are sent via resistors 243 and 241 to the bases of transistors 247 and 246, respectively. Transistors 247 and 246 provide the final buffering and amplification of the output signal.
Bias is applied through resistors 240 and 242. In the illustrated embodiment, shaft 202 is 1/100
For each rotation, a "LEAD" signal (upper) and a "LAG" signal (lower) are generated, as shown in FIG. In other words, the "LEAD" signal pulse and the "LAG" signal pulse are out of phase with each other by 90 degrees (1/4 period), and when the shaft 202 rotates clockwise, the "LEAD" signal is higher than the "LAG" signal. The phase advances (Figure 7). Therefore, when the shaft 202 rotates counterclockwise, the "LEAD" signal lags behind the "LAG" signal in phase, and the direction of rotation can be easily detected. As previously mentioned, the value stored in the distance register 304 is arranged with the bit corresponding to one range cell of the particular distance range selected being in the lowest position of the register 304; The lower position is coupled to the lowest position of a variable range mark pulse counter 310 which is operated at one count per range cell during the display time. When the distance scale is changed, the binary number stored in distance register 304 is shifted to align the appropriate bit in the least significant position. Due to this effect, the displayed distance scale remains on the selected target when the distance scale is changed, and the target changes its relative position on the screen of the display tube. Furthermore, because of the shifting operation described above, a given amount of rotation of one of the control shafts 202 causes a movement of the distance mark the same distance on the plane of the display tube regardless of the selected distance scale. The problem of small rotations causing large movements over short distance ranges and very small movements over long distance ranges is eliminated. The distance range update circuit 302 receives the signal LEAD or
It serves to interpret the relative occurrence of transitions in the LAG and, as a result, increases or decreases the value stored in the distance register 304. Detection is performed using distance range update circuit 302 (flip-flops 406 and 408, multiple input register 438, exclusive
OR gates 439-442 and 444, NAND
gates 443, 447 and 446, and inverter 445). Signal LEAD
The relative occurrence of transitions in and LAG is used to increase or decrease the value stored in distance register 304. When the axis 202 of the optical encoder 201 is rotated in one direction or the other, the value stored in the distance register 304 is added or subtracted based on the direction of rotation. The dimension calculation process (distance unit conversion) converts the contents of the instruction storage device 324 to 0101 (table shown on page 36).
It is started by making This value change instruction and change direction are stored in register 438 during the dimension process. During each dimension calculation process, the contents of distance register 304 are shifted by distance range update circuit 302 and distance register 3
Returned to 04. Serial addition or subtraction is performed using exclusive OR gate 444 within distance range update circuit 302.
carried out by. The result value stored again in the distance register 304 is increased or decreased by the value corresponding to one range cell for the selected distance scale, or if no change instruction occurred since the last dimension calculation process. remain unchanged. Confirmation of new change instructions is prohibited during each dimension calculation process. Near the end of the dimension calculation process, the contents of distance register 304 are such that the least significant bit of the 16-bit value stored therein is the least significant bit position of the register. At this time, the upper five bits of the distance register 304 are used to determine whether an overflow condition has occurred in the selected distance range. The dimension calculation process is performed under program control based on instructions stored in instruction storage 324, but is not important to understanding the present invention and will only be briefly described. Each dimension calculation process is essentially a distance register 3
This corresponds to converting the binary value stored in 0.04 into a suitably graduated decimal value to be displayed by the digital LED display 158. This conversion is performed by program controlled processor 315 at a frequency determined by an externally supplied 2.2 MHz clock signal. The program control processing device 315 includes a program counter 326, an instruction storage device 324, and an instruction decoder 3.
22, adder 320, and accumulation register 316
including. In this preferred embodiment, three separate programs are provided depending on the type of final display desired. Three examples are listed in the table at the end of this detailed description section. In those examples, program number 1 is for conversion to yards, program number 2 is for conversion to nautical miles, and program number 3 is for conversion to meters. However, other programs can be provided if desired. The program selected is determined by the starting count value applied to the parallel inputs of program counter 326 (binary counters 466 and 467). This is done by connecting the program selection lines labeled A-C to the numbered terminals of the program selection inputs as shown in the display below.

These three programs contain a total of 155 4-bit word instructions that are permanently stored in instruction storage 324, which may be comprised of read-only storage or programmable read-only storage. The table listed below specifies for each of the 16 possible binary bit output combinations from instruction store 324 what operation is to be performed for each instruction.

【table】

Each instruction within each of these three programs is accessed from instruction storage 324 by program counter 326. Instruction implementation is performed by instruction decoder 322. The decimal value to be displayed by the digital LED display 158 is generated in series, adding word by word, to the 8 word by 4 bit accumulator 316 (registers 434-437).
It is accumulated within. Each eighth instruction (distance register shift instruction) shifts the next bit of the binary value toward the least significant end of distance register 304.
When this bit indicates a value of 1, each subsequent instruction in this sequence is stored as the associated word is shifted from accumulator 316 through adder 320 and back into accumulator 316 on the next clock pulse. Add an appropriate value to it. As each decimal carry occurs, it is remembered and then added to the next highest word. When the least significant bit of distance register 304 indicates a value of 0, adder 320
Words passing through are added 0 and remain unchanged. The output of adder 320 is continuously monitored by instruction decoder 322. A count of last consecutive values of zero is maintained by leading zero counter 318 . The last ``Shift Distance Register'' instruction in this sequence shifts the ``Variable Distance Mark'' bit to the lowest end of distance register 304. This bit indicates the existence of 0 during steady state. The next group of instructions, the ``Set Significant Digits'' instructions, preserve the contents of accumulator 316 while incrementing the count in leading zero counter 318 by the number of significant digits of precision to be displayed. This zero counter value is limited to seven. The next group of instructions, the "round" instructions, operate to round the value in accumulator 316 to one half of the increment in the addition or subtraction direction of the least significant digit selected. Each word is an adder 320
On returning from to accumulator 316, it is replaced by a value of zero and the count in leading zero counter 318 is decreased until it equals seven. At this point, the value 5 is added to the word at the input of adder 320. The presence or absence of the resulting carry is remembered, while the word returned to accumulator 316 is replaced by a value of zero. Leading zero counter 3 during the remaining "rounding" commands
18 has a count of 8, the carry (if any) is propagated, and the resulting sum is returned to accumulator 316. The displayed value includes significant digits to the right of the decimal point, and the next eight instructions are "add zero" instructions. They circulate the contents of the accumulator 316 in unchanged form through the adder 320 to the leading zero counter 318.
Update the count value within. These instructions are followed by "Set Significant Figures" instructions which effectively pause the contents of the accumulator and increase the contents of the leading zero counter by the number of significant figures of precision to be displayed during that time. Each of the latter instructions also operates to preset decimal point counter 314 to a counting state that places the decimal point to the left of the lowest digit in accumulator 316. The next set of instructions, the "justify decimal point right" instructions, serve to drop out the extraneous digits to the right of the final decimal point position. For each shift of the contents of accumulator 316, the contents of both leading zero counter 318 and decimal point counter 314 shift from leading zero counter 31
The count of 8 is incremented by 1 until it equals 7. Location of contents of accumulator 316 and leading zero counter 318 and decimal point counter 31
The count of 4 remains unchanged for the duration of the remainder of the ``justify decimal right'' command. The following three sets of instructions are processed by the leading zero counter 318.
The contents of accumulator 316 are cycled through adder 320 unchanged by adding some zeros to update the count in . In the first of these three sets, the ``Set Significant Decimal'' instruction, decimal point counter 314 is inhibited from advancing. The effect of this operation is to shift the decimal point to the left relative to the number until it is correctly placed. The second of these sets is the "add zero" instruction. The third set is a single "start digital display" instruction, which "adds 0"
It also acts as a command. This instruction presets program counter 326 to a value determined by its preset input and initiates operation of scale control circuit 306. When the circuit is programmed to always display all significant digits to the left of the decimal point, as is the case for yards and meters, another sequence of instructions is used after the final "round" instruction. First, a "Set Significant Digits" instruction is used to preset decimal point counter 314 to a counting state that places the decimal point to the left of the least significant digit in accumulator 316. however,
This number is never displayed. A set of seven "add zero" instructions is then executed to update the count in leading zero counter 318. The last command is again the "digital display/start" command.
Once initiated by this "start digital display" command, the scale control circuit 306 controls the remaining operation of the variable distance marker circuit. As previously mentioned, the first operation of scale control circuit 306 is to sample the distance control line and associated bit positions of distance register 304. This is done by a ``digital display/start'' command to determine the distance scale to be selected.
5. This register 425 also functions as a counting register. Distance register 304
When the Variable Distance Mark Off bit is in the logical 1 state, the accumulator 316 is cleared, the leading zero counter 318 is set to a count of 8, and the decimal point counter 314 sets the decimal point to the highest value in the accumulator 316. It is set to be placed to the left of the lower number, and the 16 bits of the distance register 304 are set to 1.
is set to the state of When the "variable distance mark off" bit of the distance register 304 is in the 0 state, the contents of the accumulator 316, the contents of the leading zero counter 318, the contents of the decimal point counter 314,
and the contents of distance register 304 are unaffected. The program counter continues to advance. During this time the position of the contents of accumulator 316 and leading zero counter 318 and decimal point counter 314
The count value of is prohibited from changing. The position of the contents within distance register 306 is changed by each ``distance register shift'' instruction. Each of these instructions executes a count register 42 within the scale control circuit 306.
It involves addressing 5. Distance register 30 in which the bit corresponding to the value of one range cell of the selected distance scale is indicated by count register 425 of scale control circuit 306
When placed at the lowest end of 4, program counter 326 is inhibited from advancing further and segment anode drive of LED display 158 is enabled. At this point, the dimension calculation process is finished and the display output process begins. Although the dimensional calculation process described above was performed using a 2.02 MHz clock, the display output process is performed at the sweep gate signal frequency. At the beginning of each sequential sweep gate signal, the contents of accumulator 316 are shifted and the counts of leading zero counter 318 and decimal point counter 314 are advanced. A plurality of zero values are input to the input stage of accumulator 316. As each digit reaches the output of the accumulator 312, a corresponding seven segment type code is generated by the anode drive circuit 316, which is connected to the line A of the display, similar to that which would be used in a six digit type display. ―
7-segment decoder 462 to drive G
decrypted by At the same time, the common cathode lines are selected (which are lines 1-6 of the display selected by the decoder in scale control circuit 306). When the leading zero counter 318 indicates a count value less than 8 or when the decimal point counter indicates that no decimal point should yet be displayed, the selected cathode ray is given a signal and thus the digital display The device is removed. When the appropriate cathode ray is selected and signaled, the decimal point anode is signaled by the decimal point counter 314. Once the leading zero counter 318 reaches a count of 8, the digits to the left of the decimal point are eliminated by applying no signal to the selected anode line. In this way, a display is produced with the decimal point properly placed and a non-zero digit on the left-most display. It is also possible to produce a three-digit display by using only the anode wires 1-3. In that case, the last three cathode rays are selected at a frequency of 2.02 MHz to increase the collision coefficient for each of the remaining three valid numbers.
This anode drive circuit is de-energized when the last three select lines are selected. At the end of the selection period for the sixth cathode ray, the next dimension calculation process begins. Dimension calculation program is 2.02
Program counter 3 at a frequency of megahertz
26 continues from the previously paused instruction store 324. Connect the upper input of NOR gate 460, marked E1, to the terminal marked E3 for a six-digit display, and to the terminal marked E2 for a three-digit display. A selection is also made between a 3-digit display and a 6-digit display by connecting the 3-digit display to the 6-digit display. The brightness of the numbers on the LED display device is determined by variable resistor 5.
01 by adjusting the drive of the base of transistor 495. Driving the base of transistor 495 controls the maximum voltage at the emitter of transistor 490 and thus the current flowing through resistor 465 to the anode of the LED display. We will now list the three separate programs mentioned above, followed by a bill of materials for the components used in the drawings.

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【table】 [Brief explanation of drawings]

1 is a basic block diagram of a radar device according to the present invention, FIG. 2 is a detailed block diagram of a radar device according to the present invention, and FIG. 3 is a block diagram of a variable distance mark circuit of the radar device shown in FIG. 2. 4a-c are circuit diagrams of a preferred embodiment of the variable distance mark circuit of FIG. 3; FIG. 5 is a cross-sectional view of an optical resolver constructed in accordance with the present invention; and FIG. FIG. 7 is a diagram of two output waveforms of the optical resolver shown in FIG. 5; FIG. 8 is a circuit diagram of the optical transceiver and attachment of the optical resolver shown in FIG. 5. It is a circuit diagram. 202: shaft, 203: encoder wheel-shaped member,
204: Slot, 210, 212: Phototransistor, 214, 216: Light emitting diode.

Claims (1)

[Scope of Claims] 1. An encoder wheel-like member having a cylindrical peripheral portion having a plurality of longitudinal slots and an end cap portion; and an encoder wheel-like member coupled to an outer portion of the end cap for rotating the encoder wheel-like member. a shaft; first and second light emitting devices disposed adjacent to the outer surface of the peripheral edge of the encoder wheel-like member; and opposite to the first and second light-emitting devices inside the encoder wheel-like member. is placed as
a first electrical signal disposed relative to the slot so as to generate first and second electrical signals out of phase with each other when the encoder wheel is rotated;
and a second electrical signal generator; a display device that displays a visible display having a plurality of radar distance scale settings in response to the radar reflection signal; and a distance mark that is displayed on the visible display, the display position of the distance mark being The distance mark generating device is determined by the first and second electric signals, and the distance mark generator is configured to set a distance that the distance mark on the display moves with respect to a predetermined rotation of the encoder wheel-shaped member to the plurality of radar distance scale settings. a distance mark generating device having a device for making the distance traveled by the distance mark constant for a plurality of radar distance scale settings; A device for storing generated digital count values, wherein the count value increases with respect to one direction of rotation of the encoder wheel-like member and decreases with respect to the opposite rotation direction, and the count value is selected. a storage device for incrementing or decrementing the counted value by a value corresponding to one range cell of the radar range scale set; and a device for positioning the counted value in the storage device as a function of the radar range scale setting. An optical encoder device that generates a signal representing the display position of a variable position distance mark.