JPH01500472A - Printed circuit board manufacturing method - Google Patents
Printed circuit board manufacturing methodInfo
- Publication number
- JPH01500472A JPH01500472A JP62504477A JP50447787A JPH01500472A JP H01500472 A JPH01500472 A JP H01500472A JP 62504477 A JP62504477 A JP 62504477A JP 50447787 A JP50447787 A JP 50447787A JP H01500472 A JPH01500472 A JP H01500472A
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- resist
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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- C—CHEMISTRY; METALLURGY
- C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/54—Electroplating of non-metallic surfaces
- C25D5/56—Electroplating of non-metallic surfaces of plastics
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
- H05K3/184—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method using masks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0706—Inactivating or removing catalyst, e.g. on surface of resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/072—Electroless plating, e.g. finish plating or initial plating
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0756—Uses of liquids, e.g. rinsing, coating, dissolving
- H05K2203/0769—Dissolving insulating materials, e.g. coatings, not used for developing resist after exposure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0779—Treatments involving liquids, e.g. plating, rinsing characterised by the specific liquids involved
- H05K2203/0786—Using an aqueous solution, e.g. for cleaning or during drilling of holes
- H05K2203/0793—Aqueous alkaline solution, e.g. for cleaning or etching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1415—Applying catalyst after applying plating resist
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
- H05K3/061—Etching masks
- H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S205/00—Electrolysis: processes, compositions used therein, and methods of preparing the compositions
- Y10S205/924—Electrolytic coating substrate predominantly comprised of specified synthetic resin
- Y10S205/926—Polyamide or polyimide, e.g. nylon
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Electrochemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Laminated Bodies (AREA)
Abstract
Description
【発明の詳細な説明】 印刷回路板の製造方法 本発明の背景 本発明は印刷回路板の製造に関するものであり、更に詳細には、金属化の必要な スルーホールのある二重側面及び多層の印刷回路板の製造に関するものである。[Detailed description of the invention] Printed circuit board manufacturing method Background of the invention TECHNICAL FIELD This invention relates to the manufacture of printed circuit boards, and more particularly to the manufacture of printed circuit boards. The present invention relates to the production of double-sided and multilayer printed circuit boards with through holes.
印刷回路の製造では、今や、各側面に回路構成要素を印刷しである平らな板を準 備するのは陳腐である。Printed circuit manufacturing now uses a flat board with circuit components printed on each side. It is trite to prepare.
また、重要性が増してきているのは、絶縁性基体及び伝導性金属(例えば銅)を 統合しである平らな積層品から成る、いわゆる多層回路板であって、これでは絶 縁性基体で隔離された伝導性金属の平行な内部層、丁なわち平面が1個以上構造 体の中に存在している。Also of increasing importance are insulating substrates and conductive metals (e.g. copper). A so-called multilayer circuit board consisting of an integrated flat laminate, which is completely Structure of one or more parallel inner layers of conductive metal separated by a rimmed substrate, ie, planes exists within the body.
積層品の露出している外側の側面には、二重側面板のときのように印刷回路パタ ーンがあジ、かつ内部の伝導性平面自体は回路パターンを包含している。The exposed outer sides of the laminate should have a printed circuit pattern, as with double side panels. The conductive plane itself contains a circuit pattern.
二重側面及び多層の印刷回路板では、中に伝導性回路構成要素のある板の種々の 層、または側面の間で相互接続をさせることが必要である。これを達成するには 、板の中に、電気的相互接at−必要とする、側面及び層と連絡している金属化 され次伝導性スルーホールを設ける。伝導性スルーホールを設ける九めに主とし て使用する方法は、板に、きりまたは打ち抜きで開けたスルーホールの非伝導性 表面に金属を無電解析出させる方法である。In double-sided and multilayer printed circuit boards, various types of boards with conductive circuit components inside are used. It is necessary to make interconnections between layers or sides. To achieve this , within the plate, electrical interconnection at-requires metallization communicating with the sides and layers. Next, provide a conductive through hole. The main purpose is to provide conductive through holes. The method used is to make non-conductive This is a method of electrolessly depositing metal on the surface.
金属化させ九スルーホールのある二重側面、あるいは多層の印刷回路板を製造す る代表的な過程を、工程系統図、第1図並びにこれに付随して、過程の個々の工 程での板の対応する構造を、横断面で、寸法を非常に拡大して示しである第2図 で説明する。図示しである過程では、まず、両側面に薄い銅はく積層品12適用 しであるエポキシガラス樹脂が代表的の、非伝導性基体10から成る銅クラツド 基体を準備する。スルーホール14を積層板に、@シで開けて、非伝導性基体物 質10のホールの表面を露出する。板を洗浄し、かつ、きシで開けたホールのば シ全取シ、続いてスルーホールの表面全伝導性金属でめっきするのに必要な種種 の工程を行う。すなわち、一般には板金ラックし、きれいに掃除し1かつ調整し 、そしてマイクロエツチング法を行って、銅の表面全1次に適用する活性剤/触 媒を密着させやすくシ、開けたスルーホールは一般に穴開は操作で既に触媒を密 着させるのに十分な粗さにしであるが、時にはガラス充てん基体樹脂製の板では 、ガラス繊維のめつき適性全改良するために、ガラスエツチングを使用して露出 しているガラス繊維を霜付きにする。工程系統図では示してないが、個々の各処 理操作の後に通常冷水水洗を使用する。次に活性剤(触媒)t−1露出している 表面に適用し、その後、活性剤を、当業界では公知のように、促進させる。次に 無電解銅16を活性化させた表面に析出させ、スルーホール表面を金属化する。For manufacturing double-sided or multilayer printed circuit boards with metallized nine through holes. A typical process is shown in a process flow chart, Figure 1, and the individual steps in the process. Figure 2 shows the corresponding structure of the plate in cross-section and with greatly enlarged dimensions. I will explain. In the illustrated process, first, a thin copper foil laminate 12 is applied on both sides. A copper cladding consisting of a non-conductive substrate 10, typically made of epoxy glass resin. Prepare the substrate. Drill a through hole 14 in the laminate with @ and attach it to a non-conductive substrate. Expose the surface of the hole of quality 10. Clean the board and drill the holes. The various materials necessary to completely remove the entire surface of the through-hole and then plate the surface of the through-hole with a conductive metal. Perform the process. That is, generally the sheet metal rack is cleaned, cleaned and adjusted. , and a micro-etching process is performed to remove the activator/catalyst applied to the entire surface of the copper. It is easy to make the catalyst adhere tightly, and the through holes that are opened are generally used to make the catalyst adhere tightly. However, sometimes with glass-filled resin-based plates, , exposed using glass etching to improve the plating suitability of glass fibers frosting the glass fibers. Although not shown in the process diagram, each individual department A cold water rinse is usually used after the process. Next, activator (catalyst) t-1 is exposed After application to the surface, the active agent is promoted as known in the art. next Electroless copper 16 is deposited on the activated surface to metallize the surface of the through hole.
次に板金水洗し、かつ芝燥した後に、めっきレジスト18をあらかじめ定めであ るパターンで施すことによってホールの表面、及び伝導性回路構成要素(パッド 、子図等)の輪郭を明確に定める領域に追加の金属増加を行い(一般には、フォ トレゾスト、所望のパターンでマスクを通す露光及び現像を施すことによって、 るるいは別法としては、レジストlパターンでスクリーン印刷することによって )、次に、例えば、@全電気めっきして、追加の銅20t−供給する。次に金属 化させた所望の領域全エツチングレゾストで保護し、めっきレジストヲ取シ除い てエッチレゾストで保護していない領域上基体の表面まで腐食する。Next, after washing the sheet metal with water and drying it, a plating resist 18 is applied in advance. surface of the holes and conductive circuit components (pads) by applying Additional metal increases are made in areas that clearly define the outline of the object (generally Trezost, by exposing and developing through a mask in the desired pattern, Rurui can alternatively be created by screen printing with a resist l pattern. ), then supply an additional 20 t of copper, for example by fully electroplating. then metal Protect the entire desired area with etching resist and remove the plating resist. Corrosion occurs to the surface of the substrate on areas not protected by etch resist.
当業界で実施している上記の過程には、公知の変化が幾つかある。説明する過程 は「重析出(heavydeposition 3法」と呼ぶのが代表的であっ て、析出させた無電解鋼の層は百万分の約80インチから百万分の100インチ までである。変化では、無電解鋼をわずか百万分の約15インチから百万分の2 0インチまで析出させ([薄析出(thin deposition 〕J ) 、かつ続いてレゾストを所望のパターンで施す前に、金属を増加するために、百 万分の約100インチから百万分の200インチまでの電解鋼ストライク層を析 出させる。「パネルめっき(panel plating ) Jと呼ぶ、もう 一つの変化では、銅を薄く析出させ、続いてレジスト適用がなにも起らないりち に、電解鋼めっき金して十分な、すなわち最終の厚さく例えば1ミルから1.5 ミルま・で)にする。この変化では、パターンに従つレジストは、めっきレゾス トとしてよシも、むしろエッチレゾストとしての勤1!!にし、エッチレゾスト ハホール、パッド、子図等全十分増加させる領域に施す。There are several known variations of the above process practiced in the art. process of explaining is typically called the “heavy deposition 3 method”. The layer of electroless steel deposited is approximately 80 millionths of an inch to 100 millionths of an inch. That's it. The variation ranges from electroless steel to only about 15 millionths of an inch to 2 millionths of an inch. Deposit to 0 inch ([thin deposition] J) , and then to increase the metal before applying the resist in the desired pattern. Analyzing electrolytic steel strike layers from approximately 100,000ths of an inch to 200 millionths of an inch. Let it come out. “Panel plating is called J. One variation involves depositing a thin layer of copper and then depositing the copper without any subsequent resist application. The electrolytic steel must be plated to a sufficient final thickness, e.g. 1 mil to 1.5 mils. Make it to mil ma・de). In this variation, the resist following the pattern is plated Not only as a person, but also as a naughty lesbian! ! And erotic resort Apply to all areas to be sufficiently increased, such as ha holes, pads, and child figures.
次に、保護されでいない銅の領域を基体表面まで腐食する。The unprotected copper areas are then etched down to the substrate surface.
使用する個々の変化には関係なく、上記の過程には共通に幾つかの処理工程につ いて必要なことがある。Regardless of the individual changes used, the above processes have several processing steps in common. There are things you need to do.
しかしながら、実際の製造実施の経済性に関しては、行った特定の工程の全部の 数は、実際には異なるタイプの工程の数よシも重要性が少ない。すなわち、重ま たは薄析出そのものによるスルーホールのめっきには、かなシの数の処理及び水 洗工程を含んではいるが、工程は全部、基本的には製造中の簡単な過程で行5こ とのできる湿式処理である。経済的な観点から、もっと重要なのは板を湿式処理 過程から取シ出し、こ2′Lt”乾燥し、これに元で画像を作シ、あるいはスク リーン印刷全施し、それからこれを湿式、めっき及びエツチング過程に戻す必要 があることである。パネルめっきについても全くその通りであって、この場合に は、金属全増大させるための無電解及び電解処理はエッチレジスト’2施すため に中断し、次に湿式処理エツチング工程に戻す。プラント及び中間の乾燥過程の 異なる領域の間で板を物理的に運び、かつ戻すことを必要とする処理過程中の中 断で、製造コストヲ著しく増すことがある。However, in terms of the economics of the actual manufacturing implementation, The number is actually less important than the number of different types of processes. In other words, heavy Through-hole plating by thin deposition or by thin deposition itself requires a number of treatments and water treatment. Although it includes a washing process, the entire process is basically a simple process during manufacturing. It is a wet process that can be performed with From an economic point of view, it is more important to wet-process the board. Take it out from the process, dry it, and use it to create or screen images. Fully applied lean printing, then required to return to wet, plating and etching process There is. The same is true for panel plating, and in this case Electroless and electrolytic treatments are used to increase the total metal etch resist '2 and then return to the wet etching step. of the plant and intermediate drying process. During processing processes that require physically transporting and returning boards between different areas. This can significantly increase manufacturing costs.
本発明の概要 金属化の必要なスルーホールがある二重側面及び多層の印刷回路板を製造する方 法を提供するのが本発明の目的である。Summary of the invention For those who manufacture double-sided and multilayer printed circuit boards with through-holes that require metallization. It is an object of the present invention to provide a method.
本発明のもう一つの目的は、説明したタイプの製造方法を提供することであジ、 この方法では製造過程の中断と関連のるる、先に指摘した不利な点を解消する。Another object of the invention is to provide a manufacturing method of the type described, which This method eliminates the disadvantages mentioned above, which are associated with interruptions in the manufacturing process.
本発明の更に独特な目的は、金属化の必要なスルーホールがろる二重側面及び多 層の印刷回路板を製造する方法を提供することであシ、この方法ではスルーホー ル全金属化する前に、所望のあらかじめ定めであるパターンで、めっきレジスト 表面の表面に適用する。A further unique object of the present invention is that the through-holes requiring metallization are double sided and multi-layered. The purpose of the present invention is to provide a method for manufacturing a layered printed circuit board, in which through-hole The plating resist is applied in the desired predetermined pattern before full metallization. Apply to the surface of the surface.
本発明の更に他の目的は、今記載したばかシの製造方法を提供することであって 、この方法では、使用する物質は有機系よシもむしろ水性系を使用して処理する ことができる〇 本発明に従ってこれらの目的及び他の目的を達成するのは、金属化の必要なスル ーホールのある、二重側面及び多層の印刷回路板を製造する方法の提供によって であシ、この方法ではアルカリでストリップすることのできる水性のめつきレジ メト物質の、あらかじめ定めである所望のパターンを、スルホールを金属化する 前に、板の表面に適用して、金属の増大を望まない領域の輪郭を明確に定め、次 にスルーホールの表面及びI/シスストの表面全包含する板の表面に、金属の受 容に対してこのような表面を活性化する処理を施し、次にレゾストの完全性を損 なうこともなく、また金属化を望む表面を不活性化することもなく、先に施した レジストの表面を、次の金属化に対して選択的に不活性にするのに有効な条件下 で、板にアルカリ性水性媒質による処理を行い、かつ次に板を処理して、このよ うな金属化に対して活性で、スルーホール表面を包含する板のこれらの表面に金 属化層を適用する。Yet another object of the present invention is to provide a method for manufacturing the bakashi just described. In this method, the substances used are treated using an aqueous system rather than an organic system. I can do it〇 Achieving these and other objectives in accordance with the present invention is achieved by reducing the necessary speed of metallization. - By providing a method for manufacturing holed, double-sided and multilayer printed circuit boards However, this method uses water-based plating resin that can be stripped with alkaline. Metallize the throughholes into a desired predetermined pattern of MET material Apply it to the surface of the plate before, clearly delineating the areas where you do not want metal growth, and then The surface of the plate, which includes the entire surface of the through hole and the surface of the I/cisist, is covered with a metal receptacle. This surface activation treatment is applied to the surface and then the integrity of the resist is compromised. metallization, and does not passivate the surface desired to be metallized. Conditions effective to render the resist surface selectively inert to subsequent metallization Then, the board is treated with an alkaline aqueous medium, and then the board is treated in this way. gold on these surfaces of the plate, including the through-hole surfaces. Apply the attribution layer.
本発明の独特の実施態様に従って、レジストの適用、全表面の活性化、及びレジ スト表面の選択的不活性化に続く金属化は、無電解、あるいは電解で行うことが でき、かつめっきの技法及び工程の組み合わせ全包含して、スルーホール表面、 並びにホールパッド及び子図のような板表面の他の部分で、金属全所望の厚さに することができる。七の後、ホール、パッド、子図などの領域に腐食抵抗性コー ティングを施すには通常の方法を使用し、続いて金属を基体の表面まで腐食し、 次に他の標準仕上げ処理を行う。In accordance with a unique embodiment of the present invention, resist application, full surface activation, and resist Selective passivation of the steel surface followed by metallization can be carried out electrolessly or electrolytically. Through-hole surfaces, including all combinations of plating techniques and processes, as well as other parts of the plate surface such as hole pads and subfigures, cut the metal all over to the desired thickness. can do. After seventh, apply corrosion resistant coat to areas such as holes, pads, child figures etc. Conventional methods are used to apply the coating, followed by corrosion of the metal to the surface of the substrate. Other standard finishing treatments are then applied.
本発明の方法では、金属化処理上開始する前に、めっキレシスト全1あらかじめ 定めであるパターンで適用するので、公知の技術では必要な中断をすることなく 、めっき、洗浄、エツチング等の種々の湿式1程をまっすぐに経て、板を処理す ることができることになる。結果として、製造の時間及び費用でかなシの節約が 実現できる。本発明を使用して得られる、更に別の利点は、下記の更に詳細な検 討で明らかになるでろろう。In the method of the present invention, before starting the metallization process, the entire plating resist is prepared in advance. It is applied in a predetermined pattern so that known techniques do not require necessary interruptions. The board is processed through various wet processes such as plating, cleaning, and etching. This means that you will be able to As a result, savings in manufacturing time and costs are achieved. realizable. Further advantages obtained using the present invention are discussed in more detail below. It will become clear during the investigation.
先行技術 ドリー二相(DOre7 n )等の米国特許第4.537,799号明細書で は、選択的無電解金属化法を、付加タイプの印刷回路板の製造に関連して記載し ている。この方法によれば、絶縁基体に穴を開けて、所望のスルーホールを作ジ 、次に基体の表面に負のレジストパターンを作って、レジストでコーティングさ れていない領域で、所望の回路パターンの輪郭を描き、レゾストは有機溶剤で除 去することのできる/可溶性のフォトレゾストまたはインキである。次に基体及 びレジスト表面を腐食して、久に適用する触媒層及び無電解金属層の密着性金増 すようにする。記載の一実施態様によれば、次に板を弱酸(酢酸、ギ酸、ゾロピ オン酸)で処理し、基体上のレジスト表面を、実質的に腐食することなく、おだ やかな溶解または平滑化をさせて、処理しであるレゾストに次に適用する触媒を 本質的に密着させなくする。その後、触媒を適用し、かつ金属の無電解析出を行 って、レジストで覆われていない領域を金属化する。記載しである、もう一つの 実施態様では、触媒を、腐食しである基体及びレジストに、まず密着させ、その 後、板を弱酸で処理してレゾスト全少量溶解して、そこから触媒物質を除去し、 かつ/またはレジスト上の触媒種を不活性にする。次に、レゾストで覆われてい ない領域に無電解析出を行う。prior art In U.S. Pat. No. 4,537,799, describes a selective electroless metallization process in connection with the production of additive-type printed circuit boards. ing. According to this method, holes are drilled in the insulating substrate to create the desired through holes. , then create a negative resist pattern on the surface of the substrate and coat it with resist. In the unmarked area, outline the desired circuit pattern and remove the resist with an organic solvent. A removable/soluble photoresist or ink. Next, the base and It corrodes the resist surface and increases the adhesion of the catalyst layer and electroless metal layer that will be applied for a long time. so that According to one of the embodiments described, the plate is then soaked in a weak acid (acetic acid, formic acid, zolopic acid). ionic acid) to gently cure the resist surface on the substrate without substantially corroding it. A gentle dissolution or smoothing process is performed to prepare the catalyst for subsequent application to the treated resist. Essentially, it prevents close contact. Then, a catalyst is applied and electroless metal deposition is performed. Then, the areas not covered by resist are metallized. There is another In embodiments, the catalyst is first brought into intimate contact with the corroding substrate and resist; After that, the plate is treated with a weak acid to dissolve all the resist, and the catalyst material is removed from there. and/or render the catalytic species on the resist inactive. Then covered with resost Perform electroless deposition in areas where there is no
ドリー二相の方法の著しく不利な点は、溶剤除去性/溶解性レゾスト、及びその ための誘性処理物質に依存していることである。A significant disadvantage of the Dolly two-phase process is the lack of solvent removable/dissolvable resists; It is dependent on the treatment substance used to induce attraction.
ソウヤー(Sawyer )の米国特許第4.り 88,351号明細Vもまた 印刷回路板製造の付加的なタイプ、及びこnの選択的金属化に関するものである 。負のレジストパターンを、溶剤ストリップ性/溶解性レゾスト物質を使用して 、絶縁基体上に作9、全表面kg食させ、全表面を感光させ、かつ無電解銅析出 のための触媒を作用させ、レゾスト2ストリツプし、かつ残っている触媒画家上 に無電解鋼を析出させる。別法としては、レジストラス) IJツノする前に、 無電解鋼のフラッシュめっきを、最初にレゾスト表面を含む全表面に析出させ、 レジスト(及びその上の金属フラッシュコーティング)をストリップした後に残 っているフラッシュパターン上に無電解銅を更に増加させる。所望の領域での金 属化及び(またrl:)完全な金属化は、レジスト全ストリップした後に行うの で、ソウキー法の重大な不利な点は、前記のドリー二相等の米国特許第4.53 7・799号明細書で検討したように、金属化領域で所望の線の幅を精密に制御 することが不可能なことである。Sawyer U.S. Patent No. 4. 88,351 Specification V also Additional types of printed circuit board manufacturing and selective metallization of this . Negative resist pattern using solvent strippable/dissolvable resist material , fabricated on an insulating substrate9, exposed the entire surface to light, and deposited electroless copper. Apply the catalyst for the resin, apply two strips of resin, and apply the remaining catalyst to the paint. to deposit electroless steel. Alternatively, Registrus) before IJ horn, Flash plating of electroless steel is first deposited on the entire surface including the resist surface, What is left behind after stripping the resist (and the metal flash coating over it)? Further increase electroless copper on the flash pattern. gold in desired area Metallization and (also rl:) complete metallization should be done after stripping the entire resist. The serious disadvantage of the Souki method is that of the above-mentioned U.S. Patent No. 4.53 As discussed in US Pat. No. 7,799, precise control of the desired line width in the metallized region It is impossible to do so.
ドリー二相等の米国特許第4.574.031号明細書は、ンウヤーの付加タイ プ法と同様であシ、この特許明細書では、フォトレゾストマスクを絶縁性基体の 表面上に所望のパターンで施し、全表面(すなわち、基体の露出表面及びレジス トの表面の両方)に無電解金属析出のための触媒を作用させて、無電解金属の薄 いフラッシュを全表面に析出させ、続いてマスク(及びそれと共にその上のフラ ッシュ〕を除去する。次に追加の金属を、残っているフラッシュの上に、無電解 析出で増加させる。ソウヤーの教示を、水性アルカリ性溶解性及びストリップ性 のフォトレジストにまで拡張してはいるが、それでもやはシ、ドリー二相のこの 方法には、ソウヤーと同じ不利な点がある、すなわち、レジストマスクを存在さ せないで追加の金属増加7行うという事実のために、金属化領域で所望の幅の線 を精密に制御することが不可能である。その上、前記のドリー二相等の米国特許 第4,537,799号明細書で指摘したように、ソウヤータイプの方法はフラ ッシュの特定の厚さの達成に際どく左右される。最も重要なのは、レゾストに施 すフラッシュが厚過ぎれば、レジストのストリップは極度に困雛になることがあ シ、かつ板上には、金属があってはならない領域で、必要がなく、かつ好ましく ない金属のうろこ傷が残ることになるかも知れない。U.S. Pat. No. 4,574,031 to Dolly Bipha et al. This patent specification uses a photoresist mask on an insulating substrate. in the desired pattern on the surface, covering the entire surface (i.e., the exposed surface of the substrate and the resist). A thin layer of electroless metal is produced by applying a catalyst for electroless metal deposition to both surfaces of the A thin flash is deposited on the entire surface, followed by a mask (and with it a flash over it). [sh]]. Then add additional metal onto the remaining flash, electroless Increase by precipitation. Sawyer's teachings, aqueous alkaline solubility and stripability Although it has been expanded to include photoresists, it is still difficult to use this two-phase photoresist. The method has the same disadvantages as Sawyer, i.e. no resist mask is present. Due to the fact that without additional metal increase 7 lines of desired width in the metallized area It is impossible to precisely control the Moreover, the above-mentioned U.S. patent of Dolly Biphase et al. No. 4,537,799, the Sawyer type method is highly dependent on achieving a specific thickness of the mesh. Most importantly, the If the flash is too thick, the strips of resist can become extremely difficult. and areas on the plate where there should be no metal, where it is unnecessary and preferred. You may end up with scratches from missing metal scales.
ワジマ等の米国特許第4,151.313号明細書では、印刷回路板の製造方法 を記載しておシ、これではチタン、ニッケル及びアンチモンの酸化物の固溶体を 含有する熱硬化性樹脂から成るめっきレゾストヲ、基体に負のパターンで施し、 かつ次に基体及びレジストの全表面に触媒を作用させて無電解金属析出をさせる 。次に触媒を過硫酸アンモニウムの塩酸溶液と接触させて、レゾスト物質自体、 あるいは基体表面に存在する触媒に作用させることなく、レジストの表面から除 去し、次に残っている、触媒を作用させた基体表面で無電解めっきが進行する。U.S. Pat. No. 4,151.313 to Wajima et al. describes a method for manufacturing a printed circuit board. This describes a solid solution of titanium, nickel and antimony oxides. A plating resin made of thermosetting resin is applied to the substrate in a negative pattern, Then, a catalyst is applied to the entire surface of the substrate and resist to cause electroless metal deposition. . The catalyst is then contacted with a solution of ammonium persulfate in hydrochloric acid to Alternatively, it can be removed from the resist surface without acting on the catalyst present on the substrate surface. Then, electroless plating proceeds on the remaining catalyzed substrate surface.
この特許明細書によれば、レジスト中の金属酸化物は使用した触媒を転化させて 、無機酸溶液で、たやすく溶解することのできる化合物圧する。ワゾマ等の方法 の重大な欠点は、特殊な組成の熱硬化性レジスト物質を使用するのが必要条件で あシ、かつフォトレジストヲ使用する方法を行うことができないことである。According to this patent specification, the metal oxide in the resist converts the catalyst used. Compounds that can be easily dissolved in inorganic acid solutions. The method of Wazoma et al. A significant drawback is the requirement to use thermosetting resist materials of special composition. However, the method using photoresist cannot be used.
シプリー ジュニア−(5hipley、 Jr )等の米国特許第3,562 .038号明細書は、基体表面の選択的無電解金属化に関するものであり、かつ 印刷回路板の製造に有効であると記載しである。この特許明細書によれば、基体 全選択的に処理して(例えば、機械的または化学的に、ざらざらにする)、吸収 するコロイド状の無電解析出触媒を、処理を施さない領域よシも選択的に良く保 持する領域を生成する。次に、コロイド触媒を全領域に施し、基体全体をストリ ッパー溶液と接触させて、選択的保持力のある領域を除く、全領域から触媒?除 去し、かつ次に基体を無電解めっきする。U.S. Patent No. 3,562 of Shipley, Jr., et al. .. No. 038 relates to selective electroless metallization of substrate surfaces, and It is described as being useful in the manufacture of printed circuit boards. According to this patent specification, the substrate All selectively treated (e.g. mechanically or chemically, roughened) to absorb The colloidal electrolessly deposited catalyst can be selectively preserved in areas that are not treated. Generate an area with Next, apply colloidal catalyst to the entire area and strip the entire substrate. Catalyst from all areas except those with selective retention in contact with the upper solution? Exclusion and then electroless plating the substrate.
スルーホールの金属化法が記載してあって、基体にスルーホールを作シ、基体を コロイド触媒と接触させ、次にスルーホール上瞼く全領域から触媒全除去するた めにストリッパー溶液と接触させ、かつ次に無電解金属をスルーホール上に選択 的に析出させる。記載しである、もう一つの実施態様では、回路板基体をざらざ らにし、回路パターンの裏返しのンジスト画像を基体に施し、基体をコロイド触 媒溶液に浸せきし、次にストリッピング溶液(塩化銅、塩酸(67%)、水)に 浸せきし、次に無電解銅めっき溶液に浸せきして、スルーホールの中及びざらざ らにしである露出基体表面だけをめっきすることになシ、そして次に電気めっき を施して、無電解鋼の領域−面に電解鋼を析出させる。The method for metallizing through-holes is described. Contact with the colloidal catalyst, then remove all the catalyst from the entire area above the through hole. contact with stripper solution and then select electroless metal onto the through-hole. to precipitate. In another embodiment described, the circuit board substrate is roughened. The reverse image of the circuit pattern is applied to the substrate, and the substrate is exposed to colloidal contact. Soaked in medium solution, then in stripping solution (copper chloride, hydrochloric acid (67%), water) then dipped in an electroless copper plating solution to clean the inside of the through hole and any rough edges. It is necessary to plate only the exposed substrate surface, and then electroplating. to deposit electrolytic steel on the region-plane of the electroless steel.
先行技術でに、上記の方法では実際問題として、やはりレジスト上に無電解金属 を析出することになることを報告した。In the prior art, in the above method, as a practical matter, electroless metal is still deposited on the resist. It was reported that this resulted in the precipitation of
図面の簡単な説明 第1図はスルーホールのある印刷回路板を製造する通常の方法の工程系統図であ シ、 第2図では、第1図に示した処理過程の種々の段階での印刷回路板のスルーホー ル領域の横断面を示し、第3図及び第4図では、それぞれ本発明の一実施態様に ついて、過程の工程系統図及び対応する横断面の構造を示し、かつ 第5図及び第6図では、それぞれ本発明の別の実施態様について、過程の工程系 統図及び対応する横断面の構造を示す。Brief description of the drawing Figure 1 is a process diagram of the usual method of manufacturing printed circuit boards with through holes. C, Figure 2 shows the through-holes of a printed circuit board at various stages of the process shown in Figure 1. FIGS. 3 and 4 each illustrate an embodiment of the present invention. Therefore, the process flow diagram and the corresponding cross-sectional structure are shown, and FIGS. 5 and 6 illustrate a process system for another embodiment of the invention, respectively. The structure of the system diagram and corresponding cross section is shown.
構造を説明する各図面、すなわち、第2図、第4図及び第6図では、図示しであ るホール及びパッドは、図面にある子図以外の子図と関連しており、かつ図示し である子図は、図面KSるパッド及びホール以外のパッド及びホールと関連があ る。In each drawing explaining the structure, that is, FIG. 2, FIG. 4, and FIG. Holes and pads that are related to subfigures other than the subfigures in the drawing and are A child drawing that is related to pads and holes other than the pads and holes in the drawing KS. Ru.
本発明の詳細な説明 本発明の方法では、スルーホール表面を金属化する前に、レゾストを、あらかじ め定めである所望のパターンで、スルーホールが1個以上ある、適切な二重側面 、あるいは多層の金属クラッド回路板基体に施して、めっきさせたくない領域の 輪郭を明確に定める。選足するレジスト物質は現像、凝固、または硬化の条件で 、アルカリ性水溶液の作用を受けて、あらかじめ触媒を施しであるにもかかわら ず、次の無電解金属析出に対して、表面を不活性化することができるものでなけ ればならない◎更に、1/シスト物質は、次に施される電気めっきの金属層析出 をも阻まなければならないことはいうまでもなり、シかも最後には基体表面から 完全にストリップできなければならない。Detailed description of the invention In the method of the present invention, before metallizing the surface of the through hole, the resist is applied in advance. Suitable double sided surface with one or more through holes in the desired pattern as specified. , or applied to a multilayer metal-clad circuit board substrate to remove areas that you do not want plated. Define the outline clearly. The resist materials selected are subject to development, solidification, or curing conditions. , under the action of an alkaline aqueous solution, even though it has been catalyzed beforehand. First, it must be able to inactivate the surface against subsequent electroless metal deposition. ◎Furthermore, 1/The cyst material is a metal layer deposited in the next electroplating process. Needless to say, it is necessary to prevent the Must be able to completely strip.
本明細書で使用する、レジスト表面の「不活性化」は、金属クラッド印刷回路板 基体の状態に関係がちへ基体上に所望のパターンでレジストを施しておいて、次 の析出金属の受け入れに対して、全表面が触媒作用、または「活性化」をするよ うに非選択的に処理する。As used herein, "passivation" of a resist surface refers to a metal clad printed circuit board. Depending on the condition of the substrate, apply the resist in the desired pattern on the substrate, and then The entire surface is catalyzed or “activated” to accept the precipitated metal. Process sea urchins non-selectively.
本発明に従って、このように処理した基体は、金属析出の前に、触媒をレゾスト 表面から選択的に除去するか、または除去できる条件下で、アルカリ性水溶液と 接触させて、このような表面を、金属析出上受は入れでせなくする意味で「不活 性化」する。この不活性化の機構は、本質的に、レゾスト表面から、その上の触 媒層をストリッピングすることを&含している。このストリッピングは、レジス ト自体を少しも溶解しないで、触媒層だけをレジスト表面からストリッピングす ることを包含することができ、かつするのが普通であり、アルカリ性水溶液はこ こで、レジスト表面の軟化を行って、触媒層を、その溶液によって、あるいは次 の洗浄で、ストリップする。しかしながら、本発明では、下にろって触媒を担持 している、レゾストの表面の非常に薄い部分を、アルカリ性水溶液で実際に溶解 するためからt1触媒層の「ストリッピング」を本発明の範囲に含める。どちら の場合でも、金属析出に対して、レジストの不活性化が行われるのは、このアル 刀り往水溶液による処理後に残っているレゾスト表面には、もはや必須触媒種が 無いからである。In accordance with the present invention, the substrate thus treated is coated with a catalyst prior to metal deposition. with an alkaline aqueous solution under conditions that allow for selective removal or removal from the surface. In contact with the surface, such a surface is considered to be ``inert'' meaning that metal deposits cannot be deposited on the surface. to be sexualized. This deactivation mechanism is essentially from the resist surface to the contact layer above it. & includes stripping the medium layer. This stripping is done by Regis Strips only the catalyst layer from the resist surface without dissolving the resist itself. can and usually does, and alkaline aqueous solutions Here, the resist surface is softened and the catalyst layer is coated with the solution or the next layer. Wash and strip. However, in the present invention, the catalyst is supported at the bottom. The very thin part of the surface of Resost that is being dissolved is actually dissolved in an alkaline aqueous solution. Therefore, "stripping" of the t1 catalyst layer is included within the scope of the present invention. Which Even in the case of The remaining surface of the resist after treatment with the aqueous solution no longer contains the essential catalytic species. This is because there is none.
レジストが維持しなければならない固有の特性に関して、先に示した限度内で選 定する特定のレゾストは、比較的多種多様のタイプのレジストから選定すること ができる。特に好ましいのは感光性レジスト物質(フォトレジスト)であり、か つこの部類の中では、レジストは負または正のどちらの作用をしてもよい。負の 作用をするフォトl/シストでは、現像することのできる感光性物質を基体表面 に均一に施してから、所望のアートワーク外形金示すマスクを通して露光させる 。With respect to the inherent properties that the resist must maintain, the selection should be made within the limits indicated above. The specific resist to be determined can be selected from a relatively wide variety of resist types. Can be done. Particularly preferred are photosensitive resist materials (photoresists), Within this category, resists may have either negative or positive effects. negative In the active photol/cyst, a photosensitive material that can be developed is applied to the substrate surface. Apply it evenly and then expose through a mask showing the outline of the desired artwork. .
露光させたレジストの領域は「不溶化」(橋かけ結合〕になるが、一方露光させ なかつ死領域(ホール、パッド、子図等のパターンで)は適切な現像剤で溶解及 び除去のできる形態のままである。正の作用をするレジストでは、11元領域( パッド、ホール、子図等〕は可溶化形態に転化されて、溶解及び除去ができるが 、一方l!光させなかった領域はレジストのままである。フォトレゾストは、作 用が負または正のどちらでも、乾燥フィルムであっても、液体タイプであっても よい。The exposed areas of the resist become “insolubilized” (cross-linked); Dead areas (in patterns such as holes, pads, subfigures, etc.) can be dissolved and removed using a suitable developer. It remains in a form that can be removed and removed. For resists with positive effects, the 11-element region ( pads, holes, child figures, etc.] are converted to a solubilized form and can be dissolved and removed. , while l! The areas that are not exposed to light remain as resist. Photoresist is made by Whether the application is negative or positive, dry film or liquid type. good.
先に指摘した必要条件に支配されるレゾスト物質はまた非感光性タイ!、すなわ ち熱硬化性あるいは硬化性1N折であってもよい。これらのタイプの樹脂を、周 知のスクリーニング技法によって、所望のパターンで板の表面に施す。Governed by the requirements pointed out earlier, resist materials are also non-photosensitive! , Sunawa Alternatively, it may be thermosetting or hardening 1N fold. These types of resins The desired pattern is applied to the surface of the board using known screening techniques.
第6図及び第4図を参考にして、本発明の特定の一実施態様を、両側面を薄い金 属は<120(例えば銅)で覆っである絶縁基体100で始める。絶縁基体はガ ラス強化エポキシ基体、またはポリイミドタイプの基体が代表的である。しかし ながら、一般に絶縁性のどんな熱硬化性樹脂、熱可塑性樹脂、またはこれらの配 合物でも、使用することができ、これらの繊維含浸形態、例えばフタル酸アリル 、エポキシ樹脂、ポリエステル、ポリアクリレート、ポリエステル、ABS共重 合体などを包含する。板には穴を開けて作った1個以上のスルーホール140が あシ、これは板の各側面に作ろうとする回路の間に伝導性の接続をさせるために 金属化が必要である。With reference to FIGS. 6 and 4, one particular embodiment of the present invention is shown in which both sides are made of thin metal. The genus begins with an insulating substrate 100 that is coated with <120 (e.g. copper). The insulating substrate is Typical examples include lath reinforced epoxy substrates or polyimide type substrates. but However, any thermosetting resin, thermoplastic resin, or combination thereof that is generally insulating Compounds can also be used in the form of these fibers impregnated, e.g. allyl phthalate , epoxy resin, polyester, polyacrylate, polyester, ABS copolymer Includes combinations, etc. One or more through holes 140 are formed in the board. This is to make a conductive connection between the circuits you are trying to make on each side of the board. Metallization is required.
本発明の方法の次の工程では、レゾスト物質180を、所望の、あらかじめ定め であるパターンの形態で、板に施して、板表面O金属化を望−!ない領域の輪郭 を明確に定める。指摘したように、レジストは、先に触媒種を施してるって、さ もなければ金属析出物の受け入れを促進することができるにもかかわらず、アル カリ性水溶液の作用を受けていて、金属析出物(て向かい合うレゾスト表面を不 活性化することができなけnばならないが、このような不活性を達成することが できるのは、レジスト’l腐食または破壊する不利な点が全く、あるいはレゾス トを、七つくりそのまま板からストリップすることもなく、あるいは金属化の必 要な板の露出領域に存在する触媒物質の除去も、及び(または)不活性化もしな い条件のときである。この点について特に好ましいのは、アルカリ性水性媒質中 でストリップすることのできる、負の作用をする感光性の乾燥したフィルムタイ プのレジスト(例えば、イー・アイ・シュボン・ドヌム―ル社(E、 I du PontdeNemours & Co、 :)販売のリストン(R15ton 〕5600系列、特にリストン6615、同じくシュボン販売のリストン20 0系列フォトレジスター、ヘルクレス(Hercules )販売のアカ? − ル(Aquamar 〕フォトレゾスト、ダイナケム エイチ・シー(Dyna chemHG ]、及び日本のニチデ アルフオ(Nichig。In the next step of the method of the invention, the resist material 180 is deposited in a desired, predefined manner. Apply it to a plate in the form of a certain pattern to achieve metallization on the plate surface! contour of the area without clearly defined. As I pointed out, the resist is coated with a catalytic species first. Even though it can promote the acceptance of metal precipitates without Under the action of an aqueous potash solution, metal deposits (and It must be possible to activate, but it is not possible to achieve such inertness. It is possible that the resist’l has no disadvantages of corrosion or destruction, or It can be made directly from the board without having to strip it, or without the need for metallization. Catalytic material present in exposed areas of the critical plate shall not be removed and/or deactivated. This is when conditions are favorable. Particularly preferred in this regard are Negative action photosensitive dry film tie that can be stripped with resist (e.g., E.I. du Bon de Nemours) Liston (R15ton) sold by Pont de Nemours & Co. ] 5600 series, especially Liston 6615, Liston 20 also sold by Shubon 0 series photoresistor, sold by Hercules? − Aquamar photoresist, Dynachem H.C. chemHG], and Nichide Alfuo (Nichig.
Alpho )販売のタイプ(Type ) 1038 Mwとして公知のフォ トレゾスト)、及び非感光性、スクリーン印刷可能、アルカリ性ストリップ可能 のタイプのレジスト、特に、硬化して平滑な光沢のある表面になる、アクリル系 がベースのタイプのものである。場合場合に応じて、N光/現像、または硬化の 後に、レジストを施しである板は一般に水洗いし、酸洗いし、水洗いし、調整剤 と接触させ、そして再び水洗いする。その後、板の表面ラミクロエツチング剤( 例えば、過酸化水素/硫酸の希薄溶液)と接触させ、水洗いしてから、次の金属 化の触媒作用をする物質で活性化させる。Alpho) Sales type (Type) 1038 Fork known as Mw Tresost), and non-photosensitive, screen printable, alkaline strippable type of resist, especially acrylics that harden to a smooth, glossy surface is the base type. Depending on the case, N light/development or curing Afterwards, the resist-coated board is generally washed with water, pickled, washed with water, and treated with a conditioning agent. and rinse again with water. After that, apply a laminar etching agent ( (for example, a dilute solution of hydrogen peroxide/sulfuric acid), rinsed with water, and then Activate with a substance that catalyzes oxidation.
無電解金属化に関しては、表面の活性化は、当業界では周知であるが、一般に、 塩化第一スズ及び塩化パラジウムの塩酸溶液のような、スズ−パラジウムの−段 階コロイド溶液と接触させて、表面にパラジウム触媒層を作ることから成る。し かしながら、活性化はスズ/パラジウムの二段階方式で、あるいは銅化合物のよ うな非貴金属で行うこともできる。活性化の後、詳細には、スズ−パラジウムコ ロイド溶液を活性化のために使用する場合には、一般に促進剤溶液を使用して、 触媒種の活性度及び安定性を増大させる。For electroless metallization, surface activation is well known in the art, but generally involves A tin-palladium stage, such as a solution of stannous chloride and palladium chloride in hydrochloric acid. The process consists of creating a palladium catalyst layer on the surface by contacting it with a colloidal solution. death However, activation can be done using a two-step process such as tin/palladium or copper compounds. It can also be done with non-precious metals. After activation, in detail, tin-palladium co When a Lloyd's solution is used for activation, an accelerator solution is generally used to Increases the activity and stability of the catalytic species.
方法のこの段階では、活性の十分な触媒がレジスト物質の表面に存在して、スル ーホール、パッド、子図及びレジストで覆われていない他の領域の所望の金属化 をするばかりでなく、レジストの所望しない金属化をも引き起こすことが分かる 。次に、本発明に従って、レジスト表面の不活性化をもたらす、すなわち、レゾ スi・から触媒層を除去する条件下で、板をアルカリ性の希薄水溶液と接触させ る(例えば噴霧し、浸せきし)が、触媒層の除去は、触媒層の除去ができるよう なレゾスト表面の十分な軟化、あるいは触媒を担持、または付着しているレジス トの薄層の溶解のいずれかによる。;−かしながら、同時に、レジストは、腐食 または破壊されないこと、あるいは板から完全にストリップされないことが保証 されなければならない、そしてまた金属化の必要な領域に密着している触媒種が 除去されないこと、及び(または)実質的にどんな程度の不利な改変もされない ことも保証されなければならない。At this stage of the process, sufficient active catalyst is present on the surface of the resist material to - Desired metallization of holes, pads, subfigures and other areas not covered by resist It can be seen that it not only causes the metallization of the resist, but also causes undesired metallization of the resist. . Next, according to the present invention, the resist surface is deactivated, i.e., the resist surface is deactivated. The plate is brought into contact with a dilute alkaline aqueous solution under conditions that remove the catalyst layer from the (e.g. spraying, soaking), but the removal of the catalyst layer requires Sufficient softening of the resist surface, or resist supporting or adhering to a catalyst. either by dissolution of a thin layer of ;-However, at the same time, the resist is corroded. Guaranteed not to be destroyed or completely stripped from the board. and also the catalytic species in close contact with the area requiring metallization. not be removed and/or adversely modified to any substantial degree; This must also be guaranteed.
これらの目的を達成するためには、可溶性の炭酸塩、水酸化物、ホウ酸塩などの 比較的希薄なアルカリ性溶液、特に水溶性のナトリウムまたはカリウム形態の塩 ヲ使用する。レジスト物質はアルカリ性水性媒質中で、最後には完全にストリッ プできるように、慎重に選定しであるので、この工程の操作条件、例えば、溶液 の塩基度、並びに接触の時間及び温度が厳格なあまシ、レゾスト上の腐食を急速 に、または積極的に促進し過ぎないように、あるいはレジストのない板の領域を 不活性化する危険を冒さないように保証することが必要である。一般に、アルカ リ性水溶液の−は約8から11.5まで、好ましくは約8.5から11までの範 囲にするべきである。板を溶液と接触させる温度は一般に約70′Fから約13 0″′F′まで範囲であシ、約90″’Fから約110′Fまでの範囲が好まし い。接触時間は、触媒層をレジストから確実に除去するのに十分なように、しか もレジストを大量に溶解しすぎる危険、及び/または金属化上したい領域に存在 する触媒全不活化する危険金冒すはど長くはなく選定する。To achieve these objectives, soluble carbonates, hydroxides, borates, etc. Relatively dilute alkaline solutions, especially salts in the water-soluble sodium or potassium form Use wo. The resist material is completely stripped in an alkaline aqueous medium. The operating conditions for this step, e.g. The basicity, as well as the time and temperature of contact, will cause rapid corrosion on the harsh and resist. or to avoid promoting too aggressively or areas of the board with no resist. It is necessary to ensure that there is no risk of inactivation. Generally, Arca - of the acidic aqueous solution ranges from about 8 to 11.5, preferably from about 8.5 to 11. should be enclosed. The temperature at which the plate is contacted with the solution generally ranges from about 70'F to about 13 The range is preferably from about 90'F to about 110'F. stomach. The contact time should be short enough to ensure that the catalyst layer is removed from the resist. There is also a risk of dissolving too much resist and/or metallization in the areas you want to overlay. The catalyst should be selected without risking the risk of total inactivation.
水洗の後には、板は、もうスルーホールの表面、及びレジストで覆われていない 他の表面の金属化がいつでもできる。金属化法は金属、一般には銅、の無電解析 出(例えば第4図、層160)t−損金するのが最も代表的であシ、次にこの析 出に続いて、同様な金属、あるいは異種の金属を電解で追加析出させることがで きる。例としては、金属化は無電解銅、次いで電解銅を曳含することができる。After washing with water, the board is no longer covered with through-hole surfaces, and resist Metallization of other surfaces is always possible. Metallization method is electroless analysis of metal, generally copper (e.g., layer 160 in FIG. 4) is most typical, and then this analysis Following deposition, similar or dissimilar metals can be deposited additionally by electrolysis. Wear. As an example, the metallization can include electroless copper followed by electrolytic copper.
どちらの場合でも、この金属化の次に、適切なエツチングレジスト(例えば、ス ズー鉛)t−上に適用し、めっきレジストをストリツピングで除き、かつ保護さ r−ていない領域を、基体表面1でエツチングする。金属化は、電解銅による金 属化のような電解方法を完全に損金することができる。In either case, this metallization is then followed by a suitable etching resist (e.g. Plating resist is removed by stripping and protected. The unetched areas are etched on the substrate surface 1. Metallization is gold by electrolytic copper Electrolytic methods such as metabolization can be completely deducted.
特定の金属化技法には関係なく、先に決めた触媒を不活性化させるレジスト物質 についての必要条件は、また金属化法についての必要条件をも決めることになる 。詳細には、レジスト物質が、めっき操作中に、確実に溶解しないようにするた めには、めっき溶液が強アルカリ性であってはならない。無電解めっきに関して は、この必要条件で、強アルカリ性(P)(が11から16まで)の公知の、ホ ルムアルデヒドを基剤とする無電解浴を使用することかで@ない。しかしながら 、次亜リン酸塩還元剤を基剤とする無電解めっき浴が有効に使用することができ るのは、これの実施可能範囲が、錯化剤を適切に選定すれば、低アルカリ性及び 低酸性の範囲まで広がるからである。例えば、適切な無電解鋼浴に関するクカン スキス(Kukanskis )等の米国特許の第4.209,331号明細書 、及び第4.279,948号明細書ヲ診照されたい。本発明の目的を達成する ために選定するレジストは、使用条件にあるこれらの浴中で溶解しない。金属化 の全部または一部を電解法で行う場合、適切な酸性銅などの浴が公知である。A resist material that deactivates a predetermined catalyst, regardless of the specific metallization technique. The requirements for will also determine the requirements for the metallization method. . Specifically, to ensure that the resist material does not dissolve during the plating operation. For this purpose, the plating solution must not be strongly alkaline. About electroless plating With this requirement, the well-known strongly alkaline (P) (from 11 to 16) The solution is to use an electroless bath based on luminaldehyde. however , electroless plating baths based on hypophosphite reducing agents can be used effectively. The reason for this is that if the complexing agent is selected appropriately, the range of implementation is low alkalinity and This is because it extends to the low acidity range. For example, a study on suitable electroless steel baths U.S. Pat. No. 4,209,331 to Kukanskis et al. , and No. 4,279,948. Achieving the objectives of the invention The resist selected for this purpose will not dissolve in these baths under the conditions of use. metallization If this is carried out in whole or in part by electrolytic methods, suitable baths such as acidic copper are known.
先に指摘したように、本発明の方法は、レジストが特定の条件下のアルカリ水溶 液中で、触媒不活性化に関する必要な特性を維持するならば、種々のタイプのレ ゾストを使用して行うことができる。第5図及び第6図では、正の作用の感光性 レゾスト表面用する本発明の一実施態様を説明する。先の実施態様のときのよう に、スルーホール140のある金属はく−クラッド基w 100.120に、こ の場合は、正の作用tするフォトレジスト感光性物質180を適用し、これtl −あらかじめ定めであるパターンの光マスクを通して露光し、次に現像して、露 光した領域を溶解で除けば、板の表面に、金属化する必要のない領域の、露光さ れていないレジストが残る。板には、次に前記と同様に、種々の洗浄、調整、エ ツチング及び活性化/促進処理を施す。レゾスト表面は、もう十分活性な触媒種 を含有していて、めっき中に(好ましくないが)金属化することになることが分 かる。以前と同様に、レジストの性質はアルカリ性希薄溶液を使用してこれから 触媒種を除去することができる。正のレゾスト表面含しているので、レジストの 外側表面を分解し、かつ可溶化するのにちょうど足りる時間の間、板全体を単に 紫外光線に11元させることによって不活性化を行りこともできる。次に、この 工程に続いて洗浄工程を行って、影響を及ぼす薄い部分を除去することができる 。第5図に示すように、両枝法を組み合わせること、すなわち、最初に板を単に 紫外光線に暴露し、次に板をアルカリ性水溶液と接触させることが一般に好まし い。この処理の後に、先に検討したように、金属化を行う。As pointed out earlier, the method of the present invention allows the resist to be soluble in alkaline water under specific conditions. In liquid, various types of resins can be used, provided they maintain the necessary properties for catalyst deactivation. This can be done using Zost. In Figures 5 and 6, the photosensitivity of positive action An embodiment of the present invention for use on a resist surface will be described. As in the previous embodiment In the metal foil-clad base w 100.120 with the through hole 140, this In this case, apply a photoresist photosensitive material 180 that has a positive effect, and this - exposed through a light mask with a predetermined pattern, then developed and exposed. If the exposed areas are removed by melting, the surface of the plate will be exposed in areas that do not need to be metallized. Some resist remains. The board is then subjected to various cleaning, conditioning, and etching procedures as described above. Perform tucking and activation/promotion treatment. The catalytic species on the resost surface is already sufficiently active. It has been found that metallization occurs during plating (although this is undesirable). Karu. As before, the properties of the resist are prepared using a dilute alkaline solution. Catalytic species can be removed. Since it contains a positive resist surface, the resist Simply rub the entire plate for just enough time to break down and solubilize the outer surface. Inactivation can also be effected by exposure to ultraviolet light. Then this The process can be followed by a cleaning step to remove any affected thin sections. . As shown in Figure 5, the two-branch method can be combined, that is, the plate is simply Exposure to ultraviolet light and then contacting the plate with an alkaline aqueous solution is generally preferred. stomach. This treatment is followed by metallization, as discussed above.
上記の実施態様で二重側面印刷回路板のスルーホールの金属化を説明しているけ れども、全く同じ方法を多層板に使用することができることは明白であろう。The above embodiment illustrates the metallization of through holes in a double-sided printed circuit board. However, it will be clear that exactly the same method can be used for multilayer boards.
当業界では公知であるが、多層板に穴を開けて作ったスルーホールをめっきする 方法では、一般に穴開は処理で汚した樹脂を残らず露出している金属の内部層表 面から除去する汚れ落とし工程が必要である。汚れ落としの代表的な技法では、 化学的な方法(例えば、クロム酸、濃硫酸)、機械的な方法(例えば、水蒸気ホ ーニング、第二次穴開け)、または他の方法(例えば、プラズマエツチング)を 包含し、これに続いて他の特殊な処理を行って、その後に活性化種及び金属化を できるようにするためのスルーホール表面の調整をすることができる。例えば、 クカンスキス、「汚れ除去の改良(Improved Smear Remov al ) J 、サーキッッ”vxファクチャリング(CIRCUITS MA NUFACTURING )、6月、1983年、第576ページ〜第574ペ ージ、及び一般出願の米国特許第4,597,988号明細書を参照されたい。As is well known in the industry, through-holes made by drilling holes in a multilayer board are plated. In this method, drilling generally removes the exposed inner layer of the metal without leaving any resin contaminated by the process. A cleaning process is required to remove dirt from the surface. Typical techniques for removing dirt include: Chemical methods (e.g. chromic acid, concentrated sulfuric acid), mechanical methods (e.g. water vapor fluoride) drilling, secondary drilling) or other methods (e.g. plasma etching). inclusion, followed by other special treatments, followed by activated species and metallization. The through-hole surface can be adjusted to make it possible. for example, Kukanskis, “Improved Smear Remov” al) J, CIRCUITS MA NUFACTURING), June 1983, pages 576-574 page, and general application U.S. Pat. No. 4,597,988.
本発明に関しては、このような汚れ落とし処理はレジストを基体の表面に施す前 または後のどちらででも行うことができる。Regarding the present invention, such stain removal treatment is performed before applying the resist to the surface of the substrate. Or you can do it later.
本発明の方法で特に有益なのはクカンスキス等の「酸化促進剤(Oxidizi ng Accelerator 〕J (1986年4月22日、刊行手数料支 払い済み)と題する、一般出願の係属中の特許出願第712,981号明細書に 記載しである活性化/促進であシ、本明細書では併せて参考資料とするが、この 明細書では、パラジウム/スズゾルを使用する一段階触媒活性化法に続いて、酸 化剤を含有するアルカリ性溶液で促進を行い、このような促進は、本明細書で使 用するような次亜リン酸還元、ホルムアルデヒド不含めつき浴の中で行う次の無 電解めっきと共に特に有効である。これらの好ましい促進溶液の性質、すなわち これらのアルカリ度及び水性性質のために、本発明の方法の状況では、レゾスト 表面を不活性化し、しかも同時に、レジストのない板の表面への触媒の吸収を促 進する手段のような溶液を使用することができる。しかしながら、アルカリ度及 び操作温度の必要条件が異なるために、無電解析出によって金属化をしようとす る場合には、レジスト表面の促進及び不活性化を別々の工程(順序はどちらでも )を行うのが一般であシ、かつ好ましい。Particularly useful in the method of the present invention is the use of "pro-oxidants" such as Kukanskis et al. ng Accelerator J J (April 22, 1986, publication fee paid Pending Patent Application No. 712,981, entitled Pending General Application No. 712,981. The activation/promotion described in this document is also included as reference material in this specification. The specification describes a one-step catalyst activation method using a palladium/tin sol followed by acid The acceleration is carried out with an alkaline solution containing a oxidizing agent; Hypophosphorous acid reduction, such as those used in Particularly effective in conjunction with electrolytic plating. These preferred accelerating solution properties, viz. Because of their alkalinity and aqueous nature, in the context of the process of the invention, resist Deactivates the surface and at the same time promotes absorption of the catalyst onto the surface of the plate without resist. Solutions such as advancing means can be used. However, alkalinity and metallization by electroless deposition due to different operating temperature requirements. If the resist surface is to be promoted and deactivated in separate steps (in either order), ) is generally and preferably.
記載した実施態様では、銅による金属化を代表的に使用しているけれども、特別 に選定したレゾストを溶解しない条件下で析出させることができさえすれば、他 のどんな金属でも使用することができる。Although the embodiments described typically use copper metallization, special As long as the selected resost can be precipitated under conditions that do not dissolve it, other Any metal can be used.
本発明を、印刷回路板の製造に関して詳細に説明するのは、本発明の方法の利点 が最も容易に明白になシ、かつ重要なのが、この分野であるからである。どの、 めっき方法も開始しないうちに、パターンに従ってレジストを適用することので きる本発明の方法で、通常の方法に多大の改良ができるのは、金属化工程、エツ チング等を、必要なレゾスト適用を行うための中断をする必要がなく、行うこと ができるからである◎同じ目的に対して適用することのできる他の方法と比較し て、本発明の方法では繊細な線で輪郭を明確に定め、感光性レジスト物質を使用 し、レゾスト物質を溶解するための有機溶剤の使用と関連する危険、及び廃棄問 題を避けることができる。スルーホールの金属化が必要な二重側面、または多層 タイプの印刷回路板の製造に関して非常に有利であるが、本発明は筐た特に繊細 な細部、または経済性の改良が必要な、あらかじめ定めであるパターンで、基体 表面を金属化する必要のある、どの方法にでも適用することができる。The present invention will be described in detail with respect to the manufacture of printed circuit boards, in order to illustrate the advantages of the method of the present invention. This is because it is in this field that the most obvious and most important is Which, The resist is applied according to the pattern before the plating method even begins. The method of the present invention, which allows for significant improvements over conventional methods, is due to the metallization process and etching process. ting, etc., without the need for interruption to perform the necessary resorst application. This is because it can be compared with other methods that can be applied to the same purpose. Therefore, the method of the present invention clearly defines the outline with delicate lines and uses a photosensitive resist material. and the hazards and disposal issues associated with the use of organic solvents to dissolve resist materials. problems can be avoided. Double-sided, or multilayer requiring through-hole metallization Although highly advantageous with respect to the manufacture of printed circuit boards of the type, the present invention substrate in a predetermined pattern that requires improved detail or economy. It can be applied to any method in which a surface needs to be metallized.
本発明の方法を下記の実施例で更に説明する。The method of the invention is further illustrated in the Examples below.
実施例1 銅はくを積層しであるガラス強化エポキシ基体は、穴を開けてスルーホールを設 け、これを洗浄し、ばシを取シ除いである。次に、板を感光性の負の乾燥フィル ムl/シストのリストンCR15toΩ)3615−11’コーテイングする。Example 1 The glass-reinforced epoxy substrate is laminated with copper foil, and through-holes can be drilled into it. Then, wash it and remove the baffle. Next, dry the plate with a photosensitive negative film. Liston CR15toΩ) 3615-11' coating of mu/cyst.
マスクを通して、所望のパターンで露光してから、レジストを炭酸ナトリウムが 10fi/11の溶液中で現数し、水洗し、かつ下記の処理サイクル(適切な場 合に水洗を交えて)を施す、1.110’Fで2分間、酸性洗剤(マツクデルミ ドCMacDermid ) 9268)と接触させ、2、室温で2分間、調整 剤(マツクデルミド9420)の1・5%(容量)水溶液と接触させ、 6、室温で1分間、ミクロエツチング溶液(マツクデルミドG4)(マックデル ミド60 F15容量%硫酸il)と接触させ、 4.9Q?で3分間、活性剤溶液−マツクデルミド マクティベー) (Mac tivate 〕1Q 、1.5容量係、マツクデルミド9008.50容量チ 及び5容量チ塩酸が残部−と接触させ、 5、 1001C’5分間、炭eす) !Jウム10.9//、ジメチルアミン ボラン(還元剤)0.5g/l、−−ii、sの水溶液と接触させ、レゾスト表 面から触媒層を除去して、不活性化を行い(レゾストの溶解/除去かはつきシな くなったことは、接触溶液中に青色(レゾストの色)が出ないことで分かる)、 6.130’″F〜140”Fで、2分〜5分の間、酸化促進剤(炭酸水素ナト リウムでpi−18,5〜p)(9,0にしである次亜塩素酸ナトリウム水溶液 )と接触させ、 Z 次亜リン酸で還元しである、ホルムアルデヒドを全く含有しない無電解銅浴 、マツクデルミド249−T、p)(−9の中で、130”F’で2分間、無電 解銅めっきを行い、 8.5容量係硫酸に酸浸せきし、 9 酸性銅めっき浴中で電気めっきする。After exposing the desired pattern through a mask, the resist is exposed to sodium carbonate. Count in a 10fi/11 solution, wash with water, and follow the processing cycle below (as appropriate). 1. Wash at 110'F for 2 minutes with acidic detergent (Matsukuderumi). 2. Adjust at room temperature for 2 minutes. contact with a 1.5% (volume) aqueous solution of agent (Matsudermid 9420), 6. Microetching solution (MacDermid G4) (MacDelMid G4) for 1 minute at room temperature. Contact with Mido 60 F15 volume % il sulfate), 4.9Q? for 3 minutes, activator solution - Macdermid tivate〕1Q , 1.5 capacity section, Matsuku Dermid 9008.50 capacity section and 5 volumes of thihydrochloric acid are contacted with the remainder, 5. 1001C'5 minutes, charcoal esu)! Jium 10.9//, dimethylamine Contact with an aqueous solution of borane (reducing agent) 0.5 g/l, --ii, s, Remove the catalyst layer from the surface and inactivate it. This can be seen by the absence of blue (resist color) in the contact solution). 6. At 130”F to 140”F, add an oxidant (sodium bicarbonate) for 2 to 5 minutes. Sodium hypochlorite aqueous solution with pi-18,5~p) (9,0) ) and Z An electroless copper bath that contains no formaldehyde and is reduced with hypophosphorous acid. , Matsucdermid 249-T, p) (in -9, 130"F' for 2 minutes without electricity) Copper plating is performed, Acid immersion in 8.5 volumes of sulfuric acid, 9 Electroplating in an acidic copper plating bath.
この処理中の種々の段階で板を検査して、金属めっきがレジスト表面で全く起っ ていないこと、及びレゾストの腐食が全く認められないことを示した(これは、 詳細には、子図またはパッドの輪郭を明確に定めるパターンの端ぞいのレジスト のしわ寄シ、または縮みで証明されたものである)。スルーホール上の銅の被覆 率はすばらしく良かった。Inspect the plate at various stages during this process to ensure that no metal plating has occurred on the resist surface. It was shown that there was no corrosion of the resost, and that no corrosion of the resost was observed. In detail, resist the edges of the child figure or pattern that clearly defines the contours of the pad. evidenced by wrinkles or shrinkage). Copper coating on through holes The rate was excellent.
上記の過程の特定の変化では、工程5及び工程6を交換することができ、かつ工 程5の溶液中の還元剤は省くことができる。In certain variations of the above process, steps 5 and 6 can be interchanged and The reducing agent in the solution in step 5 can be omitted.
実施例2 実施例1の方法を4枚の板で、最初の4工程を通じて繰シ返した(試料Aから試 料りまで)。その後、試料を次の工程で処理した、 5、炭酸ナトリウム10g/l及びジメチルアミンボラン0.59/l 、 p H−11,5の水溶液と接触させ、接触の時間及び温度は下記の通り、試料A 5分、88乍 試料B 5分、100°F 試料0 5分、120°F′ 試料D 2分、1203F 6、室温で、5チ硫酸で酸浸せきし、かつ7、rR性銅電気めっき浴、マクスペ ク[: MaCuSpec ]9239 (マツクデルミド社)で電気めっきす る。Example 2 The method of Example 1 was repeated on four plates through the first four steps (sample A to sample A). up to the price). The sample was then processed in the following steps: 5. Sodium carbonate 10g/l and dimethylamine borane 0.59/l, p Sample A was brought into contact with an aqueous solution of H-11,5, and the contact time and temperature were as follows. 5 minutes, 88 yen Sample B 5 minutes, 100°F Sample 0 5 minutes, 120°F' Sample D 2 minutes, 1203F 6. Acid soak with 5-thiosulfuric acid at room temperature, and 7. rR copper electroplating bath, Maxsp. Electroplated with Ku [: MaCuSpec] 9239 (Matsuku Dermid Co., Ltd.) Ru.
板の試料すべてで、スルーホールの中の銅被覆率が良好であって、どの処理でも 、レゾストのない表面から触媒の除去(よしあるにしても)を著しくは行ってい ないことを示した。試料Aでは、レジストの腐食がないことを示したが、レゾス ト表面でめっきが多少起こり、これらの表面の不活性化が十分でないことを示し た。試料Cでは、レジストの腐食を明らかに示した。All plate samples showed good copper coverage in the through-holes and were consistent with all treatments. , does not significantly (if at all) remove catalyst from unresisted surfaces. It was shown that there is no such thing. Sample A showed no resist corrosion, but resist Some plating occurs on the surfaces, indicating that these surfaces are not sufficiently passivated. Ta. Sample C clearly showed corrosion of the resist.
試料B及び試料りでは、レジストの腐食はなく、かつレゾスト表面に金属めっき がないことを示し、レジストの密着に及ぼす悪影響はなく、所望の不活性化がで きること、及び輪郭を精細に子図する能力があることなどを示した@ 実施例6 実施例2の手順を6枚の板で繰り返した(試料A1試料B1試料C)。実施例2 で示した工程5の弐りに、試料を、ホウ砂10g/l及びジメチルアミンボラ1 0.5El/1.、−一9.5の水溶液と下記のように接触させた、 試料E 5分、 100’F 試料F 2分、 120’F 試料0 5分、 120°F 全試料のスルーホールの銅被覆率は良好であった。どの試料にも、レジスト表面 に金属めっきはなかった。In sample B and sample sample, there was no corrosion of the resist, and there was metal plating on the resist surface. There is no negative effect on resist adhesion, and the desired inactivation can be achieved. demonstrated the ability to draw detailed outlines, and the ability to draw detailed outlines. Example 6 The procedure of Example 2 was repeated with 6 plates (Sample A1 Sample B1 Sample C). Example 2 At the end of step 5 shown in step 5, the sample was mixed with 10 g/l of borax and 1 liter of dimethylamine borax. 0.5El/1. , -19.5 was brought into contact with the aqueous solution as follows: Sample E 5 minutes, 100'F Sample F 2 minutes, 120'F Sample 0 5 minutes, 120°F The through-hole copper coverage of all samples was good. Every sample has a resist surface. There was no metal plating.
試料E及び試料Fでは、レジストの腐食のないことが明らかであったが、試料G ではレジストに極わずかの腐食があった。In samples E and F, it was clear that there was no corrosion of the resist, but in sample G There was very slight corrosion on the resist.
実施例4 実施例2の手順を3枚の板で繰シ返した(試料H1試料工、試料J)が、工程5 ではpH8,3’を使用し、かつ下記の接触の時間及び温度を使用した、試料H 5分、 100″F’ 試料工 2分、 120°F 試料3 5分、 120°F 全部の試料でスルーホール中の銅被覆率は良好であったが、試料H及び試料工で はレゾスト表面に金属めっきを示した。試料Jではレゾストの腐食、及びレゾス ト表面のめつきは示さなかった0 示したように、上記の記載で本発明を説明し、実施できることを示し、かつ実施 について公知の最良の方法を示したが、特に示す場合を除いて、記載したどの特 定の説明の過程も、物質または条件も、本発明を制限するものと考えるべきでは ない。Example 4 The procedure of Example 2 was repeated with three plates (sample H1, sample J), but in step 5. Sample H using pH 8.3' and the following contact times and temperatures: 5 minutes, 100″F’ Sample processing: 2 minutes, 120°F Sample 3 5 minutes, 120°F The copper coverage in the through-holes was good in all samples, but in sample H and sample machining, showed metal plating on the resist surface. In sample J, corrosion of resost and resos There was no plating on the surface. As indicated, the foregoing description describes the invention, shows that the invention can be practiced, and that it is possible to carry out the invention. The best known method for Neither the particular course of description nor the materials or conditions should be construed as limiting the invention. do not have.
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US89362686A | 1986-08-06 | 1986-08-06 | |
US893,626 | 1986-08-06 |
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US (1) | US4931148A (en) |
EP (1) | EP0276276B1 (en) |
JP (1) | JPH01500472A (en) |
AT (1) | ATE66498T1 (en) |
AU (1) | AU7752287A (en) |
CA (1) | CA1278877C (en) |
DE (1) | DE3772370D1 (en) |
WO (1) | WO1988000988A1 (en) |
ZA (1) | ZA875224B (en) |
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EP0284626B1 (en) * | 1986-09-30 | 1992-03-04 | Macdermid, Incorporated | Process for metallizing non-conductive substrates |
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DE3928832C2 (en) * | 1989-08-31 | 1995-04-20 | Blasberg Oberflaechentech | Process for the production of plated-through printed circuit boards and semi-finished printed circuit boards |
US5342501A (en) * | 1989-11-21 | 1994-08-30 | Eric F. Harnden | Method for electroplating metal onto a non-conductive substrate treated with basic accelerating solutions for metal plating |
US5213841A (en) * | 1990-05-15 | 1993-05-25 | Shipley Company Inc. | Metal accelerator |
EP0467199A3 (en) * | 1990-07-19 | 1992-11-25 | Learonal, Inc. | Preparation of printed circuit boards by metallization |
EP0496854B1 (en) * | 1990-08-18 | 2000-03-15 | Schering Aktiengesellschaft | Method for preparation of 20-METHYL-5,7-PREGNADIENE-3$g(b),21-DIOL DERIVATIVES |
DE69217393T2 (en) * | 1991-07-16 | 1997-05-28 | Chiyoda Chem Eng Construct Co | Condensation process for the recovery of bisphenol A and phenol |
US5360946A (en) * | 1991-09-17 | 1994-11-01 | International Business Machines Corporation | Flex tape protective coating |
EP0584386A1 (en) * | 1992-08-26 | 1994-03-02 | International Business Machines Corporation | Printed circuit board and method of producing printed circuit boards |
US5384153A (en) * | 1993-03-10 | 1995-01-24 | At&T Corp. | Monitoring electroless plating baths |
CA2222158C (en) * | 1993-03-18 | 2001-01-30 | Nayan Harsukhrai Joshi | Self accelerating and replenishing non-formaldehyde immersion coating method and composition |
US5427895A (en) * | 1993-12-23 | 1995-06-27 | International Business Machines Corporation | Semi-subtractive circuitization |
US6403146B1 (en) | 1994-08-26 | 2002-06-11 | Gary B. Larson | Process for the manufacture of printed circuit boards |
EP0784913A2 (en) * | 1995-08-09 | 1997-07-23 | Koninklijke Philips Electronics N.V. | Method of manufacturing devices comprising a base with a conductor pattern of electrical conductors |
US5620612A (en) * | 1995-08-22 | 1997-04-15 | Macdermid, Incorporated | Method for the manufacture of printed circuit boards |
EP0762813A1 (en) * | 1995-08-25 | 1997-03-12 | Macdermid Incorporated | Method for the manufacture of printed circuit boards |
US6044550A (en) * | 1996-09-23 | 2000-04-04 | Macdermid, Incorporated | Process for the manufacture of printed circuit boards |
US5747098A (en) * | 1996-09-24 | 1998-05-05 | Macdermid, Incorporated | Process for the manufacture of printed circuit boards |
US6023842A (en) * | 1996-09-24 | 2000-02-15 | Macdermid, Incorporated | Process for the manufacture of printed circuit boards |
US5770032A (en) * | 1996-10-16 | 1998-06-23 | Fidelity Chemical Products Corporation | Metallizing process |
US6495394B1 (en) | 1999-02-16 | 2002-12-17 | Sumitomo Metal (Smi) Electronics Devices Inc. | Chip package and method for manufacturing the same |
US6264851B1 (en) * | 1998-03-17 | 2001-07-24 | International Business Machines Corporation | Selective seed and plate using permanent resist |
US6039889A (en) * | 1999-01-12 | 2000-03-21 | Fujitsu Limited | Process flows for formation of fine structure layer pairs on flexible films |
JP2000252630A (en) * | 1999-02-24 | 2000-09-14 | Omg Fidelity | Board with nickel plated through-hole and/or nickel plated blind path |
JP3524424B2 (en) * | 1999-04-01 | 2004-05-10 | キヤノン株式会社 | Mold or mold master for microstructure array, and method of manufacturing the same |
EP1207730B1 (en) * | 1999-08-06 | 2009-09-16 | Ibiden Co., Ltd. | Electroplating solution, method for fabricating multilayer printed wiring board using the solution, and multilayer printed wiring board |
US6720080B2 (en) * | 2000-09-08 | 2004-04-13 | Jps Glass And Industrial Fabrics | Finish for glass fabrics used for reinforcing epoxy structures |
US20040188257A1 (en) * | 2001-08-31 | 2004-09-30 | John Klocke | Methods for processing micro-feature workpieces, patterned structures on micro-feature workpieces, and integrated tools for processing micro-feature workpieces |
WO2005068185A1 (en) * | 2004-01-13 | 2005-07-28 | Ube Industries, Ltd. | Polyimide-metal laminated body and polyimide circuit board |
KR100601483B1 (en) * | 2004-12-06 | 2006-07-18 | 삼성전기주식회사 | Parallel MLB granted interlayer conductivity by viapost and method thereof |
JP2007134364A (en) * | 2005-11-08 | 2007-05-31 | Hitachi Cable Ltd | Method for manufacturing multilayer wiring board, multilayer wiring board, and electronic device using it |
JP5573429B2 (en) * | 2009-08-10 | 2014-08-20 | 住友ベークライト株式会社 | Electroless nickel-palladium-gold plating method, plated product, printed wiring board, interposer, and semiconductor device |
TW201349976A (en) * | 2012-05-31 | 2013-12-01 | Zhen Ding Technology Co Ltd | Method for manufacturing multilayer printed circuit board |
RU2543518C1 (en) * | 2013-10-03 | 2015-03-10 | Общество с ограниченной ответственностью "Компания РМТ"(ООО"РМТ") | Method of production of double-sided printed board |
CN103476204B (en) * | 2013-10-08 | 2016-06-08 | 复旦大学 | A kind of addition preparation method of dual platen |
US9699914B2 (en) * | 2014-10-20 | 2017-07-04 | Averatek Corporation | Patterning of electroless metals by selective deactivation of catalysts |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS60120589A (en) * | 1983-12-02 | 1985-06-28 | 塩尻工業株式会社 | Method of producing printed circuit board |
JPS60120591A (en) * | 1983-12-05 | 1985-06-28 | 株式会社日立製作所 | Method of forming ultrafine copper conductor |
JPS60120590A (en) * | 1983-12-02 | 1985-06-28 | セイコーエプソン株式会社 | Method of producing printed circuit board |
US4574031A (en) * | 1985-03-29 | 1986-03-04 | At&T Technologies, Inc. | Additive processing electroless metal plating using aqueous photoresist |
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US3562038A (en) * | 1968-05-15 | 1971-02-09 | Shipley Co | Metallizing a substrate in a selective pattern utilizing a noble metal colloid catalytic to the metal to be deposited |
US3672925A (en) * | 1970-10-02 | 1972-06-27 | Rca Corp | Method of preparing a substrate for depositing a metal on selected portions thereof |
US4151313A (en) * | 1977-03-11 | 1979-04-24 | Hitachi, Ltd. | Method for production of printed circuits by electroless metal plating employing a solid solution of metal oxides of titanium, nickel, and antimony as a masking material |
US4279948A (en) * | 1978-05-25 | 1981-07-21 | Macdermid Incorporated | Electroless copper deposition solution using a hypophosphite reducing agent |
US4388351A (en) * | 1979-08-20 | 1983-06-14 | Western Electric Company, Inc. | Methods of forming a patterned metal film on a support |
US4597988A (en) * | 1983-06-06 | 1986-07-01 | Macdermid, Incorporated | Process for preparing printed circuit board thru-holes |
US4537799A (en) * | 1984-04-16 | 1985-08-27 | At&T Technologies, Inc. | Selective metallization process |
DE3417563C2 (en) * | 1984-05-11 | 1986-12-04 | Dr.-Ing. Max Schlötter GmbH & Co KG, 7340 Geislingen | Process for the production of metal patterns on insulating substrates, in particular printed circuits |
US4668532A (en) * | 1984-09-04 | 1987-05-26 | Kollmorgen Technologies Corporation | System for selective metallization of electronic interconnection boards |
-
1987
- 1987-06-25 JP JP62504477A patent/JPH01500472A/en active Granted
- 1987-06-25 AU AU77522/87A patent/AU7752287A/en not_active Abandoned
- 1987-06-25 AT AT87905030T patent/ATE66498T1/en active
- 1987-06-25 WO PCT/US1987/001568 patent/WO1988000988A1/en active IP Right Grant
- 1987-06-25 DE DE8787905030T patent/DE3772370D1/en not_active Expired - Lifetime
- 1987-06-25 EP EP87905030A patent/EP0276276B1/en not_active Expired - Lifetime
- 1987-07-09 CA CA000541745A patent/CA1278877C/en not_active Expired - Lifetime
- 1987-07-16 ZA ZA875224A patent/ZA875224B/en unknown
-
1988
- 1988-09-27 US US07/250,991 patent/US4931148A/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60120589A (en) * | 1983-12-02 | 1985-06-28 | 塩尻工業株式会社 | Method of producing printed circuit board |
JPS60120590A (en) * | 1983-12-02 | 1985-06-28 | セイコーエプソン株式会社 | Method of producing printed circuit board |
JPS60120591A (en) * | 1983-12-05 | 1985-06-28 | 株式会社日立製作所 | Method of forming ultrafine copper conductor |
US4574031A (en) * | 1985-03-29 | 1986-03-04 | At&T Technologies, Inc. | Additive processing electroless metal plating using aqueous photoresist |
Also Published As
Publication number | Publication date |
---|---|
WO1988000988A1 (en) | 1988-02-11 |
CA1278877C (en) | 1991-01-08 |
EP0276276A1 (en) | 1988-08-03 |
JPH0455553B2 (en) | 1992-09-03 |
US4931148A (en) | 1990-06-05 |
DE3772370D1 (en) | 1991-09-26 |
EP0276276A4 (en) | 1989-03-29 |
ZA875224B (en) | 1988-01-22 |
EP0276276B1 (en) | 1991-08-21 |
AU7752287A (en) | 1988-02-24 |
ATE66498T1 (en) | 1991-09-15 |
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